From a8900f9feddac300add96f4878a6b9f54e9a025f Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Wed, 28 Feb 2024 19:41:04 -0800 Subject: [PATCH 1/4] [RISCV] Fix crash when unrolling loop containing vector instructions When MVT is not a vector type, TCK_CodeSize should return an invalid cost. This patch adds a check in the beginning to make sure all cost kinds return invalid costs consistently. Before this patch, TCK_CodeSize returns a valid cost on scalar MVT but other cost kinds doesn't. This fixes the issue #83294 where a loop contains vector instructions and MVT is scalar after type legalization when the vector extension is not enabled, --- .../Target/RISCV/RISCVTargetTransformInfo.cpp | 3 ++ .../CostModel/RISCV/rvv-invalid-cost.ll | 53 +++++++++++++++++++ 2 files changed, 56 insertions(+) create mode 100644 llvm/test/Analysis/CostModel/RISCV/rvv-invalid-cost.ll diff --git a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp index f04968d82e86e..54c7402e4444c 100644 --- a/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp +++ b/llvm/lib/Target/RISCV/RISCVTargetTransformInfo.cpp @@ -37,6 +37,9 @@ static cl::opt SLPMaxVF( InstructionCost RISCVTTIImpl::getRISCVInstructionCost(ArrayRef OpCodes, MVT VT, TTI::TargetCostKind CostKind) { + // Check if the type is valid for all CostKind + if (!VT.isVector()) + return InstructionCost::getInvalid(); size_t NumInstr = OpCodes.size(); if (CostKind == TTI::TCK_CodeSize) return NumInstr; diff --git a/llvm/test/Analysis/CostModel/RISCV/rvv-invalid-cost.ll b/llvm/test/Analysis/CostModel/RISCV/rvv-invalid-cost.ll new file mode 100644 index 0000000000000..8df26d88f5289 --- /dev/null +++ b/llvm/test/Analysis/CostModel/RISCV/rvv-invalid-cost.ll @@ -0,0 +1,53 @@ +; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 +; RUN: opt < %s -mtriple=riscv64 -mattr=+f,+d --passes=loop-unroll-full -S | FileCheck %s + +; Check it doesn' crash when the vector extension is not enabled. +define void @foo() { +; CHECK-LABEL: define void @foo( +; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { +; CHECK-NEXT: entry: +; CHECK-NEXT: br label [[FOR_BODY:%.*]] +; CHECK: for.body: +; CHECK-NEXT: [[INDVARS_IV1:%.*]] = phi i64 [ [[INDVARS_IV_NEXT:%.*]], [[FOR_BODY]] ], [ 0, [[ENTRY:%.*]] ] +; CHECK-NEXT: [[TMP0:%.*]] = load float, ptr null, align 4 +; CHECK-NEXT: [[SPLAT_SPLAT_I_I_I:%.*]] = shufflevector <2 x float> zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer +; CHECK-NEXT: [[CMP1_I_I_I:%.*]] = fcmp ogt <2 x float> zeroinitializer, zeroinitializer +; CHECK-NEXT: [[SPLAT_SPLAT3_I_I_I:%.*]] = shufflevector <2 x i32> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer +; CHECK-NEXT: [[XOR3_I_I_I_I_I:%.*]] = select <2 x i1> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer +; CHECK-NEXT: [[TMP1:%.*]] = load float, ptr null, align 4 +; CHECK-NEXT: [[SPLAT_SPLAT8_I_I_I:%.*]] = shufflevector <2 x float> zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer +; CHECK-NEXT: [[SUB_I_I_I:%.*]] = fsub <2 x float> zeroinitializer, zeroinitializer +; CHECK-NEXT: [[MUL_I_I_I:%.*]] = shl i64 0, 0 +; CHECK-NEXT: [[TMP2:%.*]] = load float, ptr null, align 4 +; CHECK-NEXT: [[SPLAT_SPLAT_I_I_I_I:%.*]] = shufflevector <2 x float> zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer +; CHECK-NEXT: [[XOR3_I_I_I_V_I_I:%.*]] = select <2 x i1> zeroinitializer, <2 x float> zeroinitializer, <2 x float> zeroinitializer +; CHECK-NEXT: [[INDVARS_IV_NEXT]] = add i64 [[INDVARS_IV1]], 1 +; CHECK-NEXT: [[EXITCOND:%.*]] = icmp ne i64 [[INDVARS_IV1]], 8 +; CHECK-NEXT: br i1 [[EXITCOND]], label [[FOR_BODY]], label [[EXIT:%.*]] +; CHECK: exit: +; CHECK-NEXT: ret void +; +entry: + br label %for.body + +for.body: ; preds = %for.body, %entry + %indvars.iv1 = phi i64 [ %indvars.iv.next, %for.body ], [ 0, %entry ] + %0 = load float, ptr null, align 4 + %splat.splat.i.i.i = shufflevector <2 x float> zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer + %cmp1.i.i.i = fcmp ogt <2 x float> zeroinitializer, zeroinitializer + %splat.splat3.i.i.i = shufflevector <2 x i32> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer + %xor3.i.i.i.i.i = select <2 x i1> zeroinitializer, <2 x i32> zeroinitializer, <2 x i32> zeroinitializer + %1 = load float, ptr null, align 4 + %splat.splat8.i.i.i = shufflevector <2 x float> zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer + %sub.i.i.i = fsub <2 x float> zeroinitializer, zeroinitializer + %mul.i.i.i = shl i64 0, 0 + %2 = load float, ptr null, align 4 + %splat.splat.i.i.i.i = shufflevector <2 x float> zeroinitializer, <2 x float> zeroinitializer, <2 x i32> zeroinitializer + %xor3.i.i.i.v.i.i = select <2 x i1> zeroinitializer, <2 x float> zeroinitializer, <2 x float> zeroinitializer + %indvars.iv.next = add i64 %indvars.iv1, 1 + %exitcond = icmp ne i64 %indvars.iv1, 8 + br i1 %exitcond, label %for.body, label %exit + +exit: ; preds = %for.body + ret void +} From 736edf91ca1c5c27835e7a61d701f20712181237 Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Thu, 29 Feb 2024 08:33:18 -0800 Subject: [PATCH 2/4] Rename test --- .../RISCV/{rvv-invalid-cost.ll => rvv-cost-without-v.ll} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename llvm/test/Analysis/CostModel/RISCV/{rvv-invalid-cost.ll => rvv-cost-without-v.ll} (100%) diff --git a/llvm/test/Analysis/CostModel/RISCV/rvv-invalid-cost.ll b/llvm/test/Analysis/CostModel/RISCV/rvv-cost-without-v.ll similarity index 100% rename from llvm/test/Analysis/CostModel/RISCV/rvv-invalid-cost.ll rename to llvm/test/Analysis/CostModel/RISCV/rvv-cost-without-v.ll From 4ec95de41820b5294f19e23977c29f8e63d924aa Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Thu, 29 Feb 2024 08:34:35 -0800 Subject: [PATCH 3/4] Fix typo --- llvm/test/Analysis/CostModel/RISCV/rvv-cost-without-v.ll | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/llvm/test/Analysis/CostModel/RISCV/rvv-cost-without-v.ll b/llvm/test/Analysis/CostModel/RISCV/rvv-cost-without-v.ll index 8df26d88f5289..cd99065f0285c 100644 --- a/llvm/test/Analysis/CostModel/RISCV/rvv-cost-without-v.ll +++ b/llvm/test/Analysis/CostModel/RISCV/rvv-cost-without-v.ll @@ -1,7 +1,7 @@ ; NOTE: Assertions have been autogenerated by utils/update_test_checks.py UTC_ARGS: --version 4 ; RUN: opt < %s -mtriple=riscv64 -mattr=+f,+d --passes=loop-unroll-full -S | FileCheck %s -; Check it doesn' crash when the vector extension is not enabled. +; Check it doesn't crash when the vector extension is not enabled. define void @foo() { ; CHECK-LABEL: define void @foo( ; CHECK-SAME: ) #[[ATTR0:[0-9]+]] { From f4e6633e7bc382fd308e1484b1341ce5eb5ebbc3 Mon Sep 17 00:00:00 2001 From: ShihPo Hung Date: Thu, 29 Feb 2024 22:36:02 -0800 Subject: [PATCH 4/4] rename the test to vector-cost-without-v.ll --- .../RISCV/{rvv-cost-without-v.ll => vector-cost-without-v.ll} | 0 1 file changed, 0 insertions(+), 0 deletions(-) rename llvm/test/Analysis/CostModel/RISCV/{rvv-cost-without-v.ll => vector-cost-without-v.ll} (100%) diff --git a/llvm/test/Analysis/CostModel/RISCV/rvv-cost-without-v.ll b/llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll similarity index 100% rename from llvm/test/Analysis/CostModel/RISCV/rvv-cost-without-v.ll rename to llvm/test/Analysis/CostModel/RISCV/vector-cost-without-v.ll