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It means the data in each slot must be contiguous, no that one slot must start right after the previous has ended, your setup there is ok |
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Hi team !
The Zephyr documentation states:
I would like to understand the reason behind this limitation.
Context
I'm working on a Zephyr project on a STM32H573 with 2MB of flash organized in two banks of 1MB each.
I would like to have my two slots to reside each on one flash bank, so I can benefit from the "read-while-write" mechanism when downloading my new FW.
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