From 924b11741e950e2254e47af0234a279c2d0c8135 Mon Sep 17 00:00:00 2001 From: Milad Fa Date: Wed, 28 May 2025 18:26:26 -0400 Subject: [PATCH 1/2] deps: V8: cherry-pick 59d52e311bb1 Original commit message: [liftoff] Fix parameter passing during CallC Values smaller than 8 bytes need to be sign/zero extended to 8 bytes then pushed on to the stack. Change-Id: I5c9a2179ef2b65cf08b7e773180d78b252c2253f Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/6597365 Commit-Queue: Milad Farazmand Reviewed-by: Junliang Yan Cr-Commit-Position: refs/heads/main@{#100578} Refs: https://github.com/v8/v8/commit/59d52e311bb195d39c5ba87e11cbbdff03c42208 --- common.gypi | 2 +- .../baseline/ppc/liftoff-assembler-ppc-inl.h | 36 +++++++++++++++---- .../s390/liftoff-assembler-s390-inl.h | 35 ++++++++++++++---- 3 files changed, 60 insertions(+), 13 deletions(-) diff --git a/common.gypi b/common.gypi index 686fc122383cb3..5f986d2066f65e 100644 --- a/common.gypi +++ b/common.gypi @@ -38,7 +38,7 @@ # Reset this number to 0 on major V8 upgrades. # Increment by one for each non-official patch applied to deps/v8. - 'v8_embedder_string': '-node.18', + 'v8_embedder_string': '-node.19', ##### V8 defaults for Node.js ##### diff --git a/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc-inl.h b/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc-inl.h index 7ab51af2be9e68..2256229f868c56 100644 --- a/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc-inl.h +++ b/deps/v8/src/wasm/baseline/ppc/liftoff-assembler-ppc-inl.h @@ -2893,14 +2893,38 @@ void LiftoffAssembler::CallC(const std::initializer_list args, parallel_move.LoadIntoRegister(LiftoffRegister{kCArgRegs[reg_args]}, arg); ++reg_args; } else { - int bias = 0; - // On BE machines values with less than 8 bytes are right justified. - // bias here is relative to the stack pointer. - if (arg.kind() == kI32 || arg.kind() == kF32) bias = -stack_bias; int offset = (kStackFrameExtraParamSlot + stack_args) * kSystemPointerSize; - MemOperand dst{sp, offset + bias}; - liftoff::StoreToMemory(this, dst, arg, r0, ip); + MemOperand dst{sp, offset}; + Register scratch1 = r0; + Register scratch2 = ip; + if (arg.is_reg()) { + switch (arg.kind()) { + case kI16: + extsh(scratch1, arg.reg().gp()); + StoreU64(scratch1, dst); + break; + case kI32: + extsw(scratch1, arg.reg().gp()); + StoreU64(scratch1, dst); + break; + case kI64: + StoreU64(arg.reg().gp(), dst); + break; + default: + UNREACHABLE(); + } + } else if (arg.is_const()) { + mov(scratch1, Operand(static_cast(arg.i32_const()))); + StoreU64(scratch1, dst); + } else if (value_kind_size(arg.kind()) == 4) { + LoadS32(scratch1, liftoff::GetStackSlot(arg.offset()), scratch2); + StoreU64(scratch1, dst); + } else { + DCHECK_EQ(8, value_kind_size(arg.kind())); + LoadU64(scratch1, liftoff::GetStackSlot(arg.offset()), scratch1); + StoreU64(scratch1, dst); + } ++stack_args; } } diff --git a/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390-inl.h b/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390-inl.h index bfd1eaf61e69f0..0be7b0e880a543 100644 --- a/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390-inl.h +++ b/deps/v8/src/wasm/baseline/s390/liftoff-assembler-s390-inl.h @@ -3271,14 +3271,37 @@ void LiftoffAssembler::CallC(const std::initializer_list args, parallel_move.LoadIntoRegister(LiftoffRegister{kCArgRegs[reg_args]}, arg); ++reg_args; } else { - int bias = 0; - // On BE machines values with less than 8 bytes are right justified. - // bias here is relative to the stack pointer. - if (arg.kind() == kI32 || arg.kind() == kF32) bias = -stack_bias; int offset = (kStackFrameExtraParamSlot + stack_args) * kSystemPointerSize; - MemOperand dst{sp, offset + bias}; - liftoff::StoreToMemory(this, dst, arg, ip); + MemOperand dst{sp, offset}; + Register scratch = ip; + if (arg.is_reg()) { + switch (arg.kind()) { + case kI16: + LoadS16(scratch, arg.reg().gp()); + StoreU64(scratch, dst); + break; + case kI32: + LoadS32(scratch, arg.reg().gp()); + StoreU64(scratch, dst); + break; + case kI64: + StoreU64(arg.reg().gp(), dst); + break; + default: + UNREACHABLE(); + } + } else if (arg.is_const()) { + mov(scratch, Operand(static_cast(arg.i32_const()))); + StoreU64(scratch, dst); + } else if (value_kind_size(arg.kind()) == 4) { + LoadS32(scratch, liftoff::GetStackSlot(arg.offset()), scratch); + StoreU64(scratch, dst); + } else { + DCHECK_EQ(8, value_kind_size(arg.kind())); + LoadU64(scratch, liftoff::GetStackSlot(arg.offset()), scratch); + StoreU64(scratch, dst); + } ++stack_args; } } From de635c834f9b1fbb9563f6a0af9f868b8dced775 Mon Sep 17 00:00:00 2001 From: Milad Fa Date: Thu, 29 May 2025 13:57:10 -0400 Subject: [PATCH 2/2] deps: V8: cherry-pick 7b91e3e2cbaf Original commit message: s390: use %r15 instead of %sp Some compilers do not recognize %sp and output: ``` error: invalid register ``` Change-Id: I2e1b64dd0e799a03afccbd12f5b2db17b3130e07 Reviewed-on: https://chromium-review.googlesource.com/c/v8/v8/+/6603554 Reviewed-by: Michael Lippautz Commit-Queue: Milad Farazmand Reviewed-by: Junliang Yan Cr-Commit-Position: refs/heads/main@{#100576} Refs: https://github.com/v8/v8/commit/7b91e3e2cbaf6a9be24e103a47fdaae1effece6e --- common.gypi | 2 +- deps/v8/src/heap/base/asm/s390/push_registers_asm.cc | 8 ++++---- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/common.gypi b/common.gypi index 5f986d2066f65e..a2937460b5a897 100644 --- a/common.gypi +++ b/common.gypi @@ -38,7 +38,7 @@ # Reset this number to 0 on major V8 upgrades. # Increment by one for each non-official patch applied to deps/v8. - 'v8_embedder_string': '-node.19', + 'v8_embedder_string': '-node.20', ##### V8 defaults for Node.js ##### diff --git a/deps/v8/src/heap/base/asm/s390/push_registers_asm.cc b/deps/v8/src/heap/base/asm/s390/push_registers_asm.cc index ef954fa03ae8f2..80b6cf0664d627 100644 --- a/deps/v8/src/heap/base/asm/s390/push_registers_asm.cc +++ b/deps/v8/src/heap/base/asm/s390/push_registers_asm.cc @@ -21,17 +21,17 @@ asm(".text \n" "PushAllRegistersAndIterateStack: \n" // Push all callee-saved registers. // r6-r13, r14 and sp(r15) - " stmg %r6, %sp, 48(%sp) \n" + " stmg %r6, %r15, 48(%r15) \n" // Allocate frame. - " lay %sp, -160(%sp) \n" + " lay %r15, -160(%r15) \n" // Pass 1st parameter (r2) unchanged (Stack*). // Pass 2nd parameter (r3) unchanged (StackVisitor*). // Save 3rd parameter (r4; IterateStackCallback). " lgr %r5, %r4 \n" // Pass sp as 3rd parameter. 160+48 to point // to callee saved region stored above. - " lay %r4, 208(%sp) \n" + " lay %r4, 208(%r15) \n" // Call the callback. " basr %r14, %r5 \n" - " lmg %r14,%sp, 272(%sp) \n" + " lmg %r14,%r15, 272(%r15) \n" " br %r14 \n");