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hwloc: add the use_perf_cpus_only option
only use the performance cpus when true (default is false) requires hwloc >= 2.4 Refs. #11345 Signed-off-by: Gilles Gouaillardet <[email protected]>
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3 files changed

+28
-6
lines changed

3 files changed

+28
-6
lines changed

opal/mca/hwloc/base/base.h

Lines changed: 3 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
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/*
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* Copyright (c) 2011-2017 Cisco Systems, Inc. All rights reserved
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* Copyright (c) 2013-2017 Intel, Inc. All rights reserved.
4-
* Copyright (c) 2017 Research Organization for Information Science
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* and Technology (RIST). All rights reserved.
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* Copyright (c) 2017-2023 Research Organization for Information Science
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* and Technology (RIST). All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
@@ -68,6 +68,7 @@ OPAL_DECLSPEC char* opal_hwloc_base_print_locality(opal_hwloc_locality_t localit
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OPAL_DECLSPEC extern char *opal_hwloc_base_cpu_list;
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OPAL_DECLSPEC extern hwloc_cpuset_t opal_hwloc_base_given_cpus;
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OPAL_DECLSPEC extern char *opal_hwloc_base_topo_file;
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OPAL_DECLSPEC extern bool opal_hwloc_use_perf_cpus_only;
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/* convenience macro for debugging */
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#define OPAL_HWLOC_SHOW_BINDING(n, v, t) \

opal/mca/hwloc/base/hwloc_base_frame.c

Lines changed: 9 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -1,8 +1,8 @@
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/*
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* Copyright (c) 2011-2018 Cisco Systems, Inc. All rights reserved
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* Copyright (c) 2013-2018 Intel, Inc. All rights reserved.
4-
* Copyright (c) 2016-2017 Research Organization for Information Science
5-
* and Technology (RIST). All rights reserved.
4+
* Copyright (c) 2016-2023 Research Organization for Information Science
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* and Technology (RIST). All rights reserved.
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* $COPYRIGHT$
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*
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* Additional copyrights may follow
@@ -58,6 +58,7 @@ hwloc_obj_type_t opal_hwloc_levels[] = {
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};
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bool opal_hwloc_use_hwthreads_as_cpus = false;
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char *opal_hwloc_base_topo_file = NULL;
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int opal_hwloc_use_perf_cpus_only= false;
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static mca_base_var_enum_value_t hwloc_base_map[] = {
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{OPAL_HWLOC_BASE_MAP_NONE, "none"},
@@ -162,6 +163,12 @@ static int opal_hwloc_base_register(mca_base_register_flag_t flags)
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MCA_BASE_VAR_TYPE_STRING, NULL, 0, 0, OPAL_INFO_LVL_9,
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MCA_BASE_VAR_SCOPE_READONLY, &opal_hwloc_base_topo_file);
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opal_hwloc_use_perf_cpus_only = false;
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(void) mca_base_var_register("opal", "hwloc", "base", "use_perf_cpus_only",
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"Only use performance cpus",
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MCA_BASE_VAR_TYPE_BOOL, NULL, 0, 0, OPAL_INFO_LVL_9,
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MCA_BASE_VAR_SCOPE_READONLY, &opal_hwloc_base_cpukind);
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/* register parameters */
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return OPAL_SUCCESS;
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}

opal/mca/hwloc/base/hwloc_base_util.c

Lines changed: 16 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -14,8 +14,8 @@
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* Copyright (c) 2012-2017 Los Alamos National Security, LLC.
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* All rights reserved.
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* Copyright (c) 2013-2020 Intel, Inc. All rights reserved.
17-
* Copyright (c) 2015-2017 Research Organization for Information Science
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* and Technology (RIST). All rights reserved.
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* Copyright (c) 2015-2023 Research Organization for Information Science
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* and Technology (RIST). All rights reserved.
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* Copyright (C) 2018 Mellanox Technologies, Ltd.
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* All rights reserved.
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* Copyright (c) 2018 Amazon.com, Inc. or its affiliates. All Rights reserved.
@@ -160,6 +160,20 @@ int opal_hwloc_base_filter_cpus(hwloc_topology_t topo)
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#else
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avail = hwloc_bitmap_dup(root->cpuset);
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#endif
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if (opal_hwloc_use_perf_cpus_only) {
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#if HWLOC_API_VERSION < 0x24000
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OPAL_ERROR_LOG(OPAL_ERR_NOT_SUPPORTED);
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return OPAL_ERR_NOT_SUPPORTED;
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#else
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int nr = hwloc_cpukinds_get_nr(topo, 0);
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if (0 < nr) {
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hwloc_bitmap_t perf_cpuset;
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if (0 <= hwloc_cpukinds_get_info(topo, perf_cpuset, nr-1 , NULL, NULL, NULL, 0)) {
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hwloc_bitmap_and(avail, avail, perf_cpuset);
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}
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}
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#endif
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}
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OPAL_OUTPUT_VERBOSE((5, opal_hwloc_base_framework.framework_output,
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"hwloc:base: no cpus specified - using root available cpuset"));
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} else {

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