asm/arm64: ensure instruction ordering on timer

Signed-off-by: Nathan Hjelm <[email protected]>

Author: hjelmn

opal/include/opal/sys/arm64/timer.h

@@ -1,8 +1,11 @@
+/* -*- Mode: C; c-basic-offset:4 ; indent-tabs-mode:nil -*- */
 /*
  * Copyright (c) 2008      The University of Tennessee and The University
  *                         of Tennessee Research Foundation.  All rights
  *                         reserved.
  * Copyright (c) 2016      Broadcom Limited. All rights reserved.
+ * Copyright (c) 2016      Los Alamos National Security, LLC. All rights
+ *                         reserved.
  * $COPYRIGHT$
  *
  * Additional copyrights may follow
@@ -22,7 +25,8 @@ opal_sys_timer_get_cycles(void)
 {
     opal_timer_t ret;
 
-     __asm__ __volatile__ ("mrs %0,  CNTVCT_EL0" : "=r" (ret));
+    __asm__ __volatile__ ("isb" ::: "memory");
+    __asm__ __volatile__ ("mrs %0,  CNTVCT_EL0" : "=r" (ret));
 
     return ret;
 }
@@ -31,9 +35,9 @@ opal_sys_timer_get_cycles(void)
 static inline opal_timer_t
 opal_sys_timer_freq(void)
 {
-        opal_timer_t freq;
-        __asm__ __volatile__ ("mrs %0,  CNTFRQ_EL0" : "=r" (freq));
-        return (opal_timer_t)(freq);
+    opal_timer_t freq;
+    __asm__ __volatile__ ("mrs %0,  CNTFRQ_EL0" : "=r" (freq));
+    return (opal_timer_t)(freq);
 }
 
 #define OPAL_HAVE_SYS_TIMER_GET_CYCLES 1