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erifanXiaohong Gong
erifan
authored and
Xiaohong Gong
committed
8367391: Loss of precision on implicit conversion in vectornode.cpp
Reviewed-by: chagedorn, roland
1 parent f36c33c commit 528f93f

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2 files changed

+33
-27
lines changed

2 files changed

+33
-27
lines changed

‎src/hotspot/share/opto/vectornode.cpp‎

Lines changed: 2 additions & 2 deletions
Original file line numberDiff line numberDiff line change
@@ -439,8 +439,8 @@ bool VectorNode::is_maskall_type(const TypeLong* type, int vlen) {
439439
if (!type->is_con()) {
440440
return false;
441441
}
442-
long mask = (-1ULL >> (64 - vlen));
443-
long bit = type->get_con() & mask;
442+
jlong mask = (-1ULL >> (64 - vlen));
443+
jlong bit = type->get_con() & mask;
444444
return bit == 0 || bit == mask;
445445
}
446446

‎test/hotspot/jtreg/compiler/vectorapi/VectorMaskFromLongTest.java‎

Lines changed: 31 additions & 25 deletions
Original file line numberDiff line numberDiff line change
@@ -23,7 +23,7 @@
2323

2424
/*
2525
* @test
26-
* @bug 8356760
26+
* @bug 8356760 8367391
2727
* @library /test/lib /
2828
* @summary Optimize VectorMask.fromLong for all-true/all-false cases
2929
* @modules jdk.incubator.vector
@@ -173,92 +173,98 @@ public static void testMaskFromLongMaskAllDouble() {
173173

174174
@Test
175175
@IR(counts = { IRNode.MASK_ALL, "= 0",
176-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
176+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
177177
applyIfCPUFeatureOr = { "sve2", "true", "avx512", "true", "rvv", "true" })
178178
@IR(counts = { IRNode.REPLICATE_B, "= 0",
179179
IRNode.VECTOR_LONG_TO_MASK, "= 0" },
180180
applyIfCPUFeatureAnd = { "asimd", "true", "sve", "false" })
181181
@IR(counts = { IRNode.REPLICATE_B, "= 0",
182-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
182+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
183183
applyIfCPUFeatureAnd = { "avx2", "true", "avx512", "false" })
184184
public static void testMaskFromLongByte() {
185-
// Test the case where some but not all bits are set.
186-
testMaskFromLong(B_SPECIES, (-1L >>> (64 - B_SPECIES.length()))-1);
185+
// Test cases where some but not all bits are set.
186+
testMaskFromLong(B_SPECIES, (-1L >>> (64 - B_SPECIES.length())) - 1);
187+
testMaskFromLong(B_SPECIES, (-1L >>> (64 - B_SPECIES.length())) >>> 1);
187188
}
188189

189190
@Test
190191
@IR(counts = { IRNode.MASK_ALL, "= 0",
191-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
192+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
192193
applyIfCPUFeatureOr = { "sve2", "true", "avx512", "true", "rvv", "true" })
193194
@IR(counts = { IRNode.REPLICATE_S, "= 0",
194195
IRNode.VECTOR_LONG_TO_MASK, "= 0" },
195196
applyIfCPUFeatureAnd = { "asimd", "true", "sve", "false" })
196197
@IR(counts = { IRNode.REPLICATE_S, "= 0",
197-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
198+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
198199
applyIfCPUFeatureAnd = { "avx2", "true", "avx512", "false" })
199200
public static void testMaskFromLongShort() {
200-
// Test the case where some but not all bits are set.
201-
testMaskFromLong(S_SPECIES, (-1L >>> (64 - S_SPECIES.length()))-1);
201+
// Test cases where some but not all bits are set.
202+
testMaskFromLong(S_SPECIES, (-1L >>> (64 - S_SPECIES.length())) - 1);
203+
testMaskFromLong(S_SPECIES, (-1L >>> (64 - S_SPECIES.length())) >>> 1);
202204
}
203205

204206
@Test
205207
@IR(counts = { IRNode.MASK_ALL, "= 0",
206-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
208+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
207209
applyIfCPUFeatureOr = { "sve2", "true", "avx512", "true", "rvv", "true" })
208210
@IR(counts = { IRNode.REPLICATE_I, "= 0",
209211
IRNode.VECTOR_LONG_TO_MASK, "= 0" },
210212
applyIfCPUFeatureAnd = { "asimd", "true", "sve", "false" })
211213
@IR(counts = { IRNode.REPLICATE_I, "= 0",
212-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
214+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
213215
applyIfCPUFeatureAnd = { "avx2", "true", "avx512", "false" })
214216
public static void testMaskFromLongInt() {
215-
// Test the case where some but not all bits are set.
216-
testMaskFromLong(I_SPECIES, (-1L >>> (64 - I_SPECIES.length()))-1);
217+
// Test cases where some but not all bits are set.
218+
testMaskFromLong(I_SPECIES, (-1L >>> (64 - I_SPECIES.length())) - 1);
219+
testMaskFromLong(I_SPECIES, (-1L >>> (64 - I_SPECIES.length())) >>> 1);
217220
}
218221

219222
@Test
220223
@IR(counts = { IRNode.MASK_ALL, "= 0",
221-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
224+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
222225
applyIfCPUFeatureOr = { "sve2", "true", "avx512", "true", "rvv", "true" })
223226
@IR(counts = { IRNode.REPLICATE_L, "= 0",
224227
IRNode.VECTOR_LONG_TO_MASK, "= 0" },
225228
applyIfCPUFeatureAnd = { "asimd", "true", "sve", "false" })
226229
@IR(counts = { IRNode.REPLICATE_L, "= 0",
227-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
230+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
228231
applyIfCPUFeatureAnd = { "avx2", "true", "avx512", "false" })
229232
public static void testMaskFromLongLong() {
230-
// Test the case where some but not all bits are set.
231-
testMaskFromLong(L_SPECIES, (-1L >>> (64 - L_SPECIES.length()))-1);
233+
// Test cases where some but not all bits are set.
234+
testMaskFromLong(L_SPECIES, (-1L >>> (64 - L_SPECIES.length())) - 1);
235+
testMaskFromLong(L_SPECIES, (-1L >>> (64 - L_SPECIES.length())) >>> 1);
232236
}
233237

234238
@Test
235239
@IR(counts = { IRNode.MASK_ALL, "= 0",
236-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
240+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
237241
applyIfCPUFeatureOr = { "sve2", "true", "avx512", "true", "rvv", "true" })
238242
@IR(counts = { IRNode.REPLICATE_I, "= 0",
239243
IRNode.VECTOR_LONG_TO_MASK, "= 0" },
240244
applyIfCPUFeatureAnd = { "asimd", "true", "sve", "false" })
241245
@IR(counts = { IRNode.REPLICATE_I, "= 0",
242-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
246+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
243247
applyIfCPUFeatureAnd = { "avx2", "true", "avx512", "false" })
244248
public static void testMaskFromLongFloat() {
245-
// Test the case where some but not all bits are set.
246-
testMaskFromLong(F_SPECIES, (-1L >>> (64 - F_SPECIES.length()))-1);
249+
// Test cases where some but not all bits are set.
250+
testMaskFromLong(F_SPECIES, (-1L >>> (64 - F_SPECIES.length())) - 1);
251+
testMaskFromLong(F_SPECIES, (-1L >>> (64 - F_SPECIES.length())) >>> 1);
247252
}
248253

249254
@Test
250255
@IR(counts = { IRNode.MASK_ALL, "= 0",
251-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
256+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
252257
applyIfCPUFeatureOr = { "sve2", "true", "avx512", "true", "rvv", "true" })
253258
@IR(counts = { IRNode.REPLICATE_L, "= 0",
254259
IRNode.VECTOR_LONG_TO_MASK, "= 0" },
255260
applyIfCPUFeatureAnd = { "asimd", "true", "sve", "false" })
256261
@IR(counts = { IRNode.REPLICATE_L, "= 0",
257-
IRNode.VECTOR_LONG_TO_MASK, "> 0" },
262+
IRNode.VECTOR_LONG_TO_MASK, "= 2" },
258263
applyIfCPUFeatureAnd = { "avx2", "true", "avx512", "false" })
259264
public static void testMaskFromLongDouble() {
260-
// Test the case where some but not all bits are set.
261-
testMaskFromLong(D_SPECIES, (-1L >>> (64 - D_SPECIES.length()))-1);
265+
// Test cases where some but not all bits are set.
266+
testMaskFromLong(D_SPECIES, (-1L >>> (64 - D_SPECIES.length())) - 1);
267+
testMaskFromLong(D_SPECIES, (-1L >>> (64 - D_SPECIES.length())) >>> 1);
262268
}
263269

264270
public static void main(String[] args) {

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