tpm_tis_spi: Add small delay after last transfer

Testing the implementation with a Raspberry Pi 2 showed that under some
circumstances its SPI master erroneously releases the CS line before the
transfer is complete, i.e. before the end of the last clock. In this case
the TPM ignores the transfer and misses for example the GO command. The
driver is unable to detect this communication problem and will wait for a
command response that is never going to arrive, timing out eventually.

As a workaround, the small delay ensures that the CS line is held long
enough, even with a faulty SPI master. Other SPI masters are not affected,
except for a negligible performance penalty.

Cc: <[email protected]>
Fixes: 0edbfea ("tpm/tpm_tis_spi: Add support for spi phy")
Signed-off-by: Alexander Steffen <[email protected]>
Signed-off-by: Peter Huewe <[email protected]>
Reviewed-by: Jarkko Sakkinen <[email protected]>
Tested-by: Benoit Houyere <[email protected]>
Signed-off-by: Jarkko Sakkinen <[email protected]>

Author: PeterHuewe

drivers/char/tpm/tpm_tis_spi.c

@@ -111,6 +111,7 @@ static int tpm_tis_spi_transfer(struct tpm_tis_data *data, u32 addr, u16 len,
 
 		spi_xfer.cs_change = 0;
 		spi_xfer.len = transfer_len;
+		spi_xfer.delay_usecs = 5;
 
 		if (direction) {
 			spi_xfer.tx_buf = NULL;