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lines changed Original file line number Diff line number Diff line change @@ -1741,16 +1741,12 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
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.hold_mask = CM_PLLA_HOLDCORE ,
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.fixed_divider = 1 ,
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.flags = CLK_SET_RATE_PARENT ),
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- [BCM2835_PLLA_PER ] = REGISTER_PLL_DIV (
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- SOC_ALL ,
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- .name = "plla_per" ,
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- .source_pll = "plla" ,
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- .cm_reg = CM_PLLA ,
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- .a2w_reg = A2W_PLLA_PER ,
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- .load_mask = CM_PLLA_LOADPER ,
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- .hold_mask = CM_PLLA_HOLDPER ,
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- .fixed_divider = 1 ,
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- .flags = CLK_SET_RATE_PARENT ),
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+
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+ /*
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+ * PLLA_PER is used for gpu clocks. Controlled by firmware, see
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+ * clk-raspberrypi.c.
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+ */
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+
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[BCM2835_PLLA_DSI0 ] = REGISTER_PLL_DIV (
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SOC_ALL ,
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.name = "plla_dsi0" ,
@@ -2051,14 +2047,12 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
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.int_bits = 6 ,
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.frac_bits = 0 ,
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.tcnt_mux = 3 ),
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- [BCM2835_CLOCK_V3D ] = REGISTER_VPU_CLK (
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- SOC_ALL ,
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- .name = "v3d" ,
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- .ctl_reg = CM_V3DCTL ,
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- .div_reg = CM_V3DDIV ,
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- .int_bits = 4 ,
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- .frac_bits = 8 ,
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- .tcnt_mux = 4 ),
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+
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+ /*
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+ * CLOCK_V3D is used for v3d clock. Controlled by firmware, see
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+ * clk-raspberrypi.c.
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+ */
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+
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/*
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* VPU clock. This doesn't have an enable bit, since it drives
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* the bus for everything else, and is special so it doesn't need
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