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clk-bcm2835: Remove VEC clock support
Signed-off-by: Dom Cobley <[email protected]>
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drivers/clk/bcm/clk-bcm2835.c

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Original file line numberDiff line numberDiff line change
@@ -2214,21 +2214,6 @@ static const struct bcm2835_clk_desc clk_desc_array[] = {
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.frac_bits = 12,
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.tcnt_mux = 28),
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/* TV encoder clock. Only operating frequency is 108Mhz. */
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[BCM2835_CLOCK_VEC] = REGISTER_PER_CLK(
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SOC_ALL,
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.name = "vec",
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.ctl_reg = CM_VECCTL,
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.div_reg = CM_VECDIV,
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.int_bits = 4,
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.frac_bits = 0,
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/*
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* Allow rate change propagation only on PLLH_AUX which is
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* assigned index 7 in the parent array.
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*/
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.set_rate_parent = BIT(7),
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.tcnt_mux = 29),
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/* dsi clocks */
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[BCM2835_CLOCK_DSI0E] = REGISTER_PER_CLK(
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SOC_ALL,

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