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FlyGoatgregkh
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irqchip/mips-gic: Use raw spinlock for gic_lock
commit 3d6a0e4 upstream. Since we may hold gic_lock in hardirq context, use raw spinlock makes more sense given that it is for low-level interrupt handling routine and the critical section is small. Fixes BUG: [ 0.426106] ============================= [ 0.426257] [ BUG: Invalid wait context ] [ 0.426422] 6.3.0-rc7-next-20230421-dirty #54 Not tainted [ 0.426638] ----------------------------- [ 0.426766] swapper/0/1 is trying to lock: [ 0.426954] ffffffff8104e7b8 (gic_lock){....}-{3:3}, at: gic_set_type+0x30/08 Fixes: 95150ae ("irqchip: mips-gic: Implement irq_set_type callback") Cc: [email protected] Signed-off-by: Jiaxun Yang <[email protected]> Reviewed-by: Serge Semin <[email protected]> Tested-by: Serge Semin <[email protected]> Signed-off-by: Marc Zyngier <[email protected]> Link: https://lore.kernel.org/r/[email protected] Signed-off-by: Greg Kroah-Hartman <[email protected]>
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drivers/irqchip/irq-mips-gic.c

Lines changed: 15 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -50,7 +50,7 @@ void __iomem *mips_gic_base;
5050

5151
static DEFINE_PER_CPU_READ_MOSTLY(unsigned long[GIC_MAX_LONGS], pcpu_masks);
5252

53-
static DEFINE_SPINLOCK(gic_lock);
53+
static DEFINE_RAW_SPINLOCK(gic_lock);
5454
static struct irq_domain *gic_irq_domain;
5555
static int gic_shared_intrs;
5656
static unsigned int gic_cpu_pin;
@@ -211,7 +211,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
211211

212212
irq = GIC_HWIRQ_TO_SHARED(d->hwirq);
213213

214-
spin_lock_irqsave(&gic_lock, flags);
214+
raw_spin_lock_irqsave(&gic_lock, flags);
215215
switch (type & IRQ_TYPE_SENSE_MASK) {
216216
case IRQ_TYPE_EDGE_FALLING:
217217
pol = GIC_POL_FALLING_EDGE;
@@ -251,7 +251,7 @@ static int gic_set_type(struct irq_data *d, unsigned int type)
251251
else
252252
irq_set_chip_handler_name_locked(d, &gic_level_irq_controller,
253253
handle_level_irq, NULL);
254-
spin_unlock_irqrestore(&gic_lock, flags);
254+
raw_spin_unlock_irqrestore(&gic_lock, flags);
255255

256256
return 0;
257257
}
@@ -269,7 +269,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
269269
return -EINVAL;
270270

271271
/* Assumption : cpumask refers to a single CPU */
272-
spin_lock_irqsave(&gic_lock, flags);
272+
raw_spin_lock_irqsave(&gic_lock, flags);
273273

274274
/* Re-route this IRQ */
275275
write_gic_map_vp(irq, BIT(mips_cm_vp_id(cpu)));
@@ -280,7 +280,7 @@ static int gic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
280280
set_bit(irq, per_cpu_ptr(pcpu_masks, cpu));
281281

282282
irq_data_update_effective_affinity(d, cpumask_of(cpu));
283-
spin_unlock_irqrestore(&gic_lock, flags);
283+
raw_spin_unlock_irqrestore(&gic_lock, flags);
284284

285285
return IRQ_SET_MASK_OK;
286286
}
@@ -358,12 +358,12 @@ static void gic_mask_local_irq_all_vpes(struct irq_data *d)
358358
cd = irq_data_get_irq_chip_data(d);
359359
cd->mask = false;
360360

361-
spin_lock_irqsave(&gic_lock, flags);
361+
raw_spin_lock_irqsave(&gic_lock, flags);
362362
for_each_online_cpu(cpu) {
363363
write_gic_vl_other(mips_cm_vp_id(cpu));
364364
write_gic_vo_rmask(BIT(intr));
365365
}
366-
spin_unlock_irqrestore(&gic_lock, flags);
366+
raw_spin_unlock_irqrestore(&gic_lock, flags);
367367
}
368368

369369
static void gic_unmask_local_irq_all_vpes(struct irq_data *d)
@@ -376,12 +376,12 @@ static void gic_unmask_local_irq_all_vpes(struct irq_data *d)
376376
cd = irq_data_get_irq_chip_data(d);
377377
cd->mask = true;
378378

379-
spin_lock_irqsave(&gic_lock, flags);
379+
raw_spin_lock_irqsave(&gic_lock, flags);
380380
for_each_online_cpu(cpu) {
381381
write_gic_vl_other(mips_cm_vp_id(cpu));
382382
write_gic_vo_smask(BIT(intr));
383383
}
384-
spin_unlock_irqrestore(&gic_lock, flags);
384+
raw_spin_unlock_irqrestore(&gic_lock, flags);
385385
}
386386

387387
static void gic_all_vpes_irq_cpu_online(void)
@@ -394,7 +394,7 @@ static void gic_all_vpes_irq_cpu_online(void)
394394
unsigned long flags;
395395
int i;
396396

397-
spin_lock_irqsave(&gic_lock, flags);
397+
raw_spin_lock_irqsave(&gic_lock, flags);
398398

399399
for (i = 0; i < ARRAY_SIZE(local_intrs); i++) {
400400
unsigned int intr = local_intrs[i];
@@ -408,7 +408,7 @@ static void gic_all_vpes_irq_cpu_online(void)
408408
write_gic_vl_smask(BIT(intr));
409409
}
410410

411-
spin_unlock_irqrestore(&gic_lock, flags);
411+
raw_spin_unlock_irqrestore(&gic_lock, flags);
412412
}
413413

414414
static struct irq_chip gic_all_vpes_local_irq_controller = {
@@ -438,11 +438,11 @@ static int gic_shared_irq_domain_map(struct irq_domain *d, unsigned int virq,
438438

439439
data = irq_get_irq_data(virq);
440440

441-
spin_lock_irqsave(&gic_lock, flags);
441+
raw_spin_lock_irqsave(&gic_lock, flags);
442442
write_gic_map_pin(intr, GIC_MAP_PIN_MAP_TO_PIN | gic_cpu_pin);
443443
write_gic_map_vp(intr, BIT(mips_cm_vp_id(cpu)));
444444
irq_data_update_effective_affinity(data, cpumask_of(cpu));
445-
spin_unlock_irqrestore(&gic_lock, flags);
445+
raw_spin_unlock_irqrestore(&gic_lock, flags);
446446

447447
return 0;
448448
}
@@ -537,12 +537,12 @@ static int gic_irq_domain_map(struct irq_domain *d, unsigned int virq,
537537
if (!gic_local_irq_is_routable(intr))
538538
return -EPERM;
539539

540-
spin_lock_irqsave(&gic_lock, flags);
540+
raw_spin_lock_irqsave(&gic_lock, flags);
541541
for_each_online_cpu(cpu) {
542542
write_gic_vl_other(mips_cm_vp_id(cpu));
543543
write_gic_vo_map(mips_gic_vx_map_reg(intr), map);
544544
}
545-
spin_unlock_irqrestore(&gic_lock, flags);
545+
raw_spin_unlock_irqrestore(&gic_lock, flags);
546546

547547
return 0;
548548
}

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