diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig index 0c95d5940c85be..21bf93687bf0c7 100644 --- a/arch/arm/Kconfig +++ b/arch/arm/Kconfig @@ -330,6 +330,7 @@ config ARCH_BCM2708 select ARM_ERRATA_411920 select MACH_BCM2708 select MULTI_IRQ_HANDLER + select SPARSE_IRQ select VC4 select FIQ help @@ -350,6 +351,10 @@ config ARCH_BCM2709 select MACH_BCM2709 select VC4 select FIQ + select USE_OF + select ARCH_REQUIRE_GPIOLIB + select PINCTRL + select PINCTRL_BCM2835 help This enables support for Broadcom BCM2709 boards. diff --git a/arch/arm/Kconfig.debug b/arch/arm/Kconfig.debug index 87c545187e767f..5d7ed75cda3588 100644 --- a/arch/arm/Kconfig.debug +++ b/arch/arm/Kconfig.debug @@ -1248,8 +1248,8 @@ choice and will be soon removed. config DEBUG_BCM2708_UART0 - bool "Broadcom BCM2708 UART0 (PL011)" - depends on MACH_BCM2708 + bool "Broadcom BCM270X UART0 (PL011)" + depends on ARCH_BCM2708 || ARCH_BCM2709 help Say Y here if you want the debug print routines to direct their output to UART 0. The port must have been initialised diff --git a/arch/arm/boot/dts/Makefile b/arch/arm/boot/dts/Makefile index 68b2c7409de00c..c84ab7d14faf41 100644 --- a/arch/arm/boot/dts/Makefile +++ b/arch/arm/boot/dts/Makefile @@ -1,16 +1,16 @@ ifeq ($(CONFIG_OF),y) -dtb-$(CONFIG_BCM2708_DT) += bcm2708-rpi-b.dtb -dtb-$(CONFIG_BCM2708_DT) += bcm2708-rpi-b-plus.dtb -dtb-$(CONFIG_BCM2708_DT) += bcm2708-rpi-cm.dtb +dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rpi-b.dtb +dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rpi-b-plus.dtb +dtb-$(CONFIG_ARCH_BCM2708) += bcm2708-rpi-cm.dtb dtb-$(CONFIG_ARCH_BCM2835) += bcm2835-rpi-cm.dtb -dtb-$(CONFIG_BCM2709_DT) += bcm2709-rpi-2-b.dtb +dtb-$(CONFIG_ARCH_BCM2709) += bcm2709-rpi-2-b.dtb # Raspberry Pi -ifeq ($(CONFIG_BCM2708_DT),y) +ifeq ($(CONFIG_ARCH_BCM2708),y) RPI_DT_OVERLAYS=y endif -ifeq ($(CONFIG_BCM2709_DT),y) +ifeq ($(CONFIG_ARCH_BCM2709),y) RPI_DT_OVERLAYS=y endif ifeq ($(CONFIG_ARCH_BCM2835),y) diff --git a/arch/arm/boot/dts/overlays/Makefile b/arch/arm/boot/dts/overlays/Makefile index 2236c8553f6373..fb7ac496e7a179 100644 --- a/arch/arm/boot/dts/overlays/Makefile +++ b/arch/arm/boot/dts/overlays/Makefile @@ -2,10 +2,10 @@ ifeq ($(CONFIG_OF),y) # Overlays for the Raspberry Pi platform -ifeq ($(CONFIG_BCM2708_DT),y) +ifeq ($(CONFIG_ARCH_BCM2708),y) RPI_DT_OVERLAYS=y endif -ifeq ($(CONFIG_BCM2709_DT),y) +ifeq ($(CONFIG_ARCH_BCM2709),y) RPI_DT_OVERLAYS=y endif ifeq ($(CONFIG_ARCH_BCM2835),y) @@ -49,8 +49,6 @@ dtb-$(RPI_DT_OVERLAYS) += sdio-overlay.dtb dtb-$(RPI_DT_OVERLAYS) += smi-dev-overlay.dtb dtb-$(RPI_DT_OVERLAYS) += smi-nand-overlay.dtb dtb-$(RPI_DT_OVERLAYS) += smi-overlay.dtb -dtb-$(RPI_DT_OVERLAYS) += spi-bcm2708-overlay.dtb -dtb-$(RPI_DT_OVERLAYS) += spi-bcm2835-overlay.dtb dtb-$(RPI_DT_OVERLAYS) += spi-gpio35-39-overlay.dtb dtb-$(RPI_DT_OVERLAYS) += tinylcd35-overlay.dtb dtb-$(RPI_DT_OVERLAYS) += uart1-overlay.dtb diff --git a/arch/arm/boot/dts/overlays/README b/arch/arm/boot/dts/overlays/README index dd1dad259ade5b..b42d94bf54c6d6 100644 --- a/arch/arm/boot/dts/overlays/README +++ b/arch/arm/boot/dts/overlays/README @@ -554,18 +554,6 @@ Load: dtoverlay=smi-nand Params: -Name: spi-bcm2708 -Info: Selects the bcm2708-spi SPI driver -Load: dtoverlay=spi-bcm2708 -Params: - - -Name: spi-bcm2835 -Info: Selects the bcm2835-spi SPI driver -Load: dtoverlay=spi-bcm2835 -Params: - - Name: spi-gpio35-39 Info: move SPI function block to GPIO 35 to 39 Load: dtoverlay=spi-gpio35-39 diff --git a/arch/arm/boot/dts/overlays/spi-bcm2708-overlay.dts b/arch/arm/boot/dts/overlays/spi-bcm2708-overlay.dts deleted file mode 100644 index 688163ea4e74d0..00000000000000 --- a/arch/arm/boot/dts/overlays/spi-bcm2708-overlay.dts +++ /dev/null @@ -1,25 +0,0 @@ -/* - * Device tree overlay to use spi-bcm2708 - */ - -/dts-v1/; -/plugin/; - -/ { - compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; - /* setting up compatiblity to allow loading the spi-bcm2835 driver */ - fragment@0 { - target = <&spi0>; - __overlay__ { - status = "okay"; - compatible = "brcm,bcm2708-spi"; - }; - }; - - fragment@1 { - target = <&spi0_cs_pins>; - __overlay__ { - brcm,function = <4>; /* alt0 */ - }; - }; -}; diff --git a/arch/arm/boot/dts/overlays/spi-bcm2835-overlay.dts b/arch/arm/boot/dts/overlays/spi-bcm2835-overlay.dts deleted file mode 100644 index fc1e39b9f10372..00000000000000 --- a/arch/arm/boot/dts/overlays/spi-bcm2835-overlay.dts +++ /dev/null @@ -1,18 +0,0 @@ -/* - * Device tree overlay for spi-bcm2835 - */ - -/dts-v1/; -/plugin/; - -/ { - compatible = "brcm,bcm2835", "brcm,bcm2836", "brcm,bcm2708", "brcm,bcm2709"; - /* setting up compatiblity to allow loading the spi-bcm2835 driver */ - fragment@0 { - target = <&spi0>; - __overlay__ { - status = "okay"; - compatible = "brcm,bcm2835-spi"; - }; - }; -}; diff --git a/arch/arm/configs/bcm2709_defconfig b/arch/arm/configs/bcm2709_defconfig index cc1ae75642ea33..52fe76d44f38f8 100644 --- a/arch/arm/configs/bcm2709_defconfig +++ b/arch/arm/configs/bcm2709_defconfig @@ -39,7 +39,6 @@ CONFIG_PARTITION_ADVANCED=y CONFIG_MAC_PARTITION=y CONFIG_CFQ_GROUP_IOSCHED=y CONFIG_ARCH_BCM2709=y -CONFIG_BCM2709_DT=y # CONFIG_CACHE_L2X0 is not set CONFIG_SMP=y CONFIG_HAVE_ARM_ARCH_TIMER=y @@ -55,6 +54,7 @@ CONFIG_ZSMALLOC=m CONFIG_PGTABLE_MAPPING=y CONFIG_UACCESS_WITH_MEMCPY=y CONFIG_SECCOMP=y +# CONFIG_ATAGS is not set CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" @@ -584,14 +584,12 @@ CONFIG_SERIAL_OF_PLATFORM=y CONFIG_TTY_PRINTK=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_BCM2835=m -CONFIG_HW_RANDOM_BCM2708=m CONFIG_RAW_DRIVER=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=m CONFIG_I2C_BCM2708=m CONFIG_SPI=y CONFIG_SPI_BCM2835=m -CONFIG_SPI_BCM2708=m CONFIG_SPI_SPIDEV=y CONFIG_PPS=m CONFIG_PPS_CLIENT_LDISC=m @@ -626,7 +624,6 @@ CONFIG_SENSORS_SHTC1=m CONFIG_THERMAL=y CONFIG_THERMAL_BCM2835=y CONFIG_WATCHDOG=y -CONFIG_BCM2708_WDT=m CONFIG_BCM2835_WDT=m CONFIG_UCB1400_CORE=m CONFIG_MFD_STMPE=y @@ -831,7 +828,6 @@ CONFIG_SND_USB_CAIAQ_INPUT=y CONFIG_SND_USB_6FIRE=m CONFIG_SND_SOC=m CONFIG_SND_BCM2835_SOC_I2S=m -CONFIG_SND_BCM2708_SOC_I2S=m CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m diff --git a/arch/arm/configs/bcmrpi_defconfig b/arch/arm/configs/bcmrpi_defconfig index 40e1b14093c3e9..42f2a8ecfc287b 100644 --- a/arch/arm/configs/bcmrpi_defconfig +++ b/arch/arm/configs/bcmrpi_defconfig @@ -38,7 +38,6 @@ CONFIG_PARTITION_ADVANCED=y CONFIG_MAC_PARTITION=y CONFIG_CFQ_GROUP_IOSCHED=y CONFIG_ARCH_BCM2708=y -CONFIG_BCM2708_DT=y CONFIG_PREEMPT=y CONFIG_AEABI=y CONFIG_OABI_COMPAT=y @@ -50,6 +49,7 @@ CONFIG_ZSMALLOC=m CONFIG_PGTABLE_MAPPING=y CONFIG_UACCESS_WITH_MEMCPY=y CONFIG_SECCOMP=y +# CONFIG_ATAGS is not set CONFIG_ZBOOT_ROM_TEXT=0x0 CONFIG_ZBOOT_ROM_BSS=0x0 CONFIG_CMDLINE="console=ttyAMA0,115200 kgdboc=ttyAMA0,115200 root=/dev/mmcblk0p2 rootfstype=ext4 rootwait" @@ -577,14 +577,12 @@ CONFIG_SERIAL_OF_PLATFORM=y CONFIG_TTY_PRINTK=y CONFIG_HW_RANDOM=y CONFIG_HW_RANDOM_BCM2835=m -CONFIG_HW_RANDOM_BCM2708=m CONFIG_RAW_DRIVER=y CONFIG_I2C=y CONFIG_I2C_CHARDEV=m CONFIG_I2C_BCM2708=m CONFIG_SPI=y CONFIG_SPI_BCM2835=m -CONFIG_SPI_BCM2708=m CONFIG_SPI_SPIDEV=y CONFIG_PPS=m CONFIG_PPS_CLIENT_LDISC=m @@ -619,7 +617,6 @@ CONFIG_SENSORS_SHTC1=m CONFIG_THERMAL=y CONFIG_THERMAL_BCM2835=y CONFIG_WATCHDOG=y -CONFIG_BCM2708_WDT=m CONFIG_BCM2835_WDT=m CONFIG_UCB1400_CORE=m CONFIG_MFD_STMPE=y @@ -824,7 +821,6 @@ CONFIG_SND_USB_CAIAQ_INPUT=y CONFIG_SND_USB_6FIRE=m CONFIG_SND_SOC=m CONFIG_SND_BCM2835_SOC_I2S=m -CONFIG_SND_BCM2708_SOC_I2S=m CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC=m CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS=m CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI=m diff --git a/arch/arm/mach-bcm2708/Kconfig b/arch/arm/mach-bcm2708/Kconfig index 68e3706f3f3e46..6eabe844767f7f 100644 --- a/arch/arm/mach-bcm2708/Kconfig +++ b/arch/arm/mach-bcm2708/Kconfig @@ -6,27 +6,12 @@ config MACH_BCM2708 select NEED_MACH_MEMORY_H select NEED_MACH_IO_H select CPU_V6 - help - Include support for the Broadcom(R) BCM2708 platform. - -config BCM2708_DT - bool "BCM2708 Device Tree support" - depends on MACH_BCM2708 - default n select USE_OF select ARCH_REQUIRE_GPIOLIB select PINCTRL select PINCTRL_BCM2835 help - Enable Device Tree support for BCM2708 - -config BCM2708_GPIO - bool "BCM2708 gpio support" - depends on MACH_BCM2708 - select ARCH_REQUIRE_GPIOLIB - default y - help - Include support for the Broadcom(R) BCM2708 gpio. + Include support for the Broadcom(R) BCM2708 platform. config BCM2708_NOL2CACHE bool "Videocore L2 cache disable" @@ -35,11 +20,4 @@ config BCM2708_NOL2CACHE help Do not allow ARM to use GPU's L2 cache. Requires disable_l2cache in config.txt. -config BCM2708_SPIDEV - bool "Bind spidev to SPI0 master" - depends on MACH_BCM2708 - depends on SPI - default y - help - Binds spidev driver to the SPI0 master endmenu diff --git a/arch/arm/mach-bcm2708/Makefile b/arch/arm/mach-bcm2708/Makefile index 51209940c8d8c6..3da1a1b4ea1fb0 100644 --- a/arch/arm/mach-bcm2708/Makefile +++ b/arch/arm/mach-bcm2708/Makefile @@ -2,5 +2,4 @@ # Makefile for the linux kernel. # -obj-$(CONFIG_MACH_BCM2708) += bcm2708.o armctrl.o -obj-$(CONFIG_BCM2708_GPIO) += bcm2708_gpio.o +obj-$(CONFIG_MACH_BCM2708) += bcm2708.o diff --git a/arch/arm/mach-bcm2708/armctrl.c b/arch/arm/mach-bcm2708/armctrl.c deleted file mode 100644 index f9c59d82807574..00000000000000 --- a/arch/arm/mach-bcm2708/armctrl.c +++ /dev/null @@ -1,383 +0,0 @@ -/* - * linux/arch/arm/mach-bcm2708/armctrl.c - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#include -#include -#include -#include -#include -#include -#include -#include - -#include -#include -#include -#include "armctrl.h" - -/* Mask out shortcut interrupts where they also appear in the regular bank */ -#define BANK0_HWIRQ 0x001ffcff -#define BANK1_HWIRQ BIT(8) -#define BANK2_HWIRQ BIT(9) -#define BANK0_VALID_MASK \ - (BANK0_HWIRQ + BANK1_HWIRQ + BANK2_HWIRQ) -#define BANK1_VALID_MASK \ - (~(BIT(7) | BIT(9) | BIT(10) | BIT(18) | BIT(19))) -#define BANK2_VALID_MASK \ - (~(BIT(21) | BIT(22) | BIT(23) | BIT(24) | BIT(25) | BIT(30))) - -/* For support of kernels >= 3.0 assume only one VIC for now*/ -static unsigned int remap_irqs[(INTERRUPT_ARASANSDIO + 1) - INTERRUPT_JPEG] = { - INTERRUPT_VC_JPEG, - INTERRUPT_VC_USB, - INTERRUPT_VC_3D, - INTERRUPT_VC_DMA2, - INTERRUPT_VC_DMA3, - INTERRUPT_VC_I2C, - INTERRUPT_VC_SPI, - INTERRUPT_VC_I2SPCM, - INTERRUPT_VC_SDIO, - INTERRUPT_VC_UART, - INTERRUPT_VC_ARASANSDIO -}; - -static void armctrl_mask_irq(struct irq_data *d) -{ - static const unsigned int disables[4] = { - ARM_IRQ_DIBL1, - ARM_IRQ_DIBL2, - ARM_IRQ_DIBL3, - 0 - }; - - if (d->irq >= FIQ_START) { - writel(0, __io_address(ARM_IRQ_FAST)); - } else { - unsigned int data = (unsigned int)irq_get_chip_data(d->irq); - writel(1 << (data & 0x1f), __io_address(disables[(data >> 5) & 0x3])); - } -} - -static void armctrl_unmask_irq(struct irq_data *d) -{ - static const unsigned int enables[4] = { - ARM_IRQ_ENBL1, - ARM_IRQ_ENBL2, - ARM_IRQ_ENBL3, - 0 - }; - - if (d->irq >= FIQ_START) { - unsigned int data = - (unsigned int)irq_get_chip_data(d->irq) - FIQ_START; - writel(0x80 | data, __io_address(ARM_IRQ_FAST)); - } else { - unsigned int data = (unsigned int)irq_get_chip_data(d->irq); - writel(1 << (data & 0x1f), __io_address(enables[(data >> 5) & 0x3])); - } -} - -#ifdef CONFIG_OF - -#define NR_IRQS_BANK0 21 -#define NR_BANKS 3 -#define IRQS_PER_BANK 32 - -/* from drivers/irqchip/irq-bcm2835.c */ -static int armctrl_xlate(struct irq_domain *d, struct device_node *ctrlr, - const u32 *intspec, unsigned int intsize, - unsigned long *out_hwirq, unsigned int *out_type) -{ - if (WARN_ON(intsize != 2)) - return -EINVAL; - - if (WARN_ON(intspec[0] >= NR_BANKS)) - return -EINVAL; - - if (WARN_ON(intspec[1] >= IRQS_PER_BANK)) - return -EINVAL; - - if (WARN_ON(intspec[0] == 0 && intspec[1] >= NR_IRQS_BANK0)) - return -EINVAL; - - if (intspec[0] == 0) - *out_hwirq = ARM_IRQ0_BASE + intspec[1]; - else if (intspec[0] == 1) - *out_hwirq = ARM_IRQ1_BASE + intspec[1]; - else - *out_hwirq = ARM_IRQ2_BASE + intspec[1]; - - /* reverse remap_irqs[] */ - switch (*out_hwirq) { - case INTERRUPT_VC_JPEG: - *out_hwirq = INTERRUPT_JPEG; - break; - case INTERRUPT_VC_USB: - *out_hwirq = INTERRUPT_USB; - break; - case INTERRUPT_VC_3D: - *out_hwirq = INTERRUPT_3D; - break; - case INTERRUPT_VC_DMA2: - *out_hwirq = INTERRUPT_DMA2; - break; - case INTERRUPT_VC_DMA3: - *out_hwirq = INTERRUPT_DMA3; - break; - case INTERRUPT_VC_I2C: - *out_hwirq = INTERRUPT_I2C; - break; - case INTERRUPT_VC_SPI: - *out_hwirq = INTERRUPT_SPI; - break; - case INTERRUPT_VC_I2SPCM: - *out_hwirq = INTERRUPT_I2SPCM; - break; - case INTERRUPT_VC_SDIO: - *out_hwirq = INTERRUPT_SDIO; - break; - case INTERRUPT_VC_UART: - *out_hwirq = INTERRUPT_UART; - break; - case INTERRUPT_VC_ARASANSDIO: - *out_hwirq = INTERRUPT_ARASANSDIO; - break; - } - - *out_type = IRQ_TYPE_NONE; - return 0; -} - -static struct irq_domain_ops armctrl_ops = { - .xlate = armctrl_xlate -}; - -void __init armctrl_dt_init(void) -{ - struct device_node *np; - struct irq_domain *domain; - - np = of_find_compatible_node(NULL, NULL, "brcm,bcm2708-armctrl-ic"); - if (!np) - return; - - domain = irq_domain_add_legacy(np, BCM2708_ALLOC_IRQS, - IRQ_ARMCTRL_START, 0, - &armctrl_ops, NULL); - WARN_ON(!domain); -} -#else -void __init armctrl_dt_init(void) { } -#endif /* CONFIG_OF */ - -#if defined(CONFIG_PM) - -/* for kernels 3.xx use the new syscore_ops apis but for older kernels use the sys dev class */ - -/* Static defines - * struct armctrl_device - VIC PM device (< 3.xx) - * @sysdev: The system device which is registered. (< 3.xx) - * @irq: The IRQ number for the base of the VIC. - * @base: The register base for the VIC. - * @resume_sources: A bitmask of interrupts for resume. - * @resume_irqs: The IRQs enabled for resume. - * @int_select: Save for VIC_INT_SELECT. - * @int_enable: Save for VIC_INT_ENABLE. - * @soft_int: Save for VIC_INT_SOFT. - * @protect: Save for VIC_PROTECT. - */ -struct armctrl_info { - void __iomem *base; - int irq; - u32 resume_sources; - u32 resume_irqs; - u32 int_select; - u32 int_enable; - u32 soft_int; - u32 protect; -} armctrl; - -static int armctrl_suspend(void) -{ - return 0; -} - -static void armctrl_resume(void) -{ - return; -} - -/** - * armctrl_pm_register - Register a VIC for later power management control - * @base: The base address of the VIC. - * @irq: The base IRQ for the VIC. - * @resume_sources: bitmask of interrupts allowed for resume sources. - * - * For older kernels (< 3.xx) do - - * Register the VIC with the system device tree so that it can be notified - * of suspend and resume requests and ensure that the correct actions are - * taken to re-instate the settings on resume. - */ -static void __init armctrl_pm_register(void __iomem * base, unsigned int irq, - u32 resume_sources) -{ - armctrl.base = base; - armctrl.resume_sources = resume_sources; - armctrl.irq = irq; -} - -static int armctrl_set_wake(struct irq_data *d, unsigned int on) -{ - unsigned int off = d->irq & 31; - u32 bit = 1 << off; - - if (!(bit & armctrl.resume_sources)) - return -EINVAL; - - if (on) - armctrl.resume_irqs |= bit; - else - armctrl.resume_irqs &= ~bit; - - return 0; -} - -#else -static inline void armctrl_pm_register(void __iomem * base, unsigned int irq, - u32 arg1) -{ -} - -#define armctrl_suspend NULL -#define armctrl_resume NULL -#define armctrl_set_wake NULL -#endif /* CONFIG_PM */ - -static struct syscore_ops armctrl_syscore_ops = { - .suspend = armctrl_suspend, - .resume = armctrl_resume, -}; - -/** - * armctrl_syscore_init - initicall to register VIC pm functions - * - * This is called via late_initcall() to register - * the resources for the VICs due to the early - * nature of the VIC's registration. -*/ -static int __init armctrl_syscore_init(void) -{ - register_syscore_ops(&armctrl_syscore_ops); - return 0; -} - -late_initcall(armctrl_syscore_init); - -static struct irq_chip armctrl_chip = { - .name = "ARMCTRL", - .irq_ack = NULL, - .irq_mask = armctrl_mask_irq, - .irq_unmask = armctrl_unmask_irq, - .irq_set_wake = armctrl_set_wake, -}; - -#ifdef CONFIG_MULTI_IRQ_HANDLER - -static void __exception_irq_entry armctrl_handle_irq( - struct pt_regs *regs) -{ - u32 stat; - - while ((stat = readl_relaxed(__io_address(ARM_IRQ_PEND0)) & - BANK0_VALID_MASK)) { - u32 stat2; - u32 irq; - - if (stat & BANK0_HWIRQ) { - irq = ARM_IRQ0_BASE + ffs(stat & BANK0_HWIRQ) - 1; - } else if (stat & BANK1_HWIRQ) { - stat2 = readl_relaxed(__io_address(ARM_IRQ_PEND1)) & - BANK1_VALID_MASK; - if (stat2) - irq = ARM_IRQ1_BASE + - ffs(stat2 & BANK1_VALID_MASK) - 1; - else - continue; - } else if (stat & BANK2_HWIRQ) { - stat2 = readl_relaxed(__io_address(ARM_IRQ_PEND2)) & - BANK2_VALID_MASK; - if (stat2) - irq = ARM_IRQ2_BASE + - ffs(stat2 & BANK2_VALID_MASK) - 1; - else - continue; - } else { - BUG(); - } - - handle_IRQ(irq, regs); - } -} - -/* This function forces the interrupt numbers to be allocated sequentially, - * instead of with gaps due to the sparse BANK0, to make the offset from - * IRQs and FIQs constant (and equal to FIQ_START). - */ -unsigned int arch_dynirq_lower_bound(unsigned int from) -{ - if (from < 24) - return from + 24; - else if (from >= 104) - return from - 24; - return from; -} - -#endif - -/** - * armctrl_init - initialise a vectored interrupt controller - * @base: iomem base address - * @irq_start: starting interrupt number, must be muliple of 32 - * @armctrl_sources: bitmask of interrupt sources to allow - * @resume_sources: bitmask of interrupt sources to allow for resume - */ -int __init armctrl_init(void __iomem * base, unsigned int irq_start, - u32 armctrl_sources, u32 resume_sources) -{ - unsigned int irq; - - for (irq = 0; irq < BCM2708_ALLOC_IRQS; irq++) { - unsigned int data = irq; - if (irq >= INTERRUPT_JPEG && irq <= INTERRUPT_ARASANSDIO) - data = remap_irqs[irq - INTERRUPT_JPEG]; - - irq_set_chip(irq, &armctrl_chip); - irq_set_chip_data(irq, (void *)data); - irq_set_handler(irq, handle_level_irq); - irq_set_probe(irq); - } - -#ifdef CONFIG_MULTI_IRQ_HANDLER - set_handle_irq(armctrl_handle_irq); -#endif - armctrl_pm_register(base, irq_start, resume_sources); - init_FIQ(FIQ_START); - armctrl_dt_init(); - return 0; -} diff --git a/arch/arm/mach-bcm2708/armctrl.h b/arch/arm/mach-bcm2708/armctrl.h deleted file mode 100644 index 0aa916ef6e414b..00000000000000 --- a/arch/arm/mach-bcm2708/armctrl.h +++ /dev/null @@ -1,27 +0,0 @@ -/* - * linux/arch/arm/mach-bcm2708/armctrl.h - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __BCM2708_ARMCTRL_H -#define __BCM2708_ARMCTRL_H - -extern int __init armctrl_init(void __iomem * base, unsigned int irq_start, - u32 armctrl_sources, u32 resume_sources); - -#endif diff --git a/arch/arm/mach-bcm2708/bcm2708.c b/arch/arm/mach-bcm2708/bcm2708.c index df8cd0b0bf2b09..280628ba8907d2 100644 --- a/arch/arm/mach-bcm2708/bcm2708.c +++ b/arch/arm/mach-bcm2708/bcm2708.c @@ -19,54 +19,17 @@ */ #include -#include #include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include #include #include -#include -#include -#include -#include - -#include -#include #include -#include -#include -#include #include -#include - #include -#include -#include -#include #include -#include #include -#include - -#include "bcm2708.h" -#include "armctrl.h" - -#ifdef CONFIG_BCM_VC_CMA #include -#endif - /* Effectively we have an IOMMU (ARM<->VideoCore map) that is set up to * give us IO access only to 64Mbytes of physical memory (26 bits). We could @@ -78,35 +41,10 @@ * physical addresses onto VideoCore memory then the use of 32-bits would be * more legitimate. */ -#define DMA_MASK_BITS_COMMON 32 - -// use GPIO 4 for the one-wire GPIO pin, if enabled -#define W1_GPIO 4 -// ensure one-wire GPIO pullup is disabled by default -#define W1_PULLUP -1 /* command line parameters */ static unsigned boardrev, serial; -static unsigned uart_clock = UART0_CLOCK; -static unsigned disk_led_gpio = 16; -static unsigned disk_led_active_low = 1; static unsigned reboot_part = 0; -static unsigned w1_gpio_pin = W1_GPIO; -static unsigned w1_gpio_pullup = W1_PULLUP; -static bool vc_i2c_override = false; -static int pps_gpio_pin = -1; - -static unsigned use_dt = 0; - -static void __init bcm2708_init_led(void); - -void __init bcm2708_init_irq(void) -{ - if (of_have_populated_dt()) - irqchip_init(); - else - armctrl_init(__io_address(ARMCTRL_IC_BASE), 0, 0, 0); -} static struct map_desc bcm2708_io_desc[] __initdata = { { @@ -161,596 +99,6 @@ void __init bcm2708_map_io(void) iotable_init(bcm2708_io_desc, ARRAY_SIZE(bcm2708_io_desc)); } -/* The STC is a free running counter that increments at the rate of 1MHz */ -#define STC_FREQ_HZ 1000000 - -static inline uint32_t timer_read(void) -{ - /* STC: a free running counter that increments at the rate of 1MHz */ - return readl(__io_address(ST_BASE + 0x04)); -} - -static unsigned long bcm2708_read_current_timer(void) -{ - return timer_read(); -} - -static u64 notrace bcm2708_read_sched_clock(void) -{ - return timer_read(); -} - -static cycle_t clksrc_read(struct clocksource *cs) -{ - return timer_read(); -} - -static struct clocksource clocksource_stc = { - .name = "stc", - .rating = 300, - .read = clksrc_read, - .mask = CLOCKSOURCE_MASK(32), - .flags = CLOCK_SOURCE_IS_CONTINUOUS, -}; - -unsigned long frc_clock_ticks32(void) -{ - return timer_read(); -} - -static void __init bcm2708_clocksource_init(void) -{ - if (clocksource_register_hz(&clocksource_stc, STC_FREQ_HZ)) { - printk(KERN_ERR "timer: failed to initialize clock " - "source %s\n", clocksource_stc.name); - } -} - -struct clk __init *bcm2708_clk_register(const char *name, unsigned long fixed_rate) -{ - struct clk *clk; - - clk = clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, - fixed_rate); - if (IS_ERR(clk)) - pr_err("%s not registered\n", name); - - return clk; -} - -void __init bcm2708_register_clkdev(struct clk *clk, const char *name) -{ - int ret; - - ret = clk_register_clkdev(clk, NULL, name); - if (ret) - pr_err("%s alias not registered\n", name); -} - -void __init bcm2708_init_clocks(void) -{ - struct clk *clk; - - clk = bcm2708_clk_register("uart0_clk", uart_clock); - bcm2708_register_clkdev(clk, "dev:f1"); - - clk = bcm2708_clk_register("sdhost_clk", 250000000); - bcm2708_register_clkdev(clk, "mmc-bcm2835.0"); - bcm2708_register_clkdev(clk, "bcm2708_spi.0"); - bcm2708_register_clkdev(clk, "bcm2708_i2c.0"); - bcm2708_register_clkdev(clk, "bcm2708_i2c.1"); -} - -#define UART0_IRQ { IRQ_UART, 0 /*NO_IRQ*/ } -#define UART0_DMA { 15, 14 } - -AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); - -static struct amba_device *amba_devs[] __initdata = { - &uart0_device, -}; - -static struct resource bcm2708_dmaengine_resources[] = { - { - .start = DMA_BASE, - .end = DMA_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_DMA0, - .end = IRQ_DMA0, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA1, - .end = IRQ_DMA1, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA2, - .end = IRQ_DMA2, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA3, - .end = IRQ_DMA3, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA4, - .end = IRQ_DMA4, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA5, - .end = IRQ_DMA5, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA6, - .end = IRQ_DMA6, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA7, - .end = IRQ_DMA7, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA8, - .end = IRQ_DMA8, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA9, - .end = IRQ_DMA9, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA10, - .end = IRQ_DMA10, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA11, - .end = IRQ_DMA11, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA12, - .end = IRQ_DMA12, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device bcm2708_dmaengine_device = { - .name = "bcm2708-dmaengine", - .id = -1, - .resource = bcm2708_dmaengine_resources, - .num_resources = ARRAY_SIZE(bcm2708_dmaengine_resources), -}; - -#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) -static struct w1_gpio_platform_data w1_gpio_pdata = { - .pin = W1_GPIO, - .ext_pullup_enable_pin = W1_PULLUP, - .is_open_drain = 0, -}; - -static struct platform_device w1_device = { - .name = "w1-gpio", - .id = -1, - .dev.platform_data = &w1_gpio_pdata, -}; -#endif - -static struct pps_gpio_platform_data pps_gpio_info = { - .assert_falling_edge = false, - .capture_clear = false, - .gpio_pin = -1, - .gpio_label = "PPS", -}; - -static struct platform_device pps_gpio_device = { - .name = "pps-gpio", - .id = PLATFORM_DEVID_NONE, - .dev.platform_data = &pps_gpio_info, -}; - -static u64 fb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_fb_device = { - .name = "bcm2708_fb", - .id = -1, /* only one bcm2708_fb */ - .resource = NULL, - .num_resources = 0, - .dev = { - .dma_mask = &fb_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; - -static struct resource bcm2708_usb_resources[] = { - [0] = { - .start = USB_BASE, - .end = USB_BASE + SZ_128K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = MPHI_BASE, - .end = MPHI_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = IRQ_HOSTPORT, - .end = IRQ_HOSTPORT, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_USB, - .end = IRQ_USB, - .flags = IORESOURCE_IRQ, - }, -}; - - -static u64 usb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_usb_device = { - .name = "bcm2708_usb", - .id = -1, /* only one bcm2708_usb */ - .resource = bcm2708_usb_resources, - .num_resources = ARRAY_SIZE(bcm2708_usb_resources), - .dev = { - .dma_mask = &usb_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; - -static u64 rpifw_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_rpifw_device = { - .name = "raspberrypi-firmware", - .dev = { - .dma_mask = &rpifw_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; - -static struct resource bcm2708_vchiq_resources[] = { - { - .start = ARMCTRL_0_BELL_BASE, - .end = ARMCTRL_0_BELL_BASE + 16, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_ARM_DOORBELL_0, - .end = IRQ_ARM_DOORBELL_0, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 vchiq_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_vchiq_device = { - .name = "bcm2835_vchiq", - .id = -1, - .resource = bcm2708_vchiq_resources, - .num_resources = ARRAY_SIZE(bcm2708_vchiq_resources), - .dev = { - .dma_mask = &vchiq_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; - -#ifdef CONFIG_BCM2708_GPIO -#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio" - -static struct resource bcm2708_gpio_resources[] = { - [0] = { /* general purpose I/O */ - .start = GPIO_BASE, - .end = GPIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static u64 gpio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_gpio_device = { - .name = BCM_GPIO_DRIVER_NAME, - .id = -1, /* only one VideoCore I/O area */ - .resource = bcm2708_gpio_resources, - .num_resources = ARRAY_SIZE(bcm2708_gpio_resources), - .dev = { - .dma_mask = &gpio_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; -#endif - -#ifdef CONFIG_MMC_BCM2835 /* Arasan emmc SD (new) */ -static struct resource bcm2835_emmc_resources[] = { - [0] = { - .start = EMMC_BASE, - .end = EMMC_BASE + SZ_256 - 1, /* we only need this area */ - /* the memory map actually makes SZ_4K available */ - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_ARASANSDIO, - .end = IRQ_ARASANSDIO, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 bcm2835_emmc_dmamask = 0xffffffffUL; - -struct platform_device bcm2835_emmc_device = { - .name = "mmc-bcm2835", - .id = 0, - .num_resources = ARRAY_SIZE(bcm2835_emmc_resources), - .resource = bcm2835_emmc_resources, - .dev = { - .dma_mask = &bcm2835_emmc_dmamask, - .coherent_dma_mask = 0xffffffffUL}, -}; -#endif /* CONFIG_MMC_BCM2835 */ - -static struct platform_device bcm2708_alsa_devices[] = { - [0] = { - .name = "bcm2835_AUD0", - .id = 0, /* first audio device */ - .resource = 0, - .num_resources = 0, - }, - [1] = { - .name = "bcm2835_AUD1", - .id = 1, /* second audio device */ - .resource = 0, - .num_resources = 0, - }, - [2] = { - .name = "bcm2835_AUD2", - .id = 2, /* third audio device */ - .resource = 0, - .num_resources = 0, - }, - [3] = { - .name = "bcm2835_AUD3", - .id = 3, /* forth audio device */ - .resource = 0, - .num_resources = 0, - }, - [4] = { - .name = "bcm2835_AUD4", - .id = 4, /* fifth audio device */ - .resource = 0, - .num_resources = 0, - }, - [5] = { - .name = "bcm2835_AUD5", - .id = 5, /* sixth audio device */ - .resource = 0, - .num_resources = 0, - }, - [6] = { - .name = "bcm2835_AUD6", - .id = 6, /* seventh audio device */ - .resource = 0, - .num_resources = 0, - }, - [7] = { - .name = "bcm2835_AUD7", - .id = 7, /* eighth audio device */ - .resource = 0, - .num_resources = 0, - }, -}; - -static struct resource bcm2708_spi_resources[] = { - { - .start = SPI0_BASE, - .end = SPI0_BASE + SZ_256 - 1, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_SPI, - .end = IRQ_SPI, - .flags = IORESOURCE_IRQ, - } -}; - - -static u64 bcm2708_spi_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); -static struct platform_device bcm2708_spi_device = { - .name = "bcm2708_spi", - .id = 0, - .num_resources = ARRAY_SIZE(bcm2708_spi_resources), - .resource = bcm2708_spi_resources, - .dev = { - .dma_mask = &bcm2708_spi_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON)}, -}; - -#ifdef CONFIG_BCM2708_SPIDEV -static struct spi_board_info bcm2708_spi_devices[] = { -#ifdef CONFIG_SPI_SPIDEV - { - .modalias = "spidev", - .max_speed_hz = 500000, - .bus_num = 0, - .chip_select = 0, - .mode = SPI_MODE_0, - }, { - .modalias = "spidev", - .max_speed_hz = 500000, - .bus_num = 0, - .chip_select = 1, - .mode = SPI_MODE_0, - } -#endif -}; -#endif - -static struct resource bcm2708_bsc0_resources[] = { - { - .start = BSC0_BASE, - .end = BSC0_BASE + SZ_256 - 1, - .flags = IORESOURCE_MEM, - }, { - .start = INTERRUPT_I2C, - .end = INTERRUPT_I2C, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device bcm2708_bsc0_device = { - .name = "bcm2708_i2c", - .id = 0, - .num_resources = ARRAY_SIZE(bcm2708_bsc0_resources), - .resource = bcm2708_bsc0_resources, -}; - - -static struct resource bcm2708_bsc1_resources[] = { - { - .start = BSC1_BASE, - .end = BSC1_BASE + SZ_256 - 1, - .flags = IORESOURCE_MEM, - }, { - .start = INTERRUPT_I2C, - .end = INTERRUPT_I2C, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device bcm2708_bsc1_device = { - .name = "bcm2708_i2c", - .id = 1, - .num_resources = ARRAY_SIZE(bcm2708_bsc1_resources), - .resource = bcm2708_bsc1_resources, -}; - -static struct platform_device bcm2835_thermal_device = { - .name = "bcm2835_thermal", -}; - -#if defined(CONFIG_SND_BCM2708_SOC_I2S) || defined(CONFIG_SND_BCM2708_SOC_I2S_MODULE) -static struct resource bcm2708_i2s_resources[] = { - { - .start = I2S_BASE, - .end = I2S_BASE + 0x20, - .flags = IORESOURCE_MEM, - }, - { - .start = PCM_CLOCK_BASE, - .end = PCM_CLOCK_BASE + 0x02, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device bcm2708_i2s_device = { - .name = "bcm2708-i2s", - .id = 0, - .num_resources = ARRAY_SIZE(bcm2708_i2s_resources), - .resource = bcm2708_i2s_resources, -}; -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC_MODULE) -static struct platform_device snd_hifiberry_dac_device = { - .name = "snd-hifiberry-dac", - .id = 0, - .num_resources = 0, -}; - -static struct platform_device snd_pcm5102a_codec_device = { - .name = "pcm5102a-codec", - .id = -1, - .num_resources = 0, -}; -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS_MODULE) -static struct platform_device snd_rpi_hifiberry_dacplus_device = { - .name = "snd-rpi-hifiberry-dacplus", - .id = 0, - .num_resources = 0, -}; - -static struct i2c_board_info __initdata snd_pcm512x_hbdacplus_i2c_devices[] = { - { - I2C_BOARD_INFO("pcm5122", 0x4d) - }, -}; -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI_MODULE) -static struct platform_device snd_hifiberry_digi_device = { - .name = "snd-hifiberry-digi", - .id = 0, - .num_resources = 0, -}; - -static struct i2c_board_info __initdata snd_wm8804_i2c_devices[] = { - { - I2C_BOARD_INFO("wm8804", 0x3b) - }, -}; - -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP_MODULE) -static struct platform_device snd_hifiberry_amp_device = { - .name = "snd-hifiberry-amp", - .id = 0, - .num_resources = 0, -}; - -static struct i2c_board_info __initdata snd_tas5713_i2c_devices[] = { - { - I2C_BOARD_INFO("tas5713", 0x1b) - }, -}; -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_RPI_DAC) || defined(CONFIG_SND_BCM2708_SOC_RPI_DAC_MODULE) -static struct platform_device snd_rpi_dac_device = { - .name = "snd-rpi-dac", - .id = 0, - .num_resources = 0, -}; - -static struct platform_device snd_pcm1794a_codec_device = { - .name = "pcm1794a-codec", - .id = -1, - .num_resources = 0, -}; -#endif - - -#if defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) || defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC_MODULE) -static struct platform_device snd_rpi_iqaudio_dac_device = { - .name = "snd-rpi-iqaudio-dac", - .id = 0, - .num_resources = 0, -}; - -// Use the actual device name rather than generic driver name -static struct i2c_board_info __initdata snd_pcm512x_i2c_devices[] = { - { - I2C_BOARD_INFO("pcm5122", 0x4c) - }, -}; -#endif - -int __init bcm_register_device(struct platform_device *pdev) -{ - int ret; - - ret = platform_device_register(pdev); - if (ret) - pr_debug("Unable to register platform device '%s': %d\n", - pdev->name, ret); - - return ret; -} - -/* - * Use these macros for platform and i2c devices that are present in the - * Device Tree. This way the devices are only added on non-DT systems. - */ -#define bcm_register_device_dt(pdev) \ - if (!use_dt) bcm_register_device(pdev) - -#define i2c_register_board_info_dt(busnum, info, n) \ - if (!use_dt) i2c_register_board_info(busnum, info, n) - int calc_rsts(int partition) { return PM_PASSWORD | @@ -827,260 +175,26 @@ static void __init bcm2708_init_uart1(void) } } -#ifdef CONFIG_OF -static void __init bcm2708_dt_init(void) -{ - int ret; - - ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); - if (ret) { - pr_err("of_platform_populate failed: %d\n", ret); - /* Proceed as if CONFIG_OF was not defined */ - } else { - use_dt = 1; - } -} -#else -static void __init bcm2708_dt_init(void) { } -#endif /* CONFIG_OF */ - void __init bcm2708_init(void) { - int i; + int ret; -#if defined(CONFIG_BCM_VC_CMA) vc_cma_early_init(); -#endif - printk("bcm2708.uart_clock = %d\n", uart_clock); - pm_power_off = bcm2708_power_off; - - bcm2708_init_clocks(); - bcm2708_dt_init(); - bcm_register_device_dt(&bcm2708_dmaengine_device); - bcm_register_device_dt(&bcm2708_rpifw_device); - bcm_register_device_dt(&bcm2708_vchiq_device); -#ifdef CONFIG_BCM2708_GPIO - bcm_register_device_dt(&bcm2708_gpio_device); -#endif + pm_power_off = bcm2708_power_off; -#if defined(CONFIG_PPS_CLIENT_GPIO) || defined(CONFIG_PPS_CLIENT_GPIO_MODULE) - if (!use_dt && (pps_gpio_pin >= 0)) { - pr_info("bcm2708: GPIO %d setup as pps-gpio device\n", pps_gpio_pin); - pps_gpio_info.gpio_pin = pps_gpio_pin; - pps_gpio_device.id = pps_gpio_pin; - bcm_register_device(&pps_gpio_device); + ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, + NULL); + if (ret) { + pr_err("of_platform_populate failed: %d\n", ret); + BUG(); } -#endif - -#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) - w1_gpio_pdata.pin = w1_gpio_pin; - w1_gpio_pdata.ext_pullup_enable_pin = w1_gpio_pullup; - bcm_register_device_dt(&w1_device); -#endif - bcm_register_device_dt(&bcm2708_fb_device); - bcm_register_device_dt(&bcm2708_usb_device); -#ifdef CONFIG_MMC_BCM2835 - bcm_register_device_dt(&bcm2835_emmc_device); -#endif - bcm2708_init_led(); bcm2708_init_uart1(); - /* Only create the platform devices for the ALSA driver in the - absence of an enabled "audio" DT node */ - if (!use_dt || - !of_device_is_available(of_find_node_by_path("/audio"))) { - for (i = 0; i < ARRAY_SIZE(bcm2708_alsa_devices); i++) - bcm_register_device(&bcm2708_alsa_devices[i]); - } - - bcm_register_device_dt(&bcm2708_spi_device); - - if (vc_i2c_override) { - bcm_register_device_dt(&bcm2708_bsc0_device); - bcm_register_device_dt(&bcm2708_bsc1_device); - } else if ((boardrev & 0xffffff) == 0x2 || (boardrev & 0xffffff) == 0x3) { - bcm_register_device_dt(&bcm2708_bsc0_device); - } else { - bcm_register_device_dt(&bcm2708_bsc1_device); - } - - bcm_register_device_dt(&bcm2835_thermal_device); - -#if defined(CONFIG_SND_BCM2708_SOC_I2S) || defined(CONFIG_SND_BCM2708_SOC_I2S_MODULE) - bcm_register_device_dt(&bcm2708_i2s_device); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC_MODULE) - bcm_register_device_dt(&snd_hifiberry_dac_device); - bcm_register_device_dt(&snd_pcm5102a_codec_device); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS_MODULE) - bcm_register_device_dt(&snd_rpi_hifiberry_dacplus_device); - i2c_register_board_info_dt(1, snd_pcm512x_hbdacplus_i2c_devices, ARRAY_SIZE(snd_pcm512x_hbdacplus_i2c_devices)); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI_MODULE) - bcm_register_device_dt(&snd_hifiberry_digi_device); - i2c_register_board_info_dt(1, snd_wm8804_i2c_devices, ARRAY_SIZE(snd_wm8804_i2c_devices)); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP_MODULE) - bcm_register_device_dt(&snd_hifiberry_amp_device); - i2c_register_board_info_dt(1, snd_tas5713_i2c_devices, ARRAY_SIZE(snd_tas5713_i2c_devices)); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_RPI_DAC) || defined(CONFIG_SND_BCM2708_SOC_RPI_DAC_MODULE) - bcm_register_device_dt(&snd_rpi_dac_device); - bcm_register_device_dt(&snd_pcm1794a_codec_device); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) || defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC_MODULE) - bcm_register_device_dt(&snd_rpi_iqaudio_dac_device); - i2c_register_board_info_dt(1, snd_pcm512x_i2c_devices, ARRAY_SIZE(snd_pcm512x_i2c_devices)); -#endif - - if (!use_dt) { - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { - struct amba_device *d = amba_devs[i]; - amba_device_register(d, &iomem_resource); - } - } system_rev = boardrev; system_serial_low = serial; - -#ifdef CONFIG_BCM2708_SPIDEV - if (!use_dt) - spi_register_board_info(bcm2708_spi_devices, - ARRAY_SIZE(bcm2708_spi_devices)); -#endif -} - -static int timer_set_oneshot(struct clock_event_device *unused) -{ - return 0; -} - -static int timer_set_next_event(unsigned long cycles, - struct clock_event_device *unused) -{ - unsigned long stc; - do { - stc = readl(__io_address(ST_BASE + 0x04)); - /* We could take a FIQ here, which may push ST above STC3 */ - writel(stc + cycles, __io_address(ST_BASE + 0x18)); - } while ((signed long) cycles >= 0 && - (signed long) (readl(__io_address(ST_BASE + 0x04)) - stc) - >= (signed long) cycles); - return 0; -} - -static struct clock_event_device timer0_clockevent = { - .name = "timer0", - .shift = 32, - .features = CLOCK_EVT_FEAT_ONESHOT, - .set_state_oneshot = timer_set_oneshot, - .set_next_event = timer_set_next_event, -}; - -/* - * IRQ handler for the timer - */ -static irqreturn_t bcm2708_timer_interrupt(int irq, void *dev_id) -{ - struct clock_event_device *evt = &timer0_clockevent; - - writel(1 << 3, __io_address(ST_BASE + 0x00)); /* stcs clear timer int */ - - evt->event_handler(evt); - - return IRQ_HANDLED; -} - -static struct irqaction bcm2708_timer_irq = { - .name = "BCM2708 Timer Tick", - .flags = IRQF_TIMER | IRQF_IRQPOLL, - .handler = bcm2708_timer_interrupt, -}; - -/* - * Set up timer interrupt, and return the current time in seconds. - */ - -static struct delay_timer bcm2708_delay_timer = { - .read_current_timer = bcm2708_read_current_timer, - .freq = STC_FREQ_HZ, -}; - -static void __init bcm2708_timer_init(void) -{ - if (of_have_populated_dt()) { - of_clk_init(NULL); - clocksource_of_init(); - return; - } - - /* init high res timer */ - bcm2708_clocksource_init(); - - /* - * Make irqs happen for the system timer - */ - setup_irq(IRQ_TIMER3, &bcm2708_timer_irq); - - sched_clock_register(bcm2708_read_sched_clock, 32, STC_FREQ_HZ); - - timer0_clockevent.mult = - div_sc(STC_FREQ_HZ, NSEC_PER_SEC, timer0_clockevent.shift); - timer0_clockevent.max_delta_ns = - clockevent_delta2ns(0xffffffff, &timer0_clockevent); - timer0_clockevent.min_delta_ns = - clockevent_delta2ns(0xf, &timer0_clockevent); - - timer0_clockevent.cpumask = cpumask_of(0); - clockevents_register_device(&timer0_clockevent); - - register_current_timer_delay(&bcm2708_delay_timer); -} - -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -#include - -static struct gpio_led bcm2708_leds[] = { - [0] = { - .gpio = 16, - .name = "led0", - .default_trigger = "mmc0", - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data bcm2708_led_pdata = { - .num_leds = ARRAY_SIZE(bcm2708_leds), - .leds = bcm2708_leds, -}; - -static struct platform_device bcm2708_led_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &bcm2708_led_pdata, - }, -}; - -static void __init bcm2708_init_led(void) -{ - bcm2708_leds[0].gpio = disk_led_gpio; - bcm2708_leds[0].active_low = disk_led_active_low; - bcm_register_device_dt(&bcm2708_led_device); -} -#else -static inline void bcm2708_init_led(void) -{ } -#endif void __init bcm2708_init_early(void) { @@ -1094,9 +208,7 @@ void __init bcm2708_init_early(void) static void __init board_reserve(void) { -#if defined(CONFIG_BCM_VC_CMA) vc_cma_reserve(); -#endif } static const char * const bcm2708_compat[] = { @@ -1107,8 +219,6 @@ static const char * const bcm2708_compat[] = { MACHINE_START(BCM2708, "BCM2708") /* Maintainer: Broadcom Europe Ltd. */ .map_io = bcm2708_map_io, - .init_irq = bcm2708_init_irq, - .init_time = bcm2708_timer_init, .init_machine = bcm2708_init, .init_early = bcm2708_init_early, .reserve = board_reserve, @@ -1118,13 +228,4 @@ MACHINE_END module_param(boardrev, uint, 0644); module_param(serial, uint, 0644); -module_param(uart_clock, uint, 0644); -module_param(disk_led_gpio, uint, 0644); -module_param(disk_led_active_low, uint, 0644); module_param(reboot_part, uint, 0644); -module_param(w1_gpio_pin, uint, 0644); -module_param(w1_gpio_pullup, uint, 0644); -module_param(vc_i2c_override, bool, 0644); -MODULE_PARM_DESC(vc_i2c_override, "Allow the use of VC's I2C peripheral."); -module_param(pps_gpio_pin, int, 0644); -MODULE_PARM_DESC(pps_gpio_pin, "Set GPIO pin to reserve for PPS"); diff --git a/arch/arm/mach-bcm2708/bcm2708.h b/arch/arm/mach-bcm2708/bcm2708.h deleted file mode 100644 index e339a937e37316..00000000000000 --- a/arch/arm/mach-bcm2708/bcm2708.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * linux/arch/arm/mach-bcm2708/bcm2708.h - * - * BCM2708 machine support header - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __BCM2708_BCM2708_H -#define __BCM2708_BCM2708_H - -#include - -extern void __init bcm2708_init(void); -extern void __init bcm2708_init_irq(void); -extern void __init bcm2708_map_io(void); -extern struct sys_timer bcm2708_timer; -extern unsigned int mmc_status(struct device *dev); - -#define AMBA_DEVICE(name, busid, base, plat) \ -static struct amba_device name##_device = { \ - .dev = { \ - .coherent_dma_mask = ~0, \ - .init_name = busid, \ - .platform_data = plat, \ - }, \ - .res = { \ - .start = base##_BASE, \ - .end = (base##_BASE) + SZ_4K - 1,\ - .flags = IORESOURCE_MEM, \ - }, \ - .irq = base##_IRQ, \ -} - -#endif diff --git a/arch/arm/mach-bcm2708/bcm2708_gpio.c b/arch/arm/mach-bcm2708/bcm2708_gpio.c deleted file mode 100644 index ef817fea063414..00000000000000 --- a/arch/arm/mach-bcm2708/bcm2708_gpio.c +++ /dev/null @@ -1,425 +0,0 @@ -/* - * linux/arch/arm/mach-bcm2708/bcm2708_gpio.c - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio" -#define DRIVER_NAME BCM_GPIO_DRIVER_NAME -#define BCM_GPIO_USE_IRQ 1 - -#define GPIOFSEL(x) (0x00+(x)*4) -#define GPIOSET(x) (0x1c+(x)*4) -#define GPIOCLR(x) (0x28+(x)*4) -#define GPIOLEV(x) (0x34+(x)*4) -#define GPIOEDS(x) (0x40+(x)*4) -#define GPIOREN(x) (0x4c+(x)*4) -#define GPIOFEN(x) (0x58+(x)*4) -#define GPIOHEN(x) (0x64+(x)*4) -#define GPIOLEN(x) (0x70+(x)*4) -#define GPIOAREN(x) (0x7c+(x)*4) -#define GPIOAFEN(x) (0x88+(x)*4) -#define GPIOUD(x) (0x94+(x)*4) -#define GPIOUDCLK(x) (0x98+(x)*4) - -#define GPIO_BANKS 2 - -enum { GPIO_FSEL_INPUT, GPIO_FSEL_OUTPUT, - GPIO_FSEL_ALT5, GPIO_FSEL_ALT_4, - GPIO_FSEL_ALT0, GPIO_FSEL_ALT1, - GPIO_FSEL_ALT2, GPIO_FSEL_ALT3, -}; - - /* Each of the two spinlocks protects a different set of hardware - * regiters and data structurs. This decouples the code of the IRQ from - * the GPIO code. This also makes the case of a GPIO routine call from - * the IRQ code simpler. - */ -static DEFINE_SPINLOCK(lock); /* GPIO registers */ - -struct bcm2708_gpio { - struct list_head list; - void __iomem *base; - struct gpio_chip gc; - unsigned long rising[(BCM2708_NR_GPIOS + 31) / 32]; - unsigned long falling[(BCM2708_NR_GPIOS + 31) / 32]; - unsigned long high[(BCM2708_NR_GPIOS + 31) / 32]; - unsigned long low[(BCM2708_NR_GPIOS + 31) / 32]; -}; - -static int bcm2708_set_function(struct gpio_chip *gc, unsigned offset, - int function) -{ - struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); - unsigned long flags; - unsigned gpiodir; - unsigned gpio_bank = offset / 10; - unsigned gpio_field_offset = (offset - 10 * gpio_bank) * 3; - -//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set_function %p (%d,%d)\n", gc, offset, function); - if (offset >= BCM2708_NR_GPIOS) - return -EINVAL; - - spin_lock_irqsave(&lock, flags); - - gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank)); - gpiodir &= ~(7 << gpio_field_offset); - gpiodir |= function << gpio_field_offset; - writel(gpiodir, gpio->base + GPIOFSEL(gpio_bank)); - spin_unlock_irqrestore(&lock, flags); - gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank)); - - return 0; -} - -static int bcm2708_gpio_dir_in(struct gpio_chip *gc, unsigned offset) -{ - return bcm2708_set_function(gc, offset, GPIO_FSEL_INPUT); -} - -static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value); -static int bcm2708_gpio_dir_out(struct gpio_chip *gc, unsigned offset, - int value) -{ - int ret; - ret = bcm2708_set_function(gc, offset, GPIO_FSEL_OUTPUT); - if (ret >= 0) - bcm2708_gpio_set(gc, offset, value); - return ret; -} - -static int bcm2708_gpio_get(struct gpio_chip *gc, unsigned offset) -{ - struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); - unsigned gpio_bank = offset / 32; - unsigned gpio_field_offset = (offset - 32 * gpio_bank); - unsigned lev; - - if (offset >= BCM2708_NR_GPIOS) - return 0; - lev = readl(gpio->base + GPIOLEV(gpio_bank)); -//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_get %p (%d)=%d\n", gc, offset, 0x1 & (lev>>gpio_field_offset)); - return 0x1 & (lev >> gpio_field_offset); -} - -static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value) -{ - struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); - unsigned gpio_bank = offset / 32; - unsigned gpio_field_offset = (offset - 32 * gpio_bank); -//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set %p (%d=%d)\n", gc, offset, value); - if (offset >= BCM2708_NR_GPIOS) - return; - if (value) - writel(1 << gpio_field_offset, gpio->base + GPIOSET(gpio_bank)); - else - writel(1 << gpio_field_offset, gpio->base + GPIOCLR(gpio_bank)); -} - -/********************** - * extension to configure pullups - */ -int bcm2708_gpio_setpull(struct gpio_chip *gc, unsigned offset, - bcm2708_gpio_pull_t value) -{ - struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); - unsigned gpio_bank = offset / 32; - unsigned gpio_field_offset = (offset - 32 * gpio_bank); - - if (offset >= BCM2708_NR_GPIOS) - return -EINVAL; - - switch (value) { - case BCM2708_PULL_UP: - writel(2, gpio->base + GPIOUD(0)); - break; - case BCM2708_PULL_DOWN: - writel(1, gpio->base + GPIOUD(0)); - break; - case BCM2708_PULL_OFF: - writel(0, gpio->base + GPIOUD(0)); - break; - } - - udelay(5); - writel(1 << gpio_field_offset, gpio->base + GPIOUDCLK(gpio_bank)); - udelay(5); - writel(0, gpio->base + GPIOUD(0)); - writel(0 << gpio_field_offset, gpio->base + GPIOUDCLK(gpio_bank)); - - return 0; -} -EXPORT_SYMBOL(bcm2708_gpio_setpull); - -/************************************************************************************************************************* - * bcm2708 GPIO IRQ - */ - -#if BCM_GPIO_USE_IRQ - -static int bcm2708_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) -{ - return gpio_to_irq(gpio); -} - -static int bcm2708_gpio_irq_set_type(struct irq_data *d, unsigned type) -{ - unsigned irq = d->irq; - struct bcm2708_gpio *gpio = irq_get_chip_data(irq); - unsigned gn = irq_to_gpio(irq); - unsigned gb = gn / 32; - unsigned go = gn % 32; - - gpio->rising[gb] &= ~(1 << go); - gpio->falling[gb] &= ~(1 << go); - gpio->high[gb] &= ~(1 << go); - gpio->low[gb] &= ~(1 << go); - - if (type & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) - return -EINVAL; - - if (type & IRQ_TYPE_EDGE_RISING) - gpio->rising[gb] |= (1 << go); - if (type & IRQ_TYPE_EDGE_FALLING) - gpio->falling[gb] |= (1 << go); - if (type & IRQ_TYPE_LEVEL_HIGH) - gpio->high[gb] |= (1 << go); - if (type & IRQ_TYPE_LEVEL_LOW) - gpio->low[gb] |= (1 << go); - return 0; -} - -static void bcm2708_gpio_irq_mask(struct irq_data *d) -{ - unsigned irq = d->irq; - struct bcm2708_gpio *gpio = irq_get_chip_data(irq); - unsigned gn = irq_to_gpio(irq); - unsigned gb = gn / 32; - unsigned long rising = readl(gpio->base + GPIOREN(gb)); - unsigned long falling = readl(gpio->base + GPIOFEN(gb)); - unsigned long high = readl(gpio->base + GPIOHEN(gb)); - unsigned long low = readl(gpio->base + GPIOLEN(gb)); - - gn = gn % 32; - - writel(rising & ~(1 << gn), gpio->base + GPIOREN(gb)); - writel(falling & ~(1 << gn), gpio->base + GPIOFEN(gb)); - writel(high & ~(1 << gn), gpio->base + GPIOHEN(gb)); - writel(low & ~(1 << gn), gpio->base + GPIOLEN(gb)); -} - -static void bcm2708_gpio_irq_unmask(struct irq_data *d) -{ - unsigned irq = d->irq; - struct bcm2708_gpio *gpio = irq_get_chip_data(irq); - unsigned gn = irq_to_gpio(irq); - unsigned gb = gn / 32; - unsigned go = gn % 32; - unsigned long rising = readl(gpio->base + GPIOREN(gb)); - unsigned long falling = readl(gpio->base + GPIOFEN(gb)); - unsigned long high = readl(gpio->base + GPIOHEN(gb)); - unsigned long low = readl(gpio->base + GPIOLEN(gb)); - - if (gpio->rising[gb] & (1 << go)) { - writel(rising | (1 << go), gpio->base + GPIOREN(gb)); - } else { - writel(rising & ~(1 << go), gpio->base + GPIOREN(gb)); - } - - if (gpio->falling[gb] & (1 << go)) { - writel(falling | (1 << go), gpio->base + GPIOFEN(gb)); - } else { - writel(falling & ~(1 << go), gpio->base + GPIOFEN(gb)); - } - - if (gpio->high[gb] & (1 << go)) { - writel(high | (1 << go), gpio->base + GPIOHEN(gb)); - } else { - writel(high & ~(1 << go), gpio->base + GPIOHEN(gb)); - } - - if (gpio->low[gb] & (1 << go)) { - writel(low | (1 << go), gpio->base + GPIOLEN(gb)); - } else { - writel(low & ~(1 << go), gpio->base + GPIOLEN(gb)); - } -} - -static struct irq_chip bcm2708_irqchip = { - .name = "GPIO", - .irq_enable = bcm2708_gpio_irq_unmask, - .irq_disable = bcm2708_gpio_irq_mask, - .irq_unmask = bcm2708_gpio_irq_unmask, - .irq_mask = bcm2708_gpio_irq_mask, - .irq_set_type = bcm2708_gpio_irq_set_type, -}; - -static irqreturn_t bcm2708_gpio_interrupt(int irq, void *dev_id) -{ - unsigned long edsr; - unsigned bank; - int i; - unsigned gpio; - unsigned level_bits; - struct bcm2708_gpio *gpio_data = dev_id; - - for (bank = 0; bank < GPIO_BANKS; bank++) { - edsr = readl(__io_address(GPIO_BASE) + GPIOEDS(bank)); - level_bits = gpio_data->high[bank] | gpio_data->low[bank]; - - for_each_set_bit(i, &edsr, 32) { - gpio = i + bank * 32; - /* ack edge triggered IRQs immediately */ - if (!(level_bits & (1<gc.to_irq = bcm2708_gpio_to_irq; - - for (irq = GPIO_IRQ_START; irq < (GPIO_IRQ_START + GPIO_IRQS); irq++) { - irq_set_chip_data(irq, ucb); - irq_set_chip_and_handler(irq, &bcm2708_irqchip, - handle_simple_irq); - } - - bcm2708_gpio_irq.dev_id = ucb; - setup_irq(IRQ_GPIO3, &bcm2708_gpio_irq); -} - -#else - -static void bcm2708_gpio_irq_init(struct bcm2708_gpio *ucb) -{ -} - -#endif /* #if BCM_GPIO_USE_IRQ ***************************************************************************************************************** */ - -static int bcm2708_gpio_probe(struct platform_device *dev) -{ - struct bcm2708_gpio *ucb; - struct resource *res; - int bank; - int err = 0; - - printk(KERN_INFO DRIVER_NAME ": bcm2708_gpio_probe %p\n", dev); - - ucb = kzalloc(sizeof(*ucb), GFP_KERNEL); - if (NULL == ucb) { - printk(KERN_ERR DRIVER_NAME ": failed to allocate " - "mailbox memory\n"); - err = -ENOMEM; - goto err; - } - - res = platform_get_resource(dev, IORESOURCE_MEM, 0); - - platform_set_drvdata(dev, ucb); - ucb->base = __io_address(GPIO_BASE); - - ucb->gc.label = "bcm2708_gpio"; - ucb->gc.base = 0; - ucb->gc.ngpio = BCM2708_NR_GPIOS; - ucb->gc.owner = THIS_MODULE; - - ucb->gc.direction_input = bcm2708_gpio_dir_in; - ucb->gc.direction_output = bcm2708_gpio_dir_out; - ucb->gc.get = bcm2708_gpio_get; - ucb->gc.set = bcm2708_gpio_set; - ucb->gc.can_sleep = 0; - - for (bank = 0; bank < GPIO_BANKS; bank++) { - writel(0, ucb->base + GPIOREN(bank)); - writel(0, ucb->base + GPIOFEN(bank)); - writel(0, ucb->base + GPIOHEN(bank)); - writel(0, ucb->base + GPIOLEN(bank)); - writel(0, ucb->base + GPIOAREN(bank)); - writel(0, ucb->base + GPIOAFEN(bank)); - writel(~0, ucb->base + GPIOEDS(bank)); - } - - bcm2708_gpio_irq_init(ucb); - - err = gpiochip_add(&ucb->gc); - -err: - return err; - -} - -static int bcm2708_gpio_remove(struct platform_device *dev) -{ - int err = 0; - struct bcm2708_gpio *ucb = platform_get_drvdata(dev); - - printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_remove %p\n", dev); - - gpiochip_remove(&ucb->gc); - - platform_set_drvdata(dev, NULL); - kfree(ucb); - - return err; -} - -static struct platform_driver bcm2708_gpio_driver = { - .probe = bcm2708_gpio_probe, - .remove = bcm2708_gpio_remove, - .driver = { - .name = "bcm2708_gpio"}, -}; - -static int __init bcm2708_gpio_init(void) -{ - return platform_driver_register(&bcm2708_gpio_driver); -} - -static void __exit bcm2708_gpio_exit(void) -{ - platform_driver_unregister(&bcm2708_gpio_driver); -} - -module_init(bcm2708_gpio_init); -module_exit(bcm2708_gpio_exit); - -MODULE_DESCRIPTION("Broadcom BCM2708 GPIO driver"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-bcm2708/include/mach/arm_control.h b/arch/arm/mach-bcm2708/include/mach/arm_control.h deleted file mode 100644 index a82bb92b11b4a5..00000000000000 --- a/arch/arm/mach-bcm2708/include/mach/arm_control.h +++ /dev/null @@ -1,419 +0,0 @@ -/* - * linux/arch/arm/mach-bcm2708/arm_control.h - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __BCM2708_ARM_CONTROL_H -#define __BCM2708_ARM_CONTROL_H - -/* - * Definitions and addresses for the ARM CONTROL logic - * This file is manually generated. - */ - -#define ARM_BASE 0x7E00B000 - -/* Basic configuration */ -#define ARM_CONTROL0 HW_REGISTER_RW(ARM_BASE+0x000) -#define ARM_C0_SIZ128M 0x00000000 -#define ARM_C0_SIZ256M 0x00000001 -#define ARM_C0_SIZ512M 0x00000002 -#define ARM_C0_SIZ1G 0x00000003 -#define ARM_C0_BRESP0 0x00000000 -#define ARM_C0_BRESP1 0x00000004 -#define ARM_C0_BRESP2 0x00000008 -#define ARM_C0_BOOTHI 0x00000010 -#define ARM_C0_UNUSED05 0x00000020 /* free */ -#define ARM_C0_FULLPERI 0x00000040 -#define ARM_C0_UNUSED78 0x00000180 /* free */ -#define ARM_C0_JTAGMASK 0x00000E00 -#define ARM_C0_JTAGOFF 0x00000000 -#define ARM_C0_JTAGBASH 0x00000800 /* Debug on GPIO off */ -#define ARM_C0_JTAGGPIO 0x00000C00 /* Debug on GPIO on */ -#define ARM_C0_APROTMSK 0x0000F000 -#define ARM_C0_DBG0SYNC 0x00010000 /* VPU0 halt sync */ -#define ARM_C0_DBG1SYNC 0x00020000 /* VPU1 halt sync */ -#define ARM_C0_SWDBGREQ 0x00040000 /* HW debug request */ -#define ARM_C0_PASSHALT 0x00080000 /* ARM halt passed to debugger */ -#define ARM_C0_PRIO_PER 0x00F00000 /* per priority mask */ -#define ARM_C0_PRIO_L2 0x0F000000 -#define ARM_C0_PRIO_UC 0xF0000000 - -#define ARM_C0_APROTPASS 0x0000A000 /* Translate 1:1 */ -#define ARM_C0_APROTUSER 0x00000000 /* Only user mode */ -#define ARM_C0_APROTSYST 0x0000F000 /* Only system mode */ - - -#define ARM_CONTROL1 HW_REGISTER_RW(ARM_BASE+0x440) -#define ARM_C1_TIMER 0x00000001 /* re-route timer IRQ to VC */ -#define ARM_C1_MAIL 0x00000002 /* re-route Mail IRQ to VC */ -#define ARM_C1_BELL0 0x00000004 /* re-route Doorbell 0 to VC */ -#define ARM_C1_BELL1 0x00000008 /* re-route Doorbell 1 to VC */ -#define ARM_C1_PERSON 0x00000100 /* peripherals on */ -#define ARM_C1_REQSTOP 0x00000200 /* ASYNC bridge request stop */ - -#define ARM_STATUS HW_REGISTER_RW(ARM_BASE+0x444) -#define ARM_S_ACKSTOP 0x80000000 /* Bridge stopped */ -#define ARM_S_READPEND 0x000003FF /* pending reads counter */ -#define ARM_S_WRITPEND 0x000FFC00 /* pending writes counter */ - -#define ARM_ERRHALT HW_REGISTER_RW(ARM_BASE+0x448) -#define ARM_EH_PERIBURST 0x00000001 /* Burst write seen on peri bus */ -#define ARM_EH_ILLADDRS1 0x00000002 /* Address bits 25-27 error */ -#define ARM_EH_ILLADDRS2 0x00000004 /* Address bits 31-28 error */ -#define ARM_EH_VPU0HALT 0x00000008 /* VPU0 halted & in debug mode */ -#define ARM_EH_VPU1HALT 0x00000010 /* VPU1 halted & in debug mode */ -#define ARM_EH_ARMHALT 0x00000020 /* ARM in halted debug mode */ - -#define ARM_ID_SECURE HW_REGISTER_RW(ARM_BASE+0x00C) -#define ARM_ID HW_REGISTER_RW(ARM_BASE+0x44C) -#define ARM_IDVAL 0x364D5241 - -/* Translation memory */ -#define ARM_TRANSLATE HW_REGISTER_RW(ARM_BASE+0x100) -/* 32 locations: 0x100.. 0x17F */ -/* 32 spare means we CAN go to 64 pages.... */ - - -/* Interrupts */ -#define ARM_IRQ_PEND0 HW_REGISTER_RW(ARM_BASE+0x200) /* Top IRQ bits */ -#define ARM_I0_TIMER 0x00000001 /* timer IRQ */ -#define ARM_I0_MAIL 0x00000002 /* Mail IRQ */ -#define ARM_I0_BELL0 0x00000004 /* Doorbell 0 */ -#define ARM_I0_BELL1 0x00000008 /* Doorbell 1 */ -#define ARM_I0_BANK1 0x00000100 /* Bank1 IRQ */ -#define ARM_I0_BANK2 0x00000200 /* Bank2 IRQ */ - -#define ARM_IRQ_PEND1 HW_REGISTER_RW(ARM_BASE+0x204) /* All bank1 IRQ bits */ -/* todo: all I1_interrupt sources */ -#define ARM_IRQ_PEND2 HW_REGISTER_RW(ARM_BASE+0x208) /* All bank2 IRQ bits */ -/* todo: all I2_interrupt sources */ - -#define ARM_IRQ_FAST HW_REGISTER_RW(ARM_BASE+0x20C) /* FIQ control */ -#define ARM_IF_INDEX 0x0000007F /* FIQ select */ -#define ARM_IF_ENABLE 0x00000080 /* FIQ enable */ -#define ARM_IF_VCMASK 0x0000003F /* FIQ = (index from VC source) */ -#define ARM_IF_TIMER 0x00000040 /* FIQ = ARM timer */ -#define ARM_IF_MAIL 0x00000041 /* FIQ = ARM Mail */ -#define ARM_IF_BELL0 0x00000042 /* FIQ = ARM Doorbell 0 */ -#define ARM_IF_BELL1 0x00000043 /* FIQ = ARM Doorbell 1 */ -#define ARM_IF_VP0HALT 0x00000044 /* FIQ = VPU0 Halt seen */ -#define ARM_IF_VP1HALT 0x00000045 /* FIQ = VPU1 Halt seen */ -#define ARM_IF_ILLEGAL 0x00000046 /* FIQ = Illegal access seen */ - -#define ARM_IRQ_ENBL1 HW_REGISTER_RW(ARM_BASE+0x210) /* Bank1 enable bits */ -#define ARM_IRQ_ENBL2 HW_REGISTER_RW(ARM_BASE+0x214) /* Bank2 enable bits */ -#define ARM_IRQ_ENBL3 HW_REGISTER_RW(ARM_BASE+0x218) /* ARM irqs enable bits */ -#define ARM_IRQ_DIBL1 HW_REGISTER_RW(ARM_BASE+0x21C) /* Bank1 disable bits */ -#define ARM_IRQ_DIBL2 HW_REGISTER_RW(ARM_BASE+0x220) /* Bank2 disable bits */ -#define ARM_IRQ_DIBL3 HW_REGISTER_RW(ARM_BASE+0x224) /* ARM irqs disable bits */ -#define ARM_IE_TIMER 0x00000001 /* Timer IRQ */ -#define ARM_IE_MAIL 0x00000002 /* Mail IRQ */ -#define ARM_IE_BELL0 0x00000004 /* Doorbell 0 */ -#define ARM_IE_BELL1 0x00000008 /* Doorbell 1 */ -#define ARM_IE_VP0HALT 0x00000010 /* VPU0 Halt */ -#define ARM_IE_VP1HALT 0x00000020 /* VPU1 Halt */ -#define ARM_IE_ILLEGAL 0x00000040 /* Illegal access seen */ - -/* Timer */ -/* For reg. fields see sp804 spec. */ -#define ARM_T_LOAD HW_REGISTER_RW(ARM_BASE+0x400) -#define ARM_T_VALUE HW_REGISTER_RW(ARM_BASE+0x404) -#define ARM_T_CONTROL HW_REGISTER_RW(ARM_BASE+0x408) -#define ARM_T_IRQCNTL HW_REGISTER_RW(ARM_BASE+0x40C) -#define ARM_T_RAWIRQ HW_REGISTER_RW(ARM_BASE+0x410) -#define ARM_T_MSKIRQ HW_REGISTER_RW(ARM_BASE+0x414) -#define ARM_T_RELOAD HW_REGISTER_RW(ARM_BASE+0x418) -#define ARM_T_PREDIV HW_REGISTER_RW(ARM_BASE+0x41c) -#define ARM_T_FREECNT HW_REGISTER_RW(ARM_BASE+0x420) - -#define TIMER_CTRL_ONESHOT (1 << 0) -#define TIMER_CTRL_32BIT (1 << 1) -#define TIMER_CTRL_DIV1 (0 << 2) -#define TIMER_CTRL_DIV16 (1 << 2) -#define TIMER_CTRL_DIV256 (2 << 2) -#define TIMER_CTRL_IE (1 << 5) -#define TIMER_CTRL_PERIODIC (1 << 6) -#define TIMER_CTRL_ENABLE (1 << 7) -#define TIMER_CTRL_DBGHALT (1 << 8) -#define TIMER_CTRL_ENAFREE (1 << 9) -#define TIMER_CTRL_FREEDIV_SHIFT 16) -#define TIMER_CTRL_FREEDIV_MASK 0xff - -/* Semaphores, Doorbells, Mailboxes */ -#define ARM_SBM_OWN0 (ARM_BASE+0x800) -#define ARM_SBM_OWN1 (ARM_BASE+0x900) -#define ARM_SBM_OWN2 (ARM_BASE+0xA00) -#define ARM_SBM_OWN3 (ARM_BASE+0xB00) - -/* MAILBOXES - * Register flags are common across all - * owner registers. See end of this section - * - * Semaphores, Doorbells, Mailboxes Owner 0 - * - */ - -#define ARM_0_SEMS HW_REGISTER_RW(ARM_SBM_OWN0+0x00) -#define ARM_0_SEM0 HW_REGISTER_RW(ARM_SBM_OWN0+0x00) -#define ARM_0_SEM1 HW_REGISTER_RW(ARM_SBM_OWN0+0x04) -#define ARM_0_SEM2 HW_REGISTER_RW(ARM_SBM_OWN0+0x08) -#define ARM_0_SEM3 HW_REGISTER_RW(ARM_SBM_OWN0+0x0C) -#define ARM_0_SEM4 HW_REGISTER_RW(ARM_SBM_OWN0+0x10) -#define ARM_0_SEM5 HW_REGISTER_RW(ARM_SBM_OWN0+0x14) -#define ARM_0_SEM6 HW_REGISTER_RW(ARM_SBM_OWN0+0x18) -#define ARM_0_SEM7 HW_REGISTER_RW(ARM_SBM_OWN0+0x1C) -#define ARM_0_BELL0 HW_REGISTER_RW(ARM_SBM_OWN0+0x40) -#define ARM_0_BELL1 HW_REGISTER_RW(ARM_SBM_OWN0+0x44) -#define ARM_0_BELL2 HW_REGISTER_RW(ARM_SBM_OWN0+0x48) -#define ARM_0_BELL3 HW_REGISTER_RW(ARM_SBM_OWN0+0x4C) -/* MAILBOX 0 access in Owner 0 area */ -/* Some addresses should ONLY be used by owner 0 */ -#define ARM_0_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN0+0x80) /* .. 0x8C (4 locations) */ -#define ARM_0_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN0+0x80) /* .. 0x8C (4 locations) Normal read */ -#define ARM_0_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN0+0x90) /* none-pop read */ -#define ARM_0_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN0+0x94) /* Sender read (only LS 2 bits) */ -#define ARM_0_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN0+0x98) /* Status read */ -#define ARM_0_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN0+0x9C) /* Config read/write */ -/* MAILBOX 1 access in Owner 0 area */ -/* Owner 0 should only WRITE to this mailbox */ -#define ARM_0_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN0+0xA0) /* .. 0xAC (4 locations) */ -/*#define ARM_0_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN0+0xA0) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_0_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN0+0xB0) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_0_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN0+0xB4) */ /* DO NOT USE THIS !!!!! */ -#define ARM_0_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN0+0xB8) /* Status read */ -/*#define ARM_0_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN0+0xBC) */ /* DO NOT USE THIS !!!!! */ -/* General SEM, BELL, MAIL config/status */ -#define ARM_0_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN0+0xE0) /* semaphore clear/debug register */ -#define ARM_0_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN0+0xE4) /* Doorbells clear/debug register */ -#define ARM_0_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN0+0xF8) /* ALL interrupts */ -#define ARM_0_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN0+0xFC) /* IRQS pending for owner 0 */ - -/* Semaphores, Doorbells, Mailboxes Owner 1 */ -#define ARM_1_SEMS HW_REGISTER_RW(ARM_SBM_OWN1+0x00) -#define ARM_1_SEM0 HW_REGISTER_RW(ARM_SBM_OWN1+0x00) -#define ARM_1_SEM1 HW_REGISTER_RW(ARM_SBM_OWN1+0x04) -#define ARM_1_SEM2 HW_REGISTER_RW(ARM_SBM_OWN1+0x08) -#define ARM_1_SEM3 HW_REGISTER_RW(ARM_SBM_OWN1+0x0C) -#define ARM_1_SEM4 HW_REGISTER_RW(ARM_SBM_OWN1+0x10) -#define ARM_1_SEM5 HW_REGISTER_RW(ARM_SBM_OWN1+0x14) -#define ARM_1_SEM6 HW_REGISTER_RW(ARM_SBM_OWN1+0x18) -#define ARM_1_SEM7 HW_REGISTER_RW(ARM_SBM_OWN1+0x1C) -#define ARM_1_BELL0 HW_REGISTER_RW(ARM_SBM_OWN1+0x40) -#define ARM_1_BELL1 HW_REGISTER_RW(ARM_SBM_OWN1+0x44) -#define ARM_1_BELL2 HW_REGISTER_RW(ARM_SBM_OWN1+0x48) -#define ARM_1_BELL3 HW_REGISTER_RW(ARM_SBM_OWN1+0x4C) -/* MAILBOX 0 access in Owner 0 area */ -/* Owner 1 should only WRITE to this mailbox */ -#define ARM_1_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN1+0x80) /* .. 0x8C (4 locations) */ -/*#define ARM_1_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN1+0x80) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_1_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN1+0x90) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_1_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN1+0x94) */ /* DO NOT USE THIS !!!!! */ -#define ARM_1_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN1+0x98) /* Status read */ -/*#define ARM_1_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN1+0x9C) */ /* DO NOT USE THIS !!!!! */ -/* MAILBOX 1 access in Owner 0 area */ -#define ARM_1_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN1+0xA0) /* .. 0xAC (4 locations) */ -#define ARM_1_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN1+0xA0) /* .. 0xAC (4 locations) Normal read */ -#define ARM_1_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN1+0xB0) /* none-pop read */ -#define ARM_1_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN1+0xB4) /* Sender read (only LS 2 bits) */ -#define ARM_1_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN1+0xB8) /* Status read */ -#define ARM_1_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN1+0xBC) -/* General SEM, BELL, MAIL config/status */ -#define ARM_1_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN1+0xE0) /* semaphore clear/debug register */ -#define ARM_1_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN1+0xE4) /* Doorbells clear/debug register */ -#define ARM_1_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN1+0xFC) /* IRQS pending for owner 1 */ -#define ARM_1_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN1+0xF8) /* ALL interrupts */ - -/* Semaphores, Doorbells, Mailboxes Owner 2 */ -#define ARM_2_SEMS HW_REGISTER_RW(ARM_SBM_OWN2+0x00) -#define ARM_2_SEM0 HW_REGISTER_RW(ARM_SBM_OWN2+0x00) -#define ARM_2_SEM1 HW_REGISTER_RW(ARM_SBM_OWN2+0x04) -#define ARM_2_SEM2 HW_REGISTER_RW(ARM_SBM_OWN2+0x08) -#define ARM_2_SEM3 HW_REGISTER_RW(ARM_SBM_OWN2+0x0C) -#define ARM_2_SEM4 HW_REGISTER_RW(ARM_SBM_OWN2+0x10) -#define ARM_2_SEM5 HW_REGISTER_RW(ARM_SBM_OWN2+0x14) -#define ARM_2_SEM6 HW_REGISTER_RW(ARM_SBM_OWN2+0x18) -#define ARM_2_SEM7 HW_REGISTER_RW(ARM_SBM_OWN2+0x1C) -#define ARM_2_BELL0 HW_REGISTER_RW(ARM_SBM_OWN2+0x40) -#define ARM_2_BELL1 HW_REGISTER_RW(ARM_SBM_OWN2+0x44) -#define ARM_2_BELL2 HW_REGISTER_RW(ARM_SBM_OWN2+0x48) -#define ARM_2_BELL3 HW_REGISTER_RW(ARM_SBM_OWN2+0x4C) -/* MAILBOX 0 access in Owner 2 area */ -/* Owner 2 should only WRITE to this mailbox */ -#define ARM_2_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN2+0x80) /* .. 0x8C (4 locations) */ -/*#define ARM_2_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN2+0x80) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_2_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN2+0x90) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_2_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN2+0x94) */ /* DO NOT USE THIS !!!!! */ -#define ARM_2_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN2+0x98) /* Status read */ -/*#define ARM_2_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN2+0x9C) */ /* DO NOT USE THIS !!!!! */ -/* MAILBOX 1 access in Owner 2 area */ -/* Owner 2 should only WRITE to this mailbox */ -#define ARM_2_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN2+0xA0) /* .. 0xAC (4 locations) */ -/*#define ARM_2_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN2+0xA0) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_2_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN2+0xB0) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_2_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN2+0xB4) */ /* DO NOT USE THIS !!!!! */ -#define ARM_2_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN2+0xB8) /* Status read */ -/*#define ARM_2_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN2+0xBC) */ /* DO NOT USE THIS !!!!! */ -/* General SEM, BELL, MAIL config/status */ -#define ARM_2_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN2+0xE0) /* semaphore clear/debug register */ -#define ARM_2_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN2+0xE4) /* Doorbells clear/debug register */ -#define ARM_2_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN2+0xFC) /* IRQS pending for owner 2 */ -#define ARM_2_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN2+0xF8) /* ALL interrupts */ - -/* Semaphores, Doorbells, Mailboxes Owner 3 */ -#define ARM_3_SEMS HW_REGISTER_RW(ARM_SBM_OWN3+0x00) -#define ARM_3_SEM0 HW_REGISTER_RW(ARM_SBM_OWN3+0x00) -#define ARM_3_SEM1 HW_REGISTER_RW(ARM_SBM_OWN3+0x04) -#define ARM_3_SEM2 HW_REGISTER_RW(ARM_SBM_OWN3+0x08) -#define ARM_3_SEM3 HW_REGISTER_RW(ARM_SBM_OWN3+0x0C) -#define ARM_3_SEM4 HW_REGISTER_RW(ARM_SBM_OWN3+0x10) -#define ARM_3_SEM5 HW_REGISTER_RW(ARM_SBM_OWN3+0x14) -#define ARM_3_SEM6 HW_REGISTER_RW(ARM_SBM_OWN3+0x18) -#define ARM_3_SEM7 HW_REGISTER_RW(ARM_SBM_OWN3+0x1C) -#define ARM_3_BELL0 HW_REGISTER_RW(ARM_SBM_OWN3+0x40) -#define ARM_3_BELL1 HW_REGISTER_RW(ARM_SBM_OWN3+0x44) -#define ARM_3_BELL2 HW_REGISTER_RW(ARM_SBM_OWN3+0x48) -#define ARM_3_BELL3 HW_REGISTER_RW(ARM_SBM_OWN3+0x4C) -/* MAILBOX 0 access in Owner 3 area */ -/* Owner 3 should only WRITE to this mailbox */ -#define ARM_3_MAIL0_WRT HW_REGISTER_RW(ARM_SBM_OWN3+0x80) /* .. 0x8C (4 locations) */ -/*#define ARM_3_MAIL0_RD HW_REGISTER_RW(ARM_SBM_OWN3+0x80) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_3_MAIL0_POL HW_REGISTER_RW(ARM_SBM_OWN3+0x90) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_3_MAIL0_SND HW_REGISTER_RW(ARM_SBM_OWN3+0x94) */ /* DO NOT USE THIS !!!!! */ -#define ARM_3_MAIL0_STA HW_REGISTER_RW(ARM_SBM_OWN3+0x98) /* Status read */ -/*#define ARM_3_MAIL0_CNF HW_REGISTER_RW(ARM_SBM_OWN3+0x9C) */ /* DO NOT USE THIS !!!!! */ -/* MAILBOX 1 access in Owner 3 area */ -/* Owner 3 should only WRITE to this mailbox */ -#define ARM_3_MAIL1_WRT HW_REGISTER_RW(ARM_SBM_OWN3+0xA0) /* .. 0xAC (4 locations) */ -/*#define ARM_3_MAIL1_RD HW_REGISTER_RW(ARM_SBM_OWN3+0xA0) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_3_MAIL1_POL HW_REGISTER_RW(ARM_SBM_OWN3+0xB0) */ /* DO NOT USE THIS !!!!! */ -/*#define ARM_3_MAIL1_SND HW_REGISTER_RW(ARM_SBM_OWN3+0xB4) */ /* DO NOT USE THIS !!!!! */ -#define ARM_3_MAIL1_STA HW_REGISTER_RW(ARM_SBM_OWN3+0xB8) /* Status read */ -/*#define ARM_3_MAIL1_CNF HW_REGISTER_RW(ARM_SBM_OWN3+0xBC) */ /* DO NOT USE THIS !!!!! */ -/* General SEM, BELL, MAIL config/status */ -#define ARM_3_SEMCLRDBG HW_REGISTER_RW(ARM_SBM_OWN3+0xE0) /* semaphore clear/debug register */ -#define ARM_3_BELLCLRDBG HW_REGISTER_RW(ARM_SBM_OWN3+0xE4) /* Doorbells clear/debug register */ -#define ARM_3_MY_IRQS HW_REGISTER_RW(ARM_SBM_OWN3+0xFC) /* IRQS pending for owner 3 */ -#define ARM_3_ALL_IRQS HW_REGISTER_RW(ARM_SBM_OWN3+0xF8) /* ALL interrupts */ - - - -/* Mailbox flags. Valid for all owners */ - -/* Mailbox status register (...0x98) */ -#define ARM_MS_FULL 0x80000000 -#define ARM_MS_EMPTY 0x40000000 -#define ARM_MS_LEVEL 0x400000FF /* Max. value depdnds on mailbox depth parameter */ - -/* MAILBOX config/status register (...0x9C) */ -/* ANY write to this register clears the error bits! */ -#define ARM_MC_IHAVEDATAIRQEN 0x00000001 /* mailbox irq enable: has data */ -#define ARM_MC_IHAVESPACEIRQEN 0x00000002 /* mailbox irq enable: has space */ -#define ARM_MC_OPPISEMPTYIRQEN 0x00000004 /* mailbox irq enable: Opp. is empty */ -#define ARM_MC_MAIL_CLEAR 0x00000008 /* mailbox clear write 1, then 0 */ -#define ARM_MC_IHAVEDATAIRQPEND 0x00000010 /* mailbox irq pending: has space */ -#define ARM_MC_IHAVESPACEIRQPEND 0x00000020 /* mailbox irq pending: Opp. is empty */ -#define ARM_MC_OPPISEMPTYIRQPEND 0x00000040 /* mailbox irq pending */ -/* Bit 7 is unused */ -#define ARM_MC_ERRNOOWN 0x00000100 /* error : none owner read from mailbox */ -#define ARM_MC_ERROVERFLW 0x00000200 /* error : write to fill mailbox */ -#define ARM_MC_ERRUNDRFLW 0x00000400 /* error : read from empty mailbox */ - -/* Semaphore clear/debug register (...0xE0) */ -#define ARM_SD_OWN0 0x00000003 /* Owner of sem 0 */ -#define ARM_SD_OWN1 0x0000000C /* Owner of sem 1 */ -#define ARM_SD_OWN2 0x00000030 /* Owner of sem 2 */ -#define ARM_SD_OWN3 0x000000C0 /* Owner of sem 3 */ -#define ARM_SD_OWN4 0x00000300 /* Owner of sem 4 */ -#define ARM_SD_OWN5 0x00000C00 /* Owner of sem 5 */ -#define ARM_SD_OWN6 0x00003000 /* Owner of sem 6 */ -#define ARM_SD_OWN7 0x0000C000 /* Owner of sem 7 */ -#define ARM_SD_SEM0 0x00010000 /* Status of sem 0 */ -#define ARM_SD_SEM1 0x00020000 /* Status of sem 1 */ -#define ARM_SD_SEM2 0x00040000 /* Status of sem 2 */ -#define ARM_SD_SEM3 0x00080000 /* Status of sem 3 */ -#define ARM_SD_SEM4 0x00100000 /* Status of sem 4 */ -#define ARM_SD_SEM5 0x00200000 /* Status of sem 5 */ -#define ARM_SD_SEM6 0x00400000 /* Status of sem 6 */ -#define ARM_SD_SEM7 0x00800000 /* Status of sem 7 */ - -/* Doorbells clear/debug register (...0xE4) */ -#define ARM_BD_OWN0 0x00000003 /* Owner of doorbell 0 */ -#define ARM_BD_OWN1 0x0000000C /* Owner of doorbell 1 */ -#define ARM_BD_OWN2 0x00000030 /* Owner of doorbell 2 */ -#define ARM_BD_OWN3 0x000000C0 /* Owner of doorbell 3 */ -#define ARM_BD_BELL0 0x00000100 /* Status of doorbell 0 */ -#define ARM_BD_BELL1 0x00000200 /* Status of doorbell 1 */ -#define ARM_BD_BELL2 0x00000400 /* Status of doorbell 2 */ -#define ARM_BD_BELL3 0x00000800 /* Status of doorbell 3 */ - -/* MY IRQS register (...0xF8) */ -#define ARM_MYIRQ_BELL 0x00000001 /* This owner has a doorbell IRQ */ -#define ARM_MYIRQ_MAIL 0x00000002 /* This owner has a mailbox IRQ */ - -/* ALL IRQS register (...0xF8) */ -#define ARM_AIS_BELL0 0x00000001 /* Doorbell 0 IRQ pending */ -#define ARM_AIS_BELL1 0x00000002 /* Doorbell 1 IRQ pending */ -#define ARM_AIS_BELL2 0x00000004 /* Doorbell 2 IRQ pending */ -#define ARM_AIS_BELL3 0x00000008 /* Doorbell 3 IRQ pending */ -#define ARM_AIS0_HAVEDATA 0x00000010 /* MAIL 0 has data IRQ pending */ -#define ARM_AIS0_HAVESPAC 0x00000020 /* MAIL 0 has space IRQ pending */ -#define ARM_AIS0_OPPEMPTY 0x00000040 /* MAIL 0 opposite is empty IRQ */ -#define ARM_AIS1_HAVEDATA 0x00000080 /* MAIL 1 has data IRQ pending */ -#define ARM_AIS1_HAVESPAC 0x00000100 /* MAIL 1 has space IRQ pending */ -#define ARM_AIS1_OPPEMPTY 0x00000200 /* MAIL 1 opposite is empty IRQ */ -/* Note that bell-0, bell-1 and MAIL0 IRQ go only to the ARM */ -/* Whilst that bell-2, bell-3 and MAIL1 IRQ go only to the VC */ -/* */ -/* ARM JTAG BASH */ -/* */ -#define AJB_BASE 0x7e2000c0 - -#define AJBCONF HW_REGISTER_RW(AJB_BASE+0x00) -#define AJB_BITS0 0x000000 -#define AJB_BITS4 0x000004 -#define AJB_BITS8 0x000008 -#define AJB_BITS12 0x00000C -#define AJB_BITS16 0x000010 -#define AJB_BITS20 0x000014 -#define AJB_BITS24 0x000018 -#define AJB_BITS28 0x00001C -#define AJB_BITS32 0x000020 -#define AJB_BITS34 0x000022 -#define AJB_OUT_MS 0x000040 -#define AJB_OUT_LS 0x000000 -#define AJB_INV_CLK 0x000080 -#define AJB_D0_RISE 0x000100 -#define AJB_D0_FALL 0x000000 -#define AJB_D1_RISE 0x000200 -#define AJB_D1_FALL 0x000000 -#define AJB_IN_RISE 0x000400 -#define AJB_IN_FALL 0x000000 -#define AJB_ENABLE 0x000800 -#define AJB_HOLD0 0x000000 -#define AJB_HOLD1 0x001000 -#define AJB_HOLD2 0x002000 -#define AJB_HOLD3 0x003000 -#define AJB_RESETN 0x004000 -#define AJB_CLKSHFT 16 -#define AJB_BUSY 0x80000000 -#define AJBTMS HW_REGISTER_RW(AJB_BASE+0x04) -#define AJBTDI HW_REGISTER_RW(AJB_BASE+0x08) -#define AJBTDO HW_REGISTER_RW(AJB_BASE+0x0c) - -#endif diff --git a/arch/arm/mach-bcm2708/include/mach/clkdev.h b/arch/arm/mach-bcm2708/include/mach/clkdev.h deleted file mode 100644 index 04b37a89801cfd..00000000000000 --- a/arch/arm/mach-bcm2708/include/mach/clkdev.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_MACH_CLKDEV_H -#define __ASM_MACH_CLKDEV_H - -#define __clk_get(clk) ({ 1; }) -#define __clk_put(clk) do { } while (0) - -#endif diff --git a/arch/arm/mach-bcm2708/include/mach/frc.h b/arch/arm/mach-bcm2708/include/mach/frc.h deleted file mode 100644 index dd51e073121e62..00000000000000 --- a/arch/arm/mach-bcm2708/include/mach/frc.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * arch/arm/mach-bcm2708/include/mach/timex.h - * - * BCM2708 free running counter (timer) - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _MACH_FRC_H -#define _MACH_FRC_H - -#define FRC_TICK_RATE (1000000) - -/*! Free running counter incrementing at the CLOCK_TICK_RATE - (slightly faster than frc_clock_ticks63() - */ -extern unsigned long frc_clock_ticks32(void); - -/*! Free running counter incrementing at the CLOCK_TICK_RATE - * Note - top bit should be ignored (see cnt32_to_63) - */ -extern unsigned long long frc_clock_ticks63(void); - -#endif diff --git a/arch/arm/mach-bcm2708/include/mach/gpio.h b/arch/arm/mach-bcm2708/include/mach/gpio.h deleted file mode 100644 index 7965a9759b6e25..00000000000000 --- a/arch/arm/mach-bcm2708/include/mach/gpio.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-bcm2708/include/mach/gpio.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H - -#define BCM2708_NR_GPIOS 54 // number of gpio lines - -#define gpio_to_irq(x) ((x) + GPIO_IRQ_START) -#define irq_to_gpio(x) ((x) - GPIO_IRQ_START) - -#endif diff --git a/arch/arm/mach-bcm2708/include/mach/hardware.h b/arch/arm/mach-bcm2708/include/mach/hardware.h deleted file mode 100644 index c2954e898a2f2b..00000000000000 --- a/arch/arm/mach-bcm2708/include/mach/hardware.h +++ /dev/null @@ -1,28 +0,0 @@ -/* - * arch/arm/mach-bcm2708/include/mach/hardware.h - * - * This file contains the hardware definitions of the BCM2708 devices. - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ -#ifndef __ASM_ARCH_HARDWARE_H -#define __ASM_ARCH_HARDWARE_H - -#include -#include - -#endif diff --git a/arch/arm/mach-bcm2708/include/mach/irqs.h b/arch/arm/mach-bcm2708/include/mach/irqs.h deleted file mode 100644 index 45152ed6904c54..00000000000000 --- a/arch/arm/mach-bcm2708/include/mach/irqs.h +++ /dev/null @@ -1,199 +0,0 @@ -/* - * arch/arm/mach-bcm2708/include/mach/irqs.h - * - * Copyright (C) 2010 Broadcom - * Copyright (C) 2003 ARM Limited - * Copyright (C) 2000 Deep Blue Solutions Ltd. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _BCM2708_IRQS_H_ -#define _BCM2708_IRQS_H_ - -#include - -/* - * IRQ interrupts definitions are the same as the INT definitions - * held within platform.h - */ -#define IRQ_ARMCTRL_START 0 -#define IRQ_TIMER0 (IRQ_ARMCTRL_START + INTERRUPT_TIMER0) -#define IRQ_TIMER1 (IRQ_ARMCTRL_START + INTERRUPT_TIMER1) -#define IRQ_TIMER2 (IRQ_ARMCTRL_START + INTERRUPT_TIMER2) -#define IRQ_TIMER3 (IRQ_ARMCTRL_START + INTERRUPT_TIMER3) -#define IRQ_CODEC0 (IRQ_ARMCTRL_START + INTERRUPT_CODEC0) -#define IRQ_CODEC1 (IRQ_ARMCTRL_START + INTERRUPT_CODEC1) -#define IRQ_CODEC2 (IRQ_ARMCTRL_START + INTERRUPT_CODEC2) -#define IRQ_JPEG (IRQ_ARMCTRL_START + INTERRUPT_JPEG) -#define IRQ_ISP (IRQ_ARMCTRL_START + INTERRUPT_ISP) -#define IRQ_USB (IRQ_ARMCTRL_START + INTERRUPT_USB) -#define IRQ_3D (IRQ_ARMCTRL_START + INTERRUPT_3D) -#define IRQ_TRANSPOSER (IRQ_ARMCTRL_START + INTERRUPT_TRANSPOSER) -#define IRQ_MULTICORESYNC0 (IRQ_ARMCTRL_START + INTERRUPT_MULTICORESYNC0) -#define IRQ_MULTICORESYNC1 (IRQ_ARMCTRL_START + INTERRUPT_MULTICORESYNC1) -#define IRQ_MULTICORESYNC2 (IRQ_ARMCTRL_START + INTERRUPT_MULTICORESYNC2) -#define IRQ_MULTICORESYNC3 (IRQ_ARMCTRL_START + INTERRUPT_MULTICORESYNC3) -#define IRQ_DMA0 (IRQ_ARMCTRL_START + INTERRUPT_DMA0) -#define IRQ_DMA1 (IRQ_ARMCTRL_START + INTERRUPT_DMA1) -#define IRQ_DMA2 (IRQ_ARMCTRL_START + INTERRUPT_DMA2) -#define IRQ_DMA3 (IRQ_ARMCTRL_START + INTERRUPT_DMA3) -#define IRQ_DMA4 (IRQ_ARMCTRL_START + INTERRUPT_DMA4) -#define IRQ_DMA5 (IRQ_ARMCTRL_START + INTERRUPT_DMA5) -#define IRQ_DMA6 (IRQ_ARMCTRL_START + INTERRUPT_DMA6) -#define IRQ_DMA7 (IRQ_ARMCTRL_START + INTERRUPT_DMA7) -#define IRQ_DMA8 (IRQ_ARMCTRL_START + INTERRUPT_DMA8) -#define IRQ_DMA9 (IRQ_ARMCTRL_START + INTERRUPT_DMA9) -#define IRQ_DMA10 (IRQ_ARMCTRL_START + INTERRUPT_DMA10) -#define IRQ_DMA11 (IRQ_ARMCTRL_START + INTERRUPT_DMA11) -#define IRQ_DMA12 (IRQ_ARMCTRL_START + INTERRUPT_DMA12) -#define IRQ_AUX (IRQ_ARMCTRL_START + INTERRUPT_AUX) -#define IRQ_ARM (IRQ_ARMCTRL_START + INTERRUPT_ARM) -#define IRQ_VPUDMA (IRQ_ARMCTRL_START + INTERRUPT_VPUDMA) -#define IRQ_HOSTPORT (IRQ_ARMCTRL_START + INTERRUPT_HOSTPORT) -#define IRQ_VIDEOSCALER (IRQ_ARMCTRL_START + INTERRUPT_VIDEOSCALER) -#define IRQ_CCP2TX (IRQ_ARMCTRL_START + INTERRUPT_CCP2TX) -#define IRQ_SDC (IRQ_ARMCTRL_START + INTERRUPT_SDC) -#define IRQ_DSI0 (IRQ_ARMCTRL_START + INTERRUPT_DSI0) -#define IRQ_AVE (IRQ_ARMCTRL_START + INTERRUPT_AVE) -#define IRQ_CAM0 (IRQ_ARMCTRL_START + INTERRUPT_CAM0) -#define IRQ_CAM1 (IRQ_ARMCTRL_START + INTERRUPT_CAM1) -#define IRQ_HDMI0 (IRQ_ARMCTRL_START + INTERRUPT_HDMI0) -#define IRQ_HDMI1 (IRQ_ARMCTRL_START + INTERRUPT_HDMI1) -#define IRQ_PIXELVALVE1 (IRQ_ARMCTRL_START + INTERRUPT_PIXELVALVE1) -#define IRQ_I2CSPISLV (IRQ_ARMCTRL_START + INTERRUPT_I2CSPISLV) -#define IRQ_DSI1 (IRQ_ARMCTRL_START + INTERRUPT_DSI1) -#define IRQ_PWA0 (IRQ_ARMCTRL_START + INTERRUPT_PWA0) -#define IRQ_PWA1 (IRQ_ARMCTRL_START + INTERRUPT_PWA1) -#define IRQ_CPR (IRQ_ARMCTRL_START + INTERRUPT_CPR) -#define IRQ_SMI (IRQ_ARMCTRL_START + INTERRUPT_SMI) -#define IRQ_GPIO0 (IRQ_ARMCTRL_START + INTERRUPT_GPIO0) -#define IRQ_GPIO1 (IRQ_ARMCTRL_START + INTERRUPT_GPIO1) -#define IRQ_GPIO2 (IRQ_ARMCTRL_START + INTERRUPT_GPIO2) -#define IRQ_GPIO3 (IRQ_ARMCTRL_START + INTERRUPT_GPIO3) -#define IRQ_I2C (IRQ_ARMCTRL_START + INTERRUPT_I2C) -#define IRQ_SPI (IRQ_ARMCTRL_START + INTERRUPT_SPI) -#define IRQ_I2SPCM (IRQ_ARMCTRL_START + INTERRUPT_I2SPCM) -#define IRQ_SDIO (IRQ_ARMCTRL_START + INTERRUPT_SDIO) -#define IRQ_UART (IRQ_ARMCTRL_START + INTERRUPT_UART) -#define IRQ_SLIMBUS (IRQ_ARMCTRL_START + INTERRUPT_SLIMBUS) -#define IRQ_VEC (IRQ_ARMCTRL_START + INTERRUPT_VEC) -#define IRQ_CPG (IRQ_ARMCTRL_START + INTERRUPT_CPG) -#define IRQ_RNG (IRQ_ARMCTRL_START + INTERRUPT_RNG) -#define IRQ_ARASANSDIO (IRQ_ARMCTRL_START + INTERRUPT_ARASANSDIO) -#define IRQ_AVSPMON (IRQ_ARMCTRL_START + INTERRUPT_AVSPMON) - -#define IRQ_ARM_TIMER (IRQ_ARMCTRL_START + INTERRUPT_ARM_TIMER) -#define IRQ_ARM_MAILBOX (IRQ_ARMCTRL_START + INTERRUPT_ARM_MAILBOX) -#define IRQ_ARM_DOORBELL_0 (IRQ_ARMCTRL_START + INTERRUPT_ARM_DOORBELL_0) -#define IRQ_ARM_DOORBELL_1 (IRQ_ARMCTRL_START + INTERRUPT_ARM_DOORBELL_1) -#define IRQ_VPU0_HALTED (IRQ_ARMCTRL_START + INTERRUPT_VPU0_HALTED) -#define IRQ_VPU1_HALTED (IRQ_ARMCTRL_START + INTERRUPT_VPU1_HALTED) -#define IRQ_ILLEGAL_TYPE0 (IRQ_ARMCTRL_START + INTERRUPT_ILLEGAL_TYPE0) -#define IRQ_ILLEGAL_TYPE1 (IRQ_ARMCTRL_START + INTERRUPT_ILLEGAL_TYPE1) -#define IRQ_PENDING1 (IRQ_ARMCTRL_START + INTERRUPT_PENDING1) -#define IRQ_PENDING2 (IRQ_ARMCTRL_START + INTERRUPT_PENDING2) - -#define FIQ_START HARD_IRQS - -/* - * FIQ interrupts definitions are the same as the INT definitions. - */ -#define FIQ_TIMER0 (FIQ_START+INTERRUPT_TIMER0) -#define FIQ_TIMER1 (FIQ_START+INTERRUPT_TIMER1) -#define FIQ_TIMER2 (FIQ_START+INTERRUPT_TIMER2) -#define FIQ_TIMER3 (FIQ_START+INTERRUPT_TIMER3) -#define FIQ_CODEC0 (FIQ_START+INTERRUPT_CODEC0) -#define FIQ_CODEC1 (FIQ_START+INTERRUPT_CODEC1) -#define FIQ_CODEC2 (FIQ_START+INTERRUPT_CODEC2) -#define FIQ_JPEG (FIQ_START+INTERRUPT_JPEG) -#define FIQ_ISP (FIQ_START+INTERRUPT_ISP) -#define FIQ_USB (FIQ_START+INTERRUPT_USB) -#define FIQ_3D (FIQ_START+INTERRUPT_3D) -#define FIQ_TRANSPOSER (FIQ_START+INTERRUPT_TRANSPOSER) -#define FIQ_MULTICORESYNC0 (FIQ_START+INTERRUPT_MULTICORESYNC0) -#define FIQ_MULTICORESYNC1 (FIQ_START+INTERRUPT_MULTICORESYNC1) -#define FIQ_MULTICORESYNC2 (FIQ_START+INTERRUPT_MULTICORESYNC2) -#define FIQ_MULTICORESYNC3 (FIQ_START+INTERRUPT_MULTICORESYNC3) -#define FIQ_DMA0 (FIQ_START+INTERRUPT_DMA0) -#define FIQ_DMA1 (FIQ_START+INTERRUPT_DMA1) -#define FIQ_DMA2 (FIQ_START+INTERRUPT_DMA2) -#define FIQ_DMA3 (FIQ_START+INTERRUPT_DMA3) -#define FIQ_DMA4 (FIQ_START+INTERRUPT_DMA4) -#define FIQ_DMA5 (FIQ_START+INTERRUPT_DMA5) -#define FIQ_DMA6 (FIQ_START+INTERRUPT_DMA6) -#define FIQ_DMA7 (FIQ_START+INTERRUPT_DMA7) -#define FIQ_DMA8 (FIQ_START+INTERRUPT_DMA8) -#define FIQ_DMA9 (FIQ_START+INTERRUPT_DMA9) -#define FIQ_DMA10 (FIQ_START+INTERRUPT_DMA10) -#define FIQ_DMA11 (FIQ_START+INTERRUPT_DMA11) -#define FIQ_DMA12 (FIQ_START+INTERRUPT_DMA12) -#define FIQ_AUX (FIQ_START+INTERRUPT_AUX) -#define FIQ_ARM (FIQ_START+INTERRUPT_ARM) -#define FIQ_VPUDMA (FIQ_START+INTERRUPT_VPUDMA) -#define FIQ_HOSTPORT (FIQ_START+INTERRUPT_HOSTPORT) -#define FIQ_VIDEOSCALER (FIQ_START+INTERRUPT_VIDEOSCALER) -#define FIQ_CCP2TX (FIQ_START+INTERRUPT_CCP2TX) -#define FIQ_SDC (FIQ_START+INTERRUPT_SDC) -#define FIQ_DSI0 (FIQ_START+INTERRUPT_DSI0) -#define FIQ_AVE (FIQ_START+INTERRUPT_AVE) -#define FIQ_CAM0 (FIQ_START+INTERRUPT_CAM0) -#define FIQ_CAM1 (FIQ_START+INTERRUPT_CAM1) -#define FIQ_HDMI0 (FIQ_START+INTERRUPT_HDMI0) -#define FIQ_HDMI1 (FIQ_START+INTERRUPT_HDMI1) -#define FIQ_PIXELVALVE1 (FIQ_START+INTERRUPT_PIXELVALVE1) -#define FIQ_I2CSPISLV (FIQ_START+INTERRUPT_I2CSPISLV) -#define FIQ_DSI1 (FIQ_START+INTERRUPT_DSI1) -#define FIQ_PWA0 (FIQ_START+INTERRUPT_PWA0) -#define FIQ_PWA1 (FIQ_START+INTERRUPT_PWA1) -#define FIQ_CPR (FIQ_START+INTERRUPT_CPR) -#define FIQ_SMI (FIQ_START+INTERRUPT_SMI) -#define FIQ_GPIO0 (FIQ_START+INTERRUPT_GPIO0) -#define FIQ_GPIO1 (FIQ_START+INTERRUPT_GPIO1) -#define FIQ_GPIO2 (FIQ_START+INTERRUPT_GPIO2) -#define FIQ_GPIO3 (FIQ_START+INTERRUPT_GPIO3) -#define FIQ_I2C (FIQ_START+INTERRUPT_I2C) -#define FIQ_SPI (FIQ_START+INTERRUPT_SPI) -#define FIQ_I2SPCM (FIQ_START+INTERRUPT_I2SPCM) -#define FIQ_SDIO (FIQ_START+INTERRUPT_SDIO) -#define FIQ_UART (FIQ_START+INTERRUPT_UART) -#define FIQ_SLIMBUS (FIQ_START+INTERRUPT_SLIMBUS) -#define FIQ_VEC (FIQ_START+INTERRUPT_VEC) -#define FIQ_CPG (FIQ_START+INTERRUPT_CPG) -#define FIQ_RNG (FIQ_START+INTERRUPT_RNG) -#define FIQ_ARASANSDIO (FIQ_START+INTERRUPT_ARASANSDIO) -#define FIQ_AVSPMON (FIQ_START+INTERRUPT_AVSPMON) - -#define FIQ_ARM_TIMER (FIQ_START+INTERRUPT_ARM_TIMER) -#define FIQ_ARM_MAILBOX (FIQ_START+INTERRUPT_ARM_MAILBOX) -#define FIQ_ARM_DOORBELL_0 (FIQ_START+INTERRUPT_ARM_DOORBELL_0) -#define FIQ_ARM_DOORBELL_1 (FIQ_START+INTERRUPT_ARM_DOORBELL_1) -#define FIQ_VPU0_HALTED (FIQ_START+INTERRUPT_VPU0_HALTED) -#define FIQ_VPU1_HALTED (FIQ_START+INTERRUPT_VPU1_HALTED) -#define FIQ_ILLEGAL_TYPE0 (FIQ_START+INTERRUPT_ILLEGAL_TYPE0) -#define FIQ_ILLEGAL_TYPE1 (FIQ_START+INTERRUPT_ILLEGAL_TYPE1) -#define FIQ_PENDING1 (FIQ_START+INTERRUPT_PENDING1) -#define FIQ_PENDING2 (FIQ_START+INTERRUPT_PENDING2) - -#define HARD_IRQS (64 + 21) -#define FIQ_IRQS (64 + 21) -#define GPIO_IRQ_START (HARD_IRQS + FIQ_IRQS) -#define GPIO_IRQS (32*5) -#define SPARE_ALLOC_IRQS 64 -#define BCM2708_ALLOC_IRQS (HARD_IRQS+FIQ_IRQS+GPIO_IRQS+SPARE_ALLOC_IRQS) -#define FREE_IRQS 128 -#define NR_IRQS (BCM2708_ALLOC_IRQS+FREE_IRQS) - -#endif /* _BCM2708_IRQS_H_ */ diff --git a/arch/arm/mach-bcm2708/include/mach/platform.h b/arch/arm/mach-bcm2708/include/mach/platform.h index 0c57a5786ac306..e98ec5acc70ba9 100644 --- a/arch/arm/mach-bcm2708/include/mach/platform.h +++ b/arch/arm/mach-bcm2708/include/mach/platform.h @@ -47,9 +47,6 @@ #define HW_REGISTER_RW(addr) (addr) #define HW_REGISTER_RO(addr) (addr) -#include "arm_control.h" -#undef ARM_BASE - /* * Definitions and addresses for the ARM CONTROL logic * This file is manually generated. @@ -84,118 +81,6 @@ #define ARMCTRL_0_BELL_BASE (ARMCTRL_0_SBM_BASE + 0x40) /* User 0 (ARM)'s Doorbell */ #define ARMCTRL_0_MAIL0_BASE (ARMCTRL_0_SBM_BASE + 0x80) /* User 0 (ARM)'s Mailbox 0 */ - -/* - * Interrupt assignments - */ - -#define ARM_IRQ1_BASE 0 -#define INTERRUPT_TIMER0 (ARM_IRQ1_BASE + 0) -#define INTERRUPT_TIMER1 (ARM_IRQ1_BASE + 1) -#define INTERRUPT_TIMER2 (ARM_IRQ1_BASE + 2) -#define INTERRUPT_TIMER3 (ARM_IRQ1_BASE + 3) -#define INTERRUPT_CODEC0 (ARM_IRQ1_BASE + 4) -#define INTERRUPT_CODEC1 (ARM_IRQ1_BASE + 5) -#define INTERRUPT_CODEC2 (ARM_IRQ1_BASE + 6) -#define INTERRUPT_VC_JPEG (ARM_IRQ1_BASE + 7) -#define INTERRUPT_ISP (ARM_IRQ1_BASE + 8) -#define INTERRUPT_VC_USB (ARM_IRQ1_BASE + 9) -#define INTERRUPT_VC_3D (ARM_IRQ1_BASE + 10) -#define INTERRUPT_TRANSPOSER (ARM_IRQ1_BASE + 11) -#define INTERRUPT_MULTICORESYNC0 (ARM_IRQ1_BASE + 12) -#define INTERRUPT_MULTICORESYNC1 (ARM_IRQ1_BASE + 13) -#define INTERRUPT_MULTICORESYNC2 (ARM_IRQ1_BASE + 14) -#define INTERRUPT_MULTICORESYNC3 (ARM_IRQ1_BASE + 15) -#define INTERRUPT_DMA0 (ARM_IRQ1_BASE + 16) -#define INTERRUPT_DMA1 (ARM_IRQ1_BASE + 17) -#define INTERRUPT_VC_DMA2 (ARM_IRQ1_BASE + 18) -#define INTERRUPT_VC_DMA3 (ARM_IRQ1_BASE + 19) -#define INTERRUPT_DMA4 (ARM_IRQ1_BASE + 20) -#define INTERRUPT_DMA5 (ARM_IRQ1_BASE + 21) -#define INTERRUPT_DMA6 (ARM_IRQ1_BASE + 22) -#define INTERRUPT_DMA7 (ARM_IRQ1_BASE + 23) -#define INTERRUPT_DMA8 (ARM_IRQ1_BASE + 24) -#define INTERRUPT_DMA9 (ARM_IRQ1_BASE + 25) -#define INTERRUPT_DMA10 (ARM_IRQ1_BASE + 26) -#define INTERRUPT_DMA11 (ARM_IRQ1_BASE + 27) -#define INTERRUPT_DMA12 (ARM_IRQ1_BASE + 28) -#define INTERRUPT_AUX (ARM_IRQ1_BASE + 29) -#define INTERRUPT_ARM (ARM_IRQ1_BASE + 30) -#define INTERRUPT_VPUDMA (ARM_IRQ1_BASE + 31) - -#define ARM_IRQ2_BASE 32 -#define INTERRUPT_HOSTPORT (ARM_IRQ2_BASE + 0) -#define INTERRUPT_VIDEOSCALER (ARM_IRQ2_BASE + 1) -#define INTERRUPT_CCP2TX (ARM_IRQ2_BASE + 2) -#define INTERRUPT_SDC (ARM_IRQ2_BASE + 3) -#define INTERRUPT_DSI0 (ARM_IRQ2_BASE + 4) -#define INTERRUPT_AVE (ARM_IRQ2_BASE + 5) -#define INTERRUPT_CAM0 (ARM_IRQ2_BASE + 6) -#define INTERRUPT_CAM1 (ARM_IRQ2_BASE + 7) -#define INTERRUPT_HDMI0 (ARM_IRQ2_BASE + 8) -#define INTERRUPT_HDMI1 (ARM_IRQ2_BASE + 9) -#define INTERRUPT_PIXELVALVE1 (ARM_IRQ2_BASE + 10) -#define INTERRUPT_I2CSPISLV (ARM_IRQ2_BASE + 11) -#define INTERRUPT_DSI1 (ARM_IRQ2_BASE + 12) -#define INTERRUPT_PWA0 (ARM_IRQ2_BASE + 13) -#define INTERRUPT_PWA1 (ARM_IRQ2_BASE + 14) -#define INTERRUPT_CPR (ARM_IRQ2_BASE + 15) -#define INTERRUPT_SMI (ARM_IRQ2_BASE + 16) -#define INTERRUPT_GPIO0 (ARM_IRQ2_BASE + 17) -#define INTERRUPT_GPIO1 (ARM_IRQ2_BASE + 18) -#define INTERRUPT_GPIO2 (ARM_IRQ2_BASE + 19) -#define INTERRUPT_GPIO3 (ARM_IRQ2_BASE + 20) -#define INTERRUPT_VC_I2C (ARM_IRQ2_BASE + 21) -#define INTERRUPT_VC_SPI (ARM_IRQ2_BASE + 22) -#define INTERRUPT_VC_I2SPCM (ARM_IRQ2_BASE + 23) -#define INTERRUPT_VC_SDIO (ARM_IRQ2_BASE + 24) -#define INTERRUPT_VC_UART (ARM_IRQ2_BASE + 25) -#define INTERRUPT_SLIMBUS (ARM_IRQ2_BASE + 26) -#define INTERRUPT_VEC (ARM_IRQ2_BASE + 27) -#define INTERRUPT_CPG (ARM_IRQ2_BASE + 28) -#define INTERRUPT_RNG (ARM_IRQ2_BASE + 29) -#define INTERRUPT_VC_ARASANSDIO (ARM_IRQ2_BASE + 30) -#define INTERRUPT_AVSPMON (ARM_IRQ2_BASE + 31) - -#define ARM_IRQ0_BASE 64 -#define INTERRUPT_ARM_TIMER (ARM_IRQ0_BASE + 0) -#define INTERRUPT_ARM_MAILBOX (ARM_IRQ0_BASE + 1) -#define INTERRUPT_ARM_DOORBELL_0 (ARM_IRQ0_BASE + 2) -#define INTERRUPT_ARM_DOORBELL_1 (ARM_IRQ0_BASE + 3) -#define INTERRUPT_VPU0_HALTED (ARM_IRQ0_BASE + 4) -#define INTERRUPT_VPU1_HALTED (ARM_IRQ0_BASE + 5) -#define INTERRUPT_ILLEGAL_TYPE0 (ARM_IRQ0_BASE + 6) -#define INTERRUPT_ILLEGAL_TYPE1 (ARM_IRQ0_BASE + 7) -#define INTERRUPT_PENDING1 (ARM_IRQ0_BASE + 8) -#define INTERRUPT_PENDING2 (ARM_IRQ0_BASE + 9) -#define INTERRUPT_JPEG (ARM_IRQ0_BASE + 10) -#define INTERRUPT_USB (ARM_IRQ0_BASE + 11) -#define INTERRUPT_3D (ARM_IRQ0_BASE + 12) -#define INTERRUPT_DMA2 (ARM_IRQ0_BASE + 13) -#define INTERRUPT_DMA3 (ARM_IRQ0_BASE + 14) -#define INTERRUPT_I2C (ARM_IRQ0_BASE + 15) -#define INTERRUPT_SPI (ARM_IRQ0_BASE + 16) -#define INTERRUPT_I2SPCM (ARM_IRQ0_BASE + 17) -#define INTERRUPT_SDIO (ARM_IRQ0_BASE + 18) -#define INTERRUPT_UART (ARM_IRQ0_BASE + 19) -#define INTERRUPT_ARASANSDIO (ARM_IRQ0_BASE + 20) - -#define MAXIRQNUM (32 + 32 + 20) -#define MAXFIQNUM (32 + 32 + 20) - -#define MAX_PERIOD 699050 -#define TICKS_PER_uSEC 1 - -/* - * These are useconds NOT ticks. - * - */ -#define mSEC_1 1000 -#define mSEC_5 (mSEC_1 * 5) -#define mSEC_10 (mSEC_1 * 10) -#define mSEC_25 (mSEC_1 * 25) -#define SEC_1 (mSEC_1 * 1000) - /* * Watchdog */ diff --git a/arch/arm/mach-bcm2708/include/mach/system.h b/arch/arm/mach-bcm2708/include/mach/system.h index 2d0b8218f1d695..c9a9c9a881102c 100644 --- a/arch/arm/mach-bcm2708/include/mach/system.h +++ b/arch/arm/mach-bcm2708/include/mach/system.h @@ -23,7 +23,6 @@ #define __ASM_ARCH_SYSTEM_H #include -#include #include static inline void arch_idle(void) diff --git a/arch/arm/mach-bcm2708/include/mach/timex.h b/arch/arm/mach-bcm2708/include/mach/timex.h deleted file mode 100644 index 64a660c236469f..00000000000000 --- a/arch/arm/mach-bcm2708/include/mach/timex.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * arch/arm/mach-bcm2708/include/mach/timex.h - * - * BCM2708 sysem clock frequency - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE (1000000) diff --git a/arch/arm/mach-bcm2708/include/mach/uncompress.h b/arch/arm/mach-bcm2708/include/mach/uncompress.h index d63481389fe5b7..de7504bfc20ba2 100644 --- a/arch/arm/mach-bcm2708/include/mach/uncompress.h +++ b/arch/arm/mach-bcm2708/include/mach/uncompress.h @@ -21,7 +21,7 @@ #include #include -#include +#include #define UART_BAUD 115200 diff --git a/arch/arm/mach-bcm2709/Kconfig b/arch/arm/mach-bcm2709/Kconfig index d61ade02575b29..643b4b984512a5 100644 --- a/arch/arm/mach-bcm2709/Kconfig +++ b/arch/arm/mach-bcm2709/Kconfig @@ -6,25 +6,6 @@ config MACH_BCM2709 help Include support for the Broadcom(R) BCM2709 platform. -config BCM2709_DT - bool "BCM2709 Device Tree support" - depends on MACH_BCM2709 - default n - select USE_OF - select ARCH_REQUIRE_GPIOLIB - select PINCTRL - select PINCTRL_BCM2835 - help - Enable Device Tree support for BCM2709 - -config BCM2708_GPIO - bool "BCM2709 gpio support" - depends on MACH_BCM2709 - select ARCH_REQUIRE_GPIOLIB - default y - help - Include support for the Broadcom(R) BCM2709 gpio. - config BCM2708_NOL2CACHE bool "Videocore L2 cache disable" depends on MACH_BCM2709 @@ -32,11 +13,4 @@ config BCM2708_NOL2CACHE help Do not allow ARM to use GPU's L2 cache. Requires disable_l2cache in config.txt. -config BCM2708_SPIDEV - bool "Bind spidev to SPI0 master" - depends on MACH_BCM2709 - depends on SPI - default y - help - Binds spidev driver to the SPI0 master endmenu diff --git a/arch/arm/mach-bcm2709/Makefile b/arch/arm/mach-bcm2709/Makefile index 1ae8b800f8720a..11ad8467565c41 100644 --- a/arch/arm/mach-bcm2709/Makefile +++ b/arch/arm/mach-bcm2709/Makefile @@ -3,4 +3,3 @@ # obj-$(CONFIG_MACH_BCM2709) += bcm2709.o armctrl.o -obj-$(CONFIG_BCM2708_GPIO) += bcm2708_gpio.o diff --git a/arch/arm/mach-bcm2709/bcm2708_gpio.c b/arch/arm/mach-bcm2709/bcm2708_gpio.c deleted file mode 100644 index ef817fea063414..00000000000000 --- a/arch/arm/mach-bcm2709/bcm2708_gpio.c +++ /dev/null @@ -1,425 +0,0 @@ -/* - * linux/arch/arm/mach-bcm2708/bcm2708_gpio.c - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - * - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#include - -#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio" -#define DRIVER_NAME BCM_GPIO_DRIVER_NAME -#define BCM_GPIO_USE_IRQ 1 - -#define GPIOFSEL(x) (0x00+(x)*4) -#define GPIOSET(x) (0x1c+(x)*4) -#define GPIOCLR(x) (0x28+(x)*4) -#define GPIOLEV(x) (0x34+(x)*4) -#define GPIOEDS(x) (0x40+(x)*4) -#define GPIOREN(x) (0x4c+(x)*4) -#define GPIOFEN(x) (0x58+(x)*4) -#define GPIOHEN(x) (0x64+(x)*4) -#define GPIOLEN(x) (0x70+(x)*4) -#define GPIOAREN(x) (0x7c+(x)*4) -#define GPIOAFEN(x) (0x88+(x)*4) -#define GPIOUD(x) (0x94+(x)*4) -#define GPIOUDCLK(x) (0x98+(x)*4) - -#define GPIO_BANKS 2 - -enum { GPIO_FSEL_INPUT, GPIO_FSEL_OUTPUT, - GPIO_FSEL_ALT5, GPIO_FSEL_ALT_4, - GPIO_FSEL_ALT0, GPIO_FSEL_ALT1, - GPIO_FSEL_ALT2, GPIO_FSEL_ALT3, -}; - - /* Each of the two spinlocks protects a different set of hardware - * regiters and data structurs. This decouples the code of the IRQ from - * the GPIO code. This also makes the case of a GPIO routine call from - * the IRQ code simpler. - */ -static DEFINE_SPINLOCK(lock); /* GPIO registers */ - -struct bcm2708_gpio { - struct list_head list; - void __iomem *base; - struct gpio_chip gc; - unsigned long rising[(BCM2708_NR_GPIOS + 31) / 32]; - unsigned long falling[(BCM2708_NR_GPIOS + 31) / 32]; - unsigned long high[(BCM2708_NR_GPIOS + 31) / 32]; - unsigned long low[(BCM2708_NR_GPIOS + 31) / 32]; -}; - -static int bcm2708_set_function(struct gpio_chip *gc, unsigned offset, - int function) -{ - struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); - unsigned long flags; - unsigned gpiodir; - unsigned gpio_bank = offset / 10; - unsigned gpio_field_offset = (offset - 10 * gpio_bank) * 3; - -//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set_function %p (%d,%d)\n", gc, offset, function); - if (offset >= BCM2708_NR_GPIOS) - return -EINVAL; - - spin_lock_irqsave(&lock, flags); - - gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank)); - gpiodir &= ~(7 << gpio_field_offset); - gpiodir |= function << gpio_field_offset; - writel(gpiodir, gpio->base + GPIOFSEL(gpio_bank)); - spin_unlock_irqrestore(&lock, flags); - gpiodir = readl(gpio->base + GPIOFSEL(gpio_bank)); - - return 0; -} - -static int bcm2708_gpio_dir_in(struct gpio_chip *gc, unsigned offset) -{ - return bcm2708_set_function(gc, offset, GPIO_FSEL_INPUT); -} - -static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value); -static int bcm2708_gpio_dir_out(struct gpio_chip *gc, unsigned offset, - int value) -{ - int ret; - ret = bcm2708_set_function(gc, offset, GPIO_FSEL_OUTPUT); - if (ret >= 0) - bcm2708_gpio_set(gc, offset, value); - return ret; -} - -static int bcm2708_gpio_get(struct gpio_chip *gc, unsigned offset) -{ - struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); - unsigned gpio_bank = offset / 32; - unsigned gpio_field_offset = (offset - 32 * gpio_bank); - unsigned lev; - - if (offset >= BCM2708_NR_GPIOS) - return 0; - lev = readl(gpio->base + GPIOLEV(gpio_bank)); -//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_get %p (%d)=%d\n", gc, offset, 0x1 & (lev>>gpio_field_offset)); - return 0x1 & (lev >> gpio_field_offset); -} - -static void bcm2708_gpio_set(struct gpio_chip *gc, unsigned offset, int value) -{ - struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); - unsigned gpio_bank = offset / 32; - unsigned gpio_field_offset = (offset - 32 * gpio_bank); -//printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_set %p (%d=%d)\n", gc, offset, value); - if (offset >= BCM2708_NR_GPIOS) - return; - if (value) - writel(1 << gpio_field_offset, gpio->base + GPIOSET(gpio_bank)); - else - writel(1 << gpio_field_offset, gpio->base + GPIOCLR(gpio_bank)); -} - -/********************** - * extension to configure pullups - */ -int bcm2708_gpio_setpull(struct gpio_chip *gc, unsigned offset, - bcm2708_gpio_pull_t value) -{ - struct bcm2708_gpio *gpio = container_of(gc, struct bcm2708_gpio, gc); - unsigned gpio_bank = offset / 32; - unsigned gpio_field_offset = (offset - 32 * gpio_bank); - - if (offset >= BCM2708_NR_GPIOS) - return -EINVAL; - - switch (value) { - case BCM2708_PULL_UP: - writel(2, gpio->base + GPIOUD(0)); - break; - case BCM2708_PULL_DOWN: - writel(1, gpio->base + GPIOUD(0)); - break; - case BCM2708_PULL_OFF: - writel(0, gpio->base + GPIOUD(0)); - break; - } - - udelay(5); - writel(1 << gpio_field_offset, gpio->base + GPIOUDCLK(gpio_bank)); - udelay(5); - writel(0, gpio->base + GPIOUD(0)); - writel(0 << gpio_field_offset, gpio->base + GPIOUDCLK(gpio_bank)); - - return 0; -} -EXPORT_SYMBOL(bcm2708_gpio_setpull); - -/************************************************************************************************************************* - * bcm2708 GPIO IRQ - */ - -#if BCM_GPIO_USE_IRQ - -static int bcm2708_gpio_to_irq(struct gpio_chip *chip, unsigned gpio) -{ - return gpio_to_irq(gpio); -} - -static int bcm2708_gpio_irq_set_type(struct irq_data *d, unsigned type) -{ - unsigned irq = d->irq; - struct bcm2708_gpio *gpio = irq_get_chip_data(irq); - unsigned gn = irq_to_gpio(irq); - unsigned gb = gn / 32; - unsigned go = gn % 32; - - gpio->rising[gb] &= ~(1 << go); - gpio->falling[gb] &= ~(1 << go); - gpio->high[gb] &= ~(1 << go); - gpio->low[gb] &= ~(1 << go); - - if (type & ~(IRQ_TYPE_EDGE_FALLING | IRQ_TYPE_EDGE_RISING | IRQ_TYPE_LEVEL_LOW | IRQ_TYPE_LEVEL_HIGH)) - return -EINVAL; - - if (type & IRQ_TYPE_EDGE_RISING) - gpio->rising[gb] |= (1 << go); - if (type & IRQ_TYPE_EDGE_FALLING) - gpio->falling[gb] |= (1 << go); - if (type & IRQ_TYPE_LEVEL_HIGH) - gpio->high[gb] |= (1 << go); - if (type & IRQ_TYPE_LEVEL_LOW) - gpio->low[gb] |= (1 << go); - return 0; -} - -static void bcm2708_gpio_irq_mask(struct irq_data *d) -{ - unsigned irq = d->irq; - struct bcm2708_gpio *gpio = irq_get_chip_data(irq); - unsigned gn = irq_to_gpio(irq); - unsigned gb = gn / 32; - unsigned long rising = readl(gpio->base + GPIOREN(gb)); - unsigned long falling = readl(gpio->base + GPIOFEN(gb)); - unsigned long high = readl(gpio->base + GPIOHEN(gb)); - unsigned long low = readl(gpio->base + GPIOLEN(gb)); - - gn = gn % 32; - - writel(rising & ~(1 << gn), gpio->base + GPIOREN(gb)); - writel(falling & ~(1 << gn), gpio->base + GPIOFEN(gb)); - writel(high & ~(1 << gn), gpio->base + GPIOHEN(gb)); - writel(low & ~(1 << gn), gpio->base + GPIOLEN(gb)); -} - -static void bcm2708_gpio_irq_unmask(struct irq_data *d) -{ - unsigned irq = d->irq; - struct bcm2708_gpio *gpio = irq_get_chip_data(irq); - unsigned gn = irq_to_gpio(irq); - unsigned gb = gn / 32; - unsigned go = gn % 32; - unsigned long rising = readl(gpio->base + GPIOREN(gb)); - unsigned long falling = readl(gpio->base + GPIOFEN(gb)); - unsigned long high = readl(gpio->base + GPIOHEN(gb)); - unsigned long low = readl(gpio->base + GPIOLEN(gb)); - - if (gpio->rising[gb] & (1 << go)) { - writel(rising | (1 << go), gpio->base + GPIOREN(gb)); - } else { - writel(rising & ~(1 << go), gpio->base + GPIOREN(gb)); - } - - if (gpio->falling[gb] & (1 << go)) { - writel(falling | (1 << go), gpio->base + GPIOFEN(gb)); - } else { - writel(falling & ~(1 << go), gpio->base + GPIOFEN(gb)); - } - - if (gpio->high[gb] & (1 << go)) { - writel(high | (1 << go), gpio->base + GPIOHEN(gb)); - } else { - writel(high & ~(1 << go), gpio->base + GPIOHEN(gb)); - } - - if (gpio->low[gb] & (1 << go)) { - writel(low | (1 << go), gpio->base + GPIOLEN(gb)); - } else { - writel(low & ~(1 << go), gpio->base + GPIOLEN(gb)); - } -} - -static struct irq_chip bcm2708_irqchip = { - .name = "GPIO", - .irq_enable = bcm2708_gpio_irq_unmask, - .irq_disable = bcm2708_gpio_irq_mask, - .irq_unmask = bcm2708_gpio_irq_unmask, - .irq_mask = bcm2708_gpio_irq_mask, - .irq_set_type = bcm2708_gpio_irq_set_type, -}; - -static irqreturn_t bcm2708_gpio_interrupt(int irq, void *dev_id) -{ - unsigned long edsr; - unsigned bank; - int i; - unsigned gpio; - unsigned level_bits; - struct bcm2708_gpio *gpio_data = dev_id; - - for (bank = 0; bank < GPIO_BANKS; bank++) { - edsr = readl(__io_address(GPIO_BASE) + GPIOEDS(bank)); - level_bits = gpio_data->high[bank] | gpio_data->low[bank]; - - for_each_set_bit(i, &edsr, 32) { - gpio = i + bank * 32; - /* ack edge triggered IRQs immediately */ - if (!(level_bits & (1<gc.to_irq = bcm2708_gpio_to_irq; - - for (irq = GPIO_IRQ_START; irq < (GPIO_IRQ_START + GPIO_IRQS); irq++) { - irq_set_chip_data(irq, ucb); - irq_set_chip_and_handler(irq, &bcm2708_irqchip, - handle_simple_irq); - } - - bcm2708_gpio_irq.dev_id = ucb; - setup_irq(IRQ_GPIO3, &bcm2708_gpio_irq); -} - -#else - -static void bcm2708_gpio_irq_init(struct bcm2708_gpio *ucb) -{ -} - -#endif /* #if BCM_GPIO_USE_IRQ ***************************************************************************************************************** */ - -static int bcm2708_gpio_probe(struct platform_device *dev) -{ - struct bcm2708_gpio *ucb; - struct resource *res; - int bank; - int err = 0; - - printk(KERN_INFO DRIVER_NAME ": bcm2708_gpio_probe %p\n", dev); - - ucb = kzalloc(sizeof(*ucb), GFP_KERNEL); - if (NULL == ucb) { - printk(KERN_ERR DRIVER_NAME ": failed to allocate " - "mailbox memory\n"); - err = -ENOMEM; - goto err; - } - - res = platform_get_resource(dev, IORESOURCE_MEM, 0); - - platform_set_drvdata(dev, ucb); - ucb->base = __io_address(GPIO_BASE); - - ucb->gc.label = "bcm2708_gpio"; - ucb->gc.base = 0; - ucb->gc.ngpio = BCM2708_NR_GPIOS; - ucb->gc.owner = THIS_MODULE; - - ucb->gc.direction_input = bcm2708_gpio_dir_in; - ucb->gc.direction_output = bcm2708_gpio_dir_out; - ucb->gc.get = bcm2708_gpio_get; - ucb->gc.set = bcm2708_gpio_set; - ucb->gc.can_sleep = 0; - - for (bank = 0; bank < GPIO_BANKS; bank++) { - writel(0, ucb->base + GPIOREN(bank)); - writel(0, ucb->base + GPIOFEN(bank)); - writel(0, ucb->base + GPIOHEN(bank)); - writel(0, ucb->base + GPIOLEN(bank)); - writel(0, ucb->base + GPIOAREN(bank)); - writel(0, ucb->base + GPIOAFEN(bank)); - writel(~0, ucb->base + GPIOEDS(bank)); - } - - bcm2708_gpio_irq_init(ucb); - - err = gpiochip_add(&ucb->gc); - -err: - return err; - -} - -static int bcm2708_gpio_remove(struct platform_device *dev) -{ - int err = 0; - struct bcm2708_gpio *ucb = platform_get_drvdata(dev); - - printk(KERN_ERR DRIVER_NAME ": bcm2708_gpio_remove %p\n", dev); - - gpiochip_remove(&ucb->gc); - - platform_set_drvdata(dev, NULL); - kfree(ucb); - - return err; -} - -static struct platform_driver bcm2708_gpio_driver = { - .probe = bcm2708_gpio_probe, - .remove = bcm2708_gpio_remove, - .driver = { - .name = "bcm2708_gpio"}, -}; - -static int __init bcm2708_gpio_init(void) -{ - return platform_driver_register(&bcm2708_gpio_driver); -} - -static void __exit bcm2708_gpio_exit(void) -{ - platform_driver_unregister(&bcm2708_gpio_driver); -} - -module_init(bcm2708_gpio_init); -module_exit(bcm2708_gpio_exit); - -MODULE_DESCRIPTION("Broadcom BCM2708 GPIO driver"); -MODULE_LICENSE("GPL"); diff --git a/arch/arm/mach-bcm2709/bcm2709.c b/arch/arm/mach-bcm2709/bcm2709.c index ad4993f55e653f..be20edc0bb4c52 100644 --- a/arch/arm/mach-bcm2709/bcm2709.c +++ b/arch/arm/mach-bcm2709/bcm2709.c @@ -19,53 +19,26 @@ */ #include -#include #include -#include -#include -#include #include -#include -#include #include -#include -#include -#include +#include #include #include #include -#include -#include -#include -#include -#include -#include #include #include -#include -#include #include #include -#include #include -#include -#include -#include #include - -#include #include -#include - -#include "bcm2709.h" #include "armctrl.h" -#ifdef CONFIG_BCM_VC_CMA #include -#endif //#define SYSTEM_TIMER @@ -79,29 +52,12 @@ * physical addresses onto VideoCore memory then the use of 32-bits would be * more legitimate. */ -#define DMA_MASK_BITS_COMMON 32 - -// use GPIO 4 for the one-wire GPIO pin, if enabled -#define W1_GPIO 4 -// ensure one-wire GPIO pullup is disabled by default -#define W1_PULLUP -1 /* command line parameters */ static unsigned boardrev, serial; -static unsigned uart_clock = UART0_CLOCK; -static unsigned disk_led_gpio = 16; -static unsigned disk_led_active_low = 1; static unsigned reboot_part = 0; -static unsigned w1_gpio_pin = W1_GPIO; -static unsigned w1_gpio_pullup = W1_PULLUP; -static bool vc_i2c_override = false; -static int pps_gpio_pin = -1; unsigned force_core; -static unsigned use_dt = 0; - -static void __init bcm2709_init_led(void); - void __init bcm2709_init_irq(void) { armctrl_init(__io_address(ARMCTRL_IC_BASE), 0, 0, 0); @@ -213,561 +169,6 @@ static void __init bcm2709_clocksource_init(void) } #endif -struct clk __init *bcm2709_clk_register(const char *name, unsigned long fixed_rate) -{ - struct clk *clk; - - clk = clk_register_fixed_rate(NULL, name, NULL, CLK_IS_ROOT, - fixed_rate); - if (IS_ERR(clk)) - pr_err("%s not registered\n", name); - - return clk; -} - -void __init bcm2709_register_clkdev(struct clk *clk, const char *name) -{ - int ret; - - ret = clk_register_clkdev(clk, NULL, name); - if (ret) - pr_err("%s alias not registered\n", name); -} - -void __init bcm2709_init_clocks(void) -{ - struct clk *clk; - - clk = bcm2709_clk_register("uart0_clk", uart_clock); - bcm2709_register_clkdev(clk, "dev:f1"); - - clk = bcm2709_clk_register("sdhost_clk", 250000000); - bcm2709_register_clkdev(clk, "mmc-bcm2835.0"); - bcm2709_register_clkdev(clk, "bcm2708_spi.0"); - bcm2709_register_clkdev(clk, "bcm2708_i2c.0"); - bcm2709_register_clkdev(clk, "bcm2708_i2c.1"); -} - -#define UART0_IRQ { IRQ_UART, 0 /*NO_IRQ*/ } -#define UART0_DMA { 15, 14 } - -AMBA_DEVICE(uart0, "dev:f1", UART0, NULL); - -static struct amba_device *amba_devs[] __initdata = { - &uart0_device, -}; - -static struct resource bcm2708_dmaengine_resources[] = { - { - .start = DMA_BASE, - .end = DMA_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_DMA0, - .end = IRQ_DMA0, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA1, - .end = IRQ_DMA1, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA2, - .end = IRQ_DMA2, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA3, - .end = IRQ_DMA3, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA4, - .end = IRQ_DMA4, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA5, - .end = IRQ_DMA5, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA6, - .end = IRQ_DMA6, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA7, - .end = IRQ_DMA7, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA8, - .end = IRQ_DMA8, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA9, - .end = IRQ_DMA9, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA10, - .end = IRQ_DMA10, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA11, - .end = IRQ_DMA11, - .flags = IORESOURCE_IRQ, - }, { - .start = IRQ_DMA12, - .end = IRQ_DMA12, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device bcm2708_dmaengine_device = { - .name = "bcm2708-dmaengine", - .id = -1, - .resource = bcm2708_dmaengine_resources, - .num_resources = ARRAY_SIZE(bcm2708_dmaengine_resources), -}; - -#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) -static struct w1_gpio_platform_data w1_gpio_pdata = { - .pin = W1_GPIO, - .ext_pullup_enable_pin = W1_PULLUP, - .is_open_drain = 0, -}; - -static struct platform_device w1_device = { - .name = "w1-gpio", - .id = -1, - .dev.platform_data = &w1_gpio_pdata, -}; -#endif - -static struct pps_gpio_platform_data pps_gpio_info = { - .assert_falling_edge = false, - .capture_clear = false, - .gpio_pin = -1, - .gpio_label = "PPS", -}; - -static struct platform_device pps_gpio_device = { - .name = "pps-gpio", - .id = PLATFORM_DEVID_NONE, - .dev.platform_data = &pps_gpio_info, -}; - -static u64 fb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_fb_device = { - .name = "bcm2708_fb", - .id = -1, /* only one bcm2708_fb */ - .resource = NULL, - .num_resources = 0, - .dev = { - .dma_mask = &fb_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; - -static struct resource bcm2708_usb_resources[] = { - [0] = { - .start = USB_BASE, - .end = USB_BASE + SZ_128K - 1, - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = MPHI_BASE, - .end = MPHI_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [2] = { - .start = IRQ_HOSTPORT, - .end = IRQ_HOSTPORT, - .flags = IORESOURCE_IRQ, - }, - [3] = { - .start = IRQ_USB, - .end = IRQ_USB, - .flags = IORESOURCE_IRQ, - }, - [4] = { - .start = ARM_LOCAL_BASE, - .end = ARM_LOCAL_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, - [5] = { - .start = IRQ_ARM_LOCAL_MAILBOX1, - .end = IRQ_ARM_LOCAL_MAILBOX1, - .flags = IORESOURCE_IRQ - }, -}; - - -static u64 usb_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_usb_device = { - .name = "bcm2708_usb", - .id = -1, /* only one bcm2708_usb */ - .resource = bcm2708_usb_resources, - .num_resources = ARRAY_SIZE(bcm2708_usb_resources), - .dev = { - .dma_mask = &usb_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; - -static u64 rpifw_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_rpifw_device = { - .name = "raspberrypi-firmware", - .dev = { - .dma_mask = &rpifw_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; - -static struct resource bcm2708_vchiq_resources[] = { - { - .start = ARMCTRL_0_BELL_BASE, - .end = ARMCTRL_0_BELL_BASE + 16, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_ARM_DOORBELL_0, - .end = IRQ_ARM_DOORBELL_0, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 vchiq_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_vchiq_device = { - .name = "bcm2835_vchiq", - .id = -1, - .resource = bcm2708_vchiq_resources, - .num_resources = ARRAY_SIZE(bcm2708_vchiq_resources), - .dev = { - .dma_mask = &vchiq_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; - -#ifdef CONFIG_BCM2708_GPIO -#define BCM_GPIO_DRIVER_NAME "bcm2708_gpio" - -static struct resource bcm2708_gpio_resources[] = { - [0] = { /* general purpose I/O */ - .start = GPIO_BASE, - .end = GPIO_BASE + SZ_4K - 1, - .flags = IORESOURCE_MEM, - }, -}; - -static u64 gpio_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); - -static struct platform_device bcm2708_gpio_device = { - .name = BCM_GPIO_DRIVER_NAME, - .id = -1, /* only one VideoCore I/O area */ - .resource = bcm2708_gpio_resources, - .num_resources = ARRAY_SIZE(bcm2708_gpio_resources), - .dev = { - .dma_mask = &gpio_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON), - }, -}; -#endif - -#ifdef CONFIG_MMC_BCM2835 /* Arasan emmc SD (new) */ -static struct resource bcm2835_emmc_resources[] = { - [0] = { - .start = EMMC_BASE, - .end = EMMC_BASE + SZ_256 - 1, /* we only need this area */ - /* the memory map actually makes SZ_4K available */ - .flags = IORESOURCE_MEM, - }, - [1] = { - .start = IRQ_ARASANSDIO, - .end = IRQ_ARASANSDIO, - .flags = IORESOURCE_IRQ, - }, -}; - -static u64 bcm2835_emmc_dmamask = 0xffffffffUL; - -struct platform_device bcm2835_emmc_device = { - .name = "mmc-bcm2835", - .id = 0, - .num_resources = ARRAY_SIZE(bcm2835_emmc_resources), - .resource = bcm2835_emmc_resources, - .dev = { - .dma_mask = &bcm2835_emmc_dmamask, - .coherent_dma_mask = 0xffffffffUL}, -}; -#endif /* CONFIG_MMC_BCM2835 */ - -static struct platform_device bcm2708_alsa_devices[] = { - [0] = { - .name = "bcm2835_AUD0", - .id = 0, /* first audio device */ - .resource = 0, - .num_resources = 0, - }, - [1] = { - .name = "bcm2835_AUD1", - .id = 1, /* second audio device */ - .resource = 0, - .num_resources = 0, - }, - [2] = { - .name = "bcm2835_AUD2", - .id = 2, /* third audio device */ - .resource = 0, - .num_resources = 0, - }, - [3] = { - .name = "bcm2835_AUD3", - .id = 3, /* forth audio device */ - .resource = 0, - .num_resources = 0, - }, - [4] = { - .name = "bcm2835_AUD4", - .id = 4, /* fifth audio device */ - .resource = 0, - .num_resources = 0, - }, - [5] = { - .name = "bcm2835_AUD5", - .id = 5, /* sixth audio device */ - .resource = 0, - .num_resources = 0, - }, - [6] = { - .name = "bcm2835_AUD6", - .id = 6, /* seventh audio device */ - .resource = 0, - .num_resources = 0, - }, - [7] = { - .name = "bcm2835_AUD7", - .id = 7, /* eighth audio device */ - .resource = 0, - .num_resources = 0, - }, -}; - -static struct resource bcm2708_spi_resources[] = { - { - .start = SPI0_BASE, - .end = SPI0_BASE + SZ_256 - 1, - .flags = IORESOURCE_MEM, - }, { - .start = IRQ_SPI, - .end = IRQ_SPI, - .flags = IORESOURCE_IRQ, - } -}; - - -static u64 bcm2708_spi_dmamask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON); -static struct platform_device bcm2708_spi_device = { - .name = "bcm2708_spi", - .id = 0, - .num_resources = ARRAY_SIZE(bcm2708_spi_resources), - .resource = bcm2708_spi_resources, - .dev = { - .dma_mask = &bcm2708_spi_dmamask, - .coherent_dma_mask = DMA_BIT_MASK(DMA_MASK_BITS_COMMON)}, -}; - -#ifdef CONFIG_BCM2708_SPIDEV -static struct spi_board_info bcm2708_spi_devices[] = { -#ifdef CONFIG_SPI_SPIDEV - { - .modalias = "spidev", - .max_speed_hz = 500000, - .bus_num = 0, - .chip_select = 0, - .mode = SPI_MODE_0, - }, { - .modalias = "spidev", - .max_speed_hz = 500000, - .bus_num = 0, - .chip_select = 1, - .mode = SPI_MODE_0, - } -#endif -}; -#endif - -static struct resource bcm2708_bsc0_resources[] = { - { - .start = BSC0_BASE, - .end = BSC0_BASE + SZ_256 - 1, - .flags = IORESOURCE_MEM, - }, { - .start = INTERRUPT_I2C, - .end = INTERRUPT_I2C, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device bcm2708_bsc0_device = { - .name = "bcm2708_i2c", - .id = 0, - .num_resources = ARRAY_SIZE(bcm2708_bsc0_resources), - .resource = bcm2708_bsc0_resources, -}; - - -static struct resource bcm2708_bsc1_resources[] = { - { - .start = BSC1_BASE, - .end = BSC1_BASE + SZ_256 - 1, - .flags = IORESOURCE_MEM, - }, { - .start = INTERRUPT_I2C, - .end = INTERRUPT_I2C, - .flags = IORESOURCE_IRQ, - } -}; - -static struct platform_device bcm2708_bsc1_device = { - .name = "bcm2708_i2c", - .id = 1, - .num_resources = ARRAY_SIZE(bcm2708_bsc1_resources), - .resource = bcm2708_bsc1_resources, -}; - -static struct platform_device bcm2835_thermal_device = { - .name = "bcm2835_thermal", -}; - -#if defined(CONFIG_SND_BCM2708_SOC_I2S) || defined(CONFIG_SND_BCM2708_SOC_I2S_MODULE) -static struct resource bcm2708_i2s_resources[] = { - { - .start = I2S_BASE, - .end = I2S_BASE + 0x20, - .flags = IORESOURCE_MEM, - }, - { - .start = PCM_CLOCK_BASE, - .end = PCM_CLOCK_BASE + 0x02, - .flags = IORESOURCE_MEM, - } -}; - -static struct platform_device bcm2708_i2s_device = { - .name = "bcm2708-i2s", - .id = 0, - .num_resources = ARRAY_SIZE(bcm2708_i2s_resources), - .resource = bcm2708_i2s_resources, -}; -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC_MODULE) -static struct platform_device snd_hifiberry_dac_device = { - .name = "snd-hifiberry-dac", - .id = 0, - .num_resources = 0, -}; - -static struct platform_device snd_pcm5102a_codec_device = { - .name = "pcm5102a-codec", - .id = -1, - .num_resources = 0, -}; -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS_MODULE) -static struct platform_device snd_rpi_hifiberry_dacplus_device = { - .name = "snd-rpi-hifiberry-dacplus", - .id = 0, - .num_resources = 0, -}; - -static struct i2c_board_info __initdata snd_pcm512x_hbdacplus_i2c_devices[] = { - { - I2C_BOARD_INFO("pcm5122", 0x4d) - }, -}; -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI_MODULE) -static struct platform_device snd_hifiberry_digi_device = { - .name = "snd-hifiberry-digi", - .id = 0, - .num_resources = 0, -}; - -static struct i2c_board_info __initdata snd_wm8804_i2c_devices[] = { - { - I2C_BOARD_INFO("wm8804", 0x3b) - }, -}; - -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP_MODULE) -static struct platform_device snd_hifiberry_amp_device = { - .name = "snd-hifiberry-amp", - .id = 0, - .num_resources = 0, -}; - -static struct i2c_board_info __initdata snd_tas5713_i2c_devices[] = { - { - I2C_BOARD_INFO("tas5713", 0x1b) - }, -}; -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_RPI_DAC) || defined(CONFIG_SND_BCM2708_SOC_RPI_DAC_MODULE) -static struct platform_device snd_rpi_dac_device = { - .name = "snd-rpi-dac", - .id = 0, - .num_resources = 0, -}; - -static struct platform_device snd_pcm1794a_codec_device = { - .name = "pcm1794a-codec", - .id = -1, - .num_resources = 0, -}; -#endif - - -#if defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) || defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC_MODULE) -static struct platform_device snd_rpi_iqaudio_dac_device = { - .name = "snd-rpi-iqaudio-dac", - .id = 0, - .num_resources = 0, -}; - -// Use the actual device name rather than generic driver name -static struct i2c_board_info __initdata snd_pcm512x_i2c_devices[] = { - { - I2C_BOARD_INFO("pcm5122", 0x4c) - }, -}; -#endif - -int __init bcm_register_device(struct platform_device *pdev) -{ - int ret; - - ret = platform_device_register(pdev); - if (ret) - pr_debug("Unable to register platform device '%s': %d\n", - pdev->name, ret); - - return ret; -} - -/* - * Use these macros for platform and i2c devices that are present in the - * Device Tree. This way the devices are only added on non-DT systems. - */ -#define bcm_register_device_dt(pdev) \ - if (!use_dt) bcm_register_device(pdev) - -#define i2c_register_board_info_dt(busnum, info, n) \ - if (!use_dt) i2c_register_board_info(busnum, info, n) - int calc_rsts(int partition) { return PM_PASSWORD | @@ -844,136 +245,24 @@ static void __init bcm2709_init_uart1(void) } } -#ifdef CONFIG_OF -static void __init bcm2709_dt_init(void) -{ - int ret; - - of_clk_init(NULL); - ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); - if (ret) { - pr_err("of_platform_populate failed: %d\n", ret); - /* Proceed as if CONFIG_OF was not defined */ - } else { - use_dt = 1; - } -} -#else -static void __init bcm2709_dt_init(void) { } -#endif /* CONFIG_OF */ - void __init bcm2709_init(void) { - int i; + int ret; -#if defined(CONFIG_BCM_VC_CMA) vc_cma_early_init(); -#endif - printk("bcm2709.uart_clock = %d\n", uart_clock); - pm_power_off = bcm2709_power_off; - - bcm2709_init_clocks(); - bcm2709_dt_init(); - bcm_register_device_dt(&bcm2708_dmaengine_device); - bcm_register_device_dt(&bcm2708_rpifw_device); - bcm_register_device_dt(&bcm2708_vchiq_device); -#ifdef CONFIG_BCM2708_GPIO - bcm_register_device_dt(&bcm2708_gpio_device); -#endif + pm_power_off = bcm2709_power_off; -#if defined(CONFIG_PPS_CLIENT_GPIO) || defined(CONFIG_PPS_CLIENT_GPIO_MODULE) - if (!use_dt && (pps_gpio_pin >= 0)) { - pr_info("bcm2709: GPIO %d setup as pps-gpio device\n", pps_gpio_pin); - pps_gpio_info.gpio_pin = pps_gpio_pin; - pps_gpio_device.id = pps_gpio_pin; - bcm_register_device(&pps_gpio_device); + ret = of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL); + if (ret) { + pr_err("of_platform_populate failed: %d\n", ret); + BUG(); } -#endif - -#if defined(CONFIG_W1_MASTER_GPIO) || defined(CONFIG_W1_MASTER_GPIO_MODULE) - w1_gpio_pdata.pin = w1_gpio_pin; - w1_gpio_pdata.ext_pullup_enable_pin = w1_gpio_pullup; - bcm_register_device_dt(&w1_device); -#endif - bcm_register_device_dt(&bcm2708_fb_device); - bcm_register_device_dt(&bcm2708_usb_device); -#ifdef CONFIG_MMC_BCM2835 - bcm_register_device_dt(&bcm2835_emmc_device); -#endif - bcm2709_init_led(); bcm2709_init_uart1(); - /* Only create the platform devices for the ALSA driver in the - absence of an enabled "audio" DT node */ - if (!use_dt || - !of_device_is_available(of_find_node_by_path("/audio"))) { - for (i = 0; i < ARRAY_SIZE(bcm2708_alsa_devices); i++) - bcm_register_device(&bcm2708_alsa_devices[i]); - } - - bcm_register_device_dt(&bcm2708_spi_device); - - if (vc_i2c_override) { - bcm_register_device_dt(&bcm2708_bsc0_device); - bcm_register_device_dt(&bcm2708_bsc1_device); - } else if ((boardrev & 0xffffff) == 0x2 || (boardrev & 0xffffff) == 0x3) { - bcm_register_device_dt(&bcm2708_bsc0_device); - } else { - bcm_register_device_dt(&bcm2708_bsc1_device); - } - - bcm_register_device_dt(&bcm2835_thermal_device); - -#if defined(CONFIG_SND_BCM2708_SOC_I2S) || defined(CONFIG_SND_BCM2708_SOC_I2S_MODULE) - bcm_register_device_dt(&bcm2708_i2s_device); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DAC_MODULE) - bcm_register_device_dt(&snd_hifiberry_dac_device); - bcm_register_device_dt(&snd_pcm5102a_codec_device); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DACPLUS_MODULE) - bcm_register_device_dt(&snd_rpi_hifiberry_dacplus_device); - i2c_register_board_info_dt(1, snd_pcm512x_hbdacplus_i2c_devices, ARRAY_SIZE(snd_pcm512x_hbdacplus_i2c_devices)); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_DIGI_MODULE) - bcm_register_device_dt(&snd_hifiberry_digi_device); - i2c_register_board_info_dt(1, snd_wm8804_i2c_devices, ARRAY_SIZE(snd_wm8804_i2c_devices)); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP) || defined(CONFIG_SND_BCM2708_SOC_HIFIBERRY_AMP_MODULE) - bcm_register_device_dt(&snd_hifiberry_amp_device); - i2c_register_board_info_dt(1, snd_tas5713_i2c_devices, ARRAY_SIZE(snd_tas5713_i2c_devices)); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_RPI_DAC) || defined(CONFIG_SND_BCM2708_SOC_RPI_DAC_MODULE) - bcm_register_device_dt(&snd_rpi_dac_device); - bcm_register_device_dt(&snd_pcm1794a_codec_device); -#endif - -#if defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC) || defined(CONFIG_SND_BCM2708_SOC_IQAUDIO_DAC_MODULE) - bcm_register_device_dt(&snd_rpi_iqaudio_dac_device); - i2c_register_board_info_dt(1, snd_pcm512x_i2c_devices, ARRAY_SIZE(snd_pcm512x_i2c_devices)); -#endif - - if (!use_dt) { - for (i = 0; i < ARRAY_SIZE(amba_devs); i++) { - struct amba_device *d = amba_devs[i]; - amba_device_register(d, &iomem_resource); - } - } system_rev = boardrev; system_serial_low = serial; - -#ifdef CONFIG_BCM2708_SPIDEV - if (!use_dt) - spi_register_board_info(bcm2708_spi_devices, - ARRAY_SIZE(bcm2708_spi_devices)); -#endif } #ifdef SYSTEM_TIMER @@ -1077,61 +366,18 @@ static void __init bcm2709_timer_init(void) static void __init bcm2709_timer_init(void) { - extern void dc4_arch_timer_init(void); // timer control writel(0, __io_address(ARM_LOCAL_CONTROL)); // timer pre_scaler writel(0x80000000, __io_address(ARM_LOCAL_PRESCALER)); // 19.2MHz //writel(0x06AAAAAB, __io_address(ARM_LOCAL_PRESCALER)); // 1MHz - if (use_dt) - { - of_clk_init(NULL); - clocksource_of_init(); - } - else - dc4_arch_timer_init(); + of_clk_init(NULL); + clocksource_of_init(); } #endif -#if defined(CONFIG_LEDS_GPIO) || defined(CONFIG_LEDS_GPIO_MODULE) -#include - -static struct gpio_led bcm2709_leds[] = { - [0] = { - .gpio = 16, - .name = "led0", - .default_trigger = "mmc0", - .active_low = 1, - }, -}; - -static struct gpio_led_platform_data bcm2709_led_pdata = { - .num_leds = ARRAY_SIZE(bcm2709_leds), - .leds = bcm2709_leds, -}; - -static struct platform_device bcm2709_led_device = { - .name = "leds-gpio", - .id = -1, - .dev = { - .platform_data = &bcm2709_led_pdata, - }, -}; - -static void __init bcm2709_init_led(void) -{ - bcm2709_leds[0].gpio = disk_led_gpio; - bcm2709_leds[0].active_low = disk_led_active_low; - bcm_register_device_dt(&bcm2709_led_device); -} -#else -static inline void bcm2709_init_led(void) -{ -} -#endif - void __init bcm2709_init_early(void) { /* @@ -1144,9 +390,7 @@ void __init bcm2709_init_early(void) static void __init board_reserve(void) { -#if defined(CONFIG_BCM_VC_CMA) vc_cma_reserve(); -#endif } @@ -1294,13 +538,4 @@ MACHINE_END module_param(force_core, uint, 0644); module_param(boardrev, uint, 0644); module_param(serial, uint, 0644); -module_param(uart_clock, uint, 0644); -module_param(disk_led_gpio, uint, 0644); -module_param(disk_led_active_low, uint, 0644); module_param(reboot_part, uint, 0644); -module_param(w1_gpio_pin, uint, 0644); -module_param(w1_gpio_pullup, uint, 0644); -module_param(vc_i2c_override, bool, 0644); -MODULE_PARM_DESC(vc_i2c_override, "Allow the use of VC's I2C peripheral."); -module_param(pps_gpio_pin, int, 0644); -MODULE_PARM_DESC(pps_gpio_pin, "Set GPIO pin to reserve for PPS"); diff --git a/arch/arm/mach-bcm2709/bcm2709.h b/arch/arm/mach-bcm2709/bcm2709.h deleted file mode 100644 index e339a937e37316..00000000000000 --- a/arch/arm/mach-bcm2709/bcm2709.h +++ /dev/null @@ -1,49 +0,0 @@ -/* - * linux/arch/arm/mach-bcm2708/bcm2708.h - * - * BCM2708 machine support header - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef __BCM2708_BCM2708_H -#define __BCM2708_BCM2708_H - -#include - -extern void __init bcm2708_init(void); -extern void __init bcm2708_init_irq(void); -extern void __init bcm2708_map_io(void); -extern struct sys_timer bcm2708_timer; -extern unsigned int mmc_status(struct device *dev); - -#define AMBA_DEVICE(name, busid, base, plat) \ -static struct amba_device name##_device = { \ - .dev = { \ - .coherent_dma_mask = ~0, \ - .init_name = busid, \ - .platform_data = plat, \ - }, \ - .res = { \ - .start = base##_BASE, \ - .end = (base##_BASE) + SZ_4K - 1,\ - .flags = IORESOURCE_MEM, \ - }, \ - .irq = base##_IRQ, \ -} - -#endif diff --git a/arch/arm/mach-bcm2709/delay.S b/arch/arm/mach-bcm2709/delay.S deleted file mode 100644 index 06f47807fa49ed..00000000000000 --- a/arch/arm/mach-bcm2709/delay.S +++ /dev/null @@ -1,21 +0,0 @@ -/* - * linux/arch/arm/lib/delay.S - * - * Copyright (C) 1995, 1996 Russell King - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License version 2 as - * published by the Free Software Foundation. - */ -#include -#include -#include - - .text -.align 3 @ 8 byte alignment seems to be needed to avoid fetching stalls -@ Delay routine -ENTRY(bcm2708_delay) - subs r0, r0, #1 - bhi bcm2708_delay - mov pc, lr -ENDPROC(bcm2708_delay) diff --git a/arch/arm/mach-bcm2709/include/mach/clkdev.h b/arch/arm/mach-bcm2709/include/mach/clkdev.h deleted file mode 100644 index 04b37a89801cfd..00000000000000 --- a/arch/arm/mach-bcm2709/include/mach/clkdev.h +++ /dev/null @@ -1,7 +0,0 @@ -#ifndef __ASM_MACH_CLKDEV_H -#define __ASM_MACH_CLKDEV_H - -#define __clk_get(clk) ({ 1; }) -#define __clk_put(clk) do { } while (0) - -#endif diff --git a/arch/arm/mach-bcm2709/include/mach/frc.h b/arch/arm/mach-bcm2709/include/mach/frc.h deleted file mode 100644 index dd51e073121e62..00000000000000 --- a/arch/arm/mach-bcm2709/include/mach/frc.h +++ /dev/null @@ -1,38 +0,0 @@ -/* - * arch/arm/mach-bcm2708/include/mach/timex.h - * - * BCM2708 free running counter (timer) - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#ifndef _MACH_FRC_H -#define _MACH_FRC_H - -#define FRC_TICK_RATE (1000000) - -/*! Free running counter incrementing at the CLOCK_TICK_RATE - (slightly faster than frc_clock_ticks63() - */ -extern unsigned long frc_clock_ticks32(void); - -/*! Free running counter incrementing at the CLOCK_TICK_RATE - * Note - top bit should be ignored (see cnt32_to_63) - */ -extern unsigned long long frc_clock_ticks63(void); - -#endif diff --git a/arch/arm/mach-bcm2709/include/mach/gpio.h b/arch/arm/mach-bcm2709/include/mach/gpio.h deleted file mode 100644 index 7965a9759b6e25..00000000000000 --- a/arch/arm/mach-bcm2709/include/mach/gpio.h +++ /dev/null @@ -1,17 +0,0 @@ -/* - * arch/arm/mach-bcm2708/include/mach/gpio.h - * - * This file is licensed under the terms of the GNU General Public - * License version 2. This program is licensed "as is" without any - * warranty of any kind, whether express or implied. - */ - -#ifndef __ASM_ARCH_GPIO_H -#define __ASM_ARCH_GPIO_H - -#define BCM2708_NR_GPIOS 54 // number of gpio lines - -#define gpio_to_irq(x) ((x) + GPIO_IRQ_START) -#define irq_to_gpio(x) ((x) - GPIO_IRQ_START) - -#endif diff --git a/arch/arm/mach-bcm2709/include/mach/timex.h b/arch/arm/mach-bcm2709/include/mach/timex.h deleted file mode 100644 index 64a660c236469f..00000000000000 --- a/arch/arm/mach-bcm2709/include/mach/timex.h +++ /dev/null @@ -1,23 +0,0 @@ -/* - * arch/arm/mach-bcm2708/include/mach/timex.h - * - * BCM2708 sysem clock frequency - * - * Copyright (C) 2010 Broadcom - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#define CLOCK_TICK_RATE (1000000) diff --git a/arch/arm/mach-bcm2709/include/mach/vc_support.h b/arch/arm/mach-bcm2709/include/mach/vc_support.h deleted file mode 100755 index 70e809f864bd1c..00000000000000 --- a/arch/arm/mach-bcm2709/include/mach/vc_support.h +++ /dev/null @@ -1,69 +0,0 @@ -#ifndef _VC_SUPPORT_H_ -#define _VC_SUPPORT_H_ - -/* - * vc_support.h - * - * Created on: 25 Nov 2012 - * Author: Simon - */ - -enum { -/* - If a MEM_HANDLE_T is discardable, the memory manager may resize it to size - 0 at any time when it is not locked or retained. - */ - MEM_FLAG_DISCARDABLE = 1 << 0, - - /* - If a MEM_HANDLE_T is allocating (or normal), its block of memory will be - accessed in an allocating fashion through the cache. - */ - MEM_FLAG_NORMAL = 0 << 2, - MEM_FLAG_ALLOCATING = MEM_FLAG_NORMAL, - - /* - If a MEM_HANDLE_T is direct, its block of memory will be accessed - directly, bypassing the cache. - */ - MEM_FLAG_DIRECT = 1 << 2, - - /* - If a MEM_HANDLE_T is coherent, its block of memory will be accessed in a - non-allocating fashion through the cache. - */ - MEM_FLAG_COHERENT = 2 << 2, - - /* - If a MEM_HANDLE_T is L1-nonallocating, its block of memory will be accessed by - the VPU in a fashion which is allocating in L2, but only coherent in L1. - */ - MEM_FLAG_L1_NONALLOCATING = (MEM_FLAG_DIRECT | MEM_FLAG_COHERENT), - - /* - If a MEM_HANDLE_T is zero'd, its contents are set to 0 rather than - MEM_HANDLE_INVALID on allocation and resize up. - */ - MEM_FLAG_ZERO = 1 << 4, - - /* - If a MEM_HANDLE_T is uninitialised, it will not be reset to a defined value - (either zero, or all 1's) on allocation. - */ - MEM_FLAG_NO_INIT = 1 << 5, - - /* - Hints. - */ - MEM_FLAG_HINT_PERMALOCK = 1 << 6, /* Likely to be locked for long periods of time. */ -}; - -unsigned int AllocateVcMemory(unsigned int *pHandle, unsigned int size, unsigned int alignment, unsigned int flags); -unsigned int ReleaseVcMemory(unsigned int handle); -unsigned int LockVcMemory(unsigned int *pBusAddress, unsigned int handle); -unsigned int UnlockVcMemory(unsigned int handle); - -unsigned int ExecuteVcCode(unsigned int code, - unsigned int r0, unsigned int r1, unsigned int r2, unsigned int r3, unsigned int r4, unsigned int r5); - -#endif diff --git a/arch/arm/mach-bcm2709/vc_support.c b/arch/arm/mach-bcm2709/vc_support.c deleted file mode 100644 index c4dc7d68f0f09c..00000000000000 --- a/arch/arm/mach-bcm2709/vc_support.c +++ /dev/null @@ -1,318 +0,0 @@ -/* - * vc_support.c - * - * Created on: 25 Nov 2012 - * Author: Simon - */ - -#include -#include - -#ifdef ECLIPSE_IGNORE - -#define __user -#define __init -#define __exit -#define __iomem -#define KERN_DEBUG -#define KERN_ERR -#define KERN_WARNING -#define KERN_INFO -#define _IOWR(a, b, c) b -#define _IOW(a, b, c) b -#define _IO(a, b) b - -#endif - -/****** VC MAILBOX FUNCTIONALITY ******/ -unsigned int AllocateVcMemory(unsigned int *pHandle, unsigned int size, unsigned int alignment, unsigned int flags) -{ - struct vc_msg - { - unsigned int m_msgSize; - unsigned int m_response; - - struct vc_tag - { - unsigned int m_tagId; - unsigned int m_sendBufferSize; - union { - unsigned int m_sendDataSize; - unsigned int m_recvDataSize; - }; - - struct args - { - union { - unsigned int m_size; - unsigned int m_handle; - }; - unsigned int m_alignment; - unsigned int m_flags; - } m_args; - } m_tag; - - unsigned int m_endTag; - } msg; - int s; - - msg.m_msgSize = sizeof(msg); - msg.m_response = 0; - msg.m_endTag = 0; - - //fill in the tag for the allocation command - msg.m_tag.m_tagId = 0x3000c; - msg.m_tag.m_sendBufferSize = 12; - msg.m_tag.m_sendDataSize = 12; - - //fill in our args - msg.m_tag.m_args.m_size = size; - msg.m_tag.m_args.m_alignment = alignment; - msg.m_tag.m_args.m_flags = flags; - - //run the command - s = bcm_mailbox_property(&msg, sizeof(msg)); - - if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004) - { - *pHandle = msg.m_tag.m_args.m_handle; - return 0; - } - else - { - printk(KERN_ERR "failed to allocate vc memory: s=%d response=%08x recv data size=%08x\n", - s, msg.m_response, msg.m_tag.m_recvDataSize); - return 1; - } -} - -unsigned int ReleaseVcMemory(unsigned int handle) -{ - struct vc_msg - { - unsigned int m_msgSize; - unsigned int m_response; - - struct vc_tag - { - unsigned int m_tagId; - unsigned int m_sendBufferSize; - union { - unsigned int m_sendDataSize; - unsigned int m_recvDataSize; - }; - - struct args - { - union { - unsigned int m_handle; - unsigned int m_error; - }; - } m_args; - } m_tag; - - unsigned int m_endTag; - } msg; - int s; - - msg.m_msgSize = sizeof(msg); - msg.m_response = 0; - msg.m_endTag = 0; - - //fill in the tag for the release command - msg.m_tag.m_tagId = 0x3000f; - msg.m_tag.m_sendBufferSize = 4; - msg.m_tag.m_sendDataSize = 4; - - //pass across the handle - msg.m_tag.m_args.m_handle = handle; - - s = bcm_mailbox_property(&msg, sizeof(msg)); - - if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004 && msg.m_tag.m_args.m_error == 0) - return 0; - else - { - printk(KERN_ERR "failed to release vc memory: s=%d response=%08x recv data size=%08x error=%08x\n", - s, msg.m_response, msg.m_tag.m_recvDataSize, msg.m_tag.m_args.m_error); - return 1; - } -} - -unsigned int LockVcMemory(unsigned int *pBusAddress, unsigned int handle) -{ - struct vc_msg - { - unsigned int m_msgSize; - unsigned int m_response; - - struct vc_tag - { - unsigned int m_tagId; - unsigned int m_sendBufferSize; - union { - unsigned int m_sendDataSize; - unsigned int m_recvDataSize; - }; - - struct args - { - union { - unsigned int m_handle; - unsigned int m_busAddress; - }; - } m_args; - } m_tag; - - unsigned int m_endTag; - } msg; - int s; - - msg.m_msgSize = sizeof(msg); - msg.m_response = 0; - msg.m_endTag = 0; - - //fill in the tag for the lock command - msg.m_tag.m_tagId = 0x3000d; - msg.m_tag.m_sendBufferSize = 4; - msg.m_tag.m_sendDataSize = 4; - - //pass across the handle - msg.m_tag.m_args.m_handle = handle; - - s = bcm_mailbox_property(&msg, sizeof(msg)); - - if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004) - { - //pick out the bus address - *pBusAddress = msg.m_tag.m_args.m_busAddress; - return 0; - } - else - { - printk(KERN_ERR "failed to lock vc memory: s=%d response=%08x recv data size=%08x\n", - s, msg.m_response, msg.m_tag.m_recvDataSize); - return 1; - } -} - -unsigned int UnlockVcMemory(unsigned int handle) -{ - struct vc_msg - { - unsigned int m_msgSize; - unsigned int m_response; - - struct vc_tag - { - unsigned int m_tagId; - unsigned int m_sendBufferSize; - union { - unsigned int m_sendDataSize; - unsigned int m_recvDataSize; - }; - - struct args - { - union { - unsigned int m_handle; - unsigned int m_error; - }; - } m_args; - } m_tag; - - unsigned int m_endTag; - } msg; - int s; - - msg.m_msgSize = sizeof(msg); - msg.m_response = 0; - msg.m_endTag = 0; - - //fill in the tag for the unlock command - msg.m_tag.m_tagId = 0x3000e; - msg.m_tag.m_sendBufferSize = 4; - msg.m_tag.m_sendDataSize = 4; - - //pass across the handle - msg.m_tag.m_args.m_handle = handle; - - s = bcm_mailbox_property(&msg, sizeof(msg)); - - //check the error code too - if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004 && msg.m_tag.m_args.m_error == 0) - return 0; - else - { - printk(KERN_ERR "failed to unlock vc memory: s=%d response=%08x recv data size=%08x error%08x\n", - s, msg.m_response, msg.m_tag.m_recvDataSize, msg.m_tag.m_args.m_error); - return 1; - } -} - -unsigned int ExecuteVcCode(unsigned int code, - unsigned int r0, unsigned int r1, unsigned int r2, unsigned int r3, unsigned int r4, unsigned int r5) -{ - struct vc_msg - { - unsigned int m_msgSize; - unsigned int m_response; - - struct vc_tag - { - unsigned int m_tagId; - unsigned int m_sendBufferSize; - union { - unsigned int m_sendDataSize; - unsigned int m_recvDataSize; - }; - - struct args - { - union { - unsigned int m_pCode; - unsigned int m_return; - }; - unsigned int m_r0; - unsigned int m_r1; - unsigned int m_r2; - unsigned int m_r3; - unsigned int m_r4; - unsigned int m_r5; - } m_args; - } m_tag; - - unsigned int m_endTag; - } msg; - int s; - - msg.m_msgSize = sizeof(msg); - msg.m_response = 0; - msg.m_endTag = 0; - - //fill in the tag for the unlock command - msg.m_tag.m_tagId = 0x30010; - msg.m_tag.m_sendBufferSize = 28; - msg.m_tag.m_sendDataSize = 28; - - //pass across the handle - msg.m_tag.m_args.m_pCode = code; - msg.m_tag.m_args.m_r0 = r0; - msg.m_tag.m_args.m_r1 = r1; - msg.m_tag.m_args.m_r2 = r2; - msg.m_tag.m_args.m_r3 = r3; - msg.m_tag.m_args.m_r4 = r4; - msg.m_tag.m_args.m_r5 = r5; - - s = bcm_mailbox_property(&msg, sizeof(msg)); - - //check the error code too - if (s == 0 && msg.m_response == 0x80000000 && msg.m_tag.m_recvDataSize == 0x80000004) - return msg.m_tag.m_args.m_return; - else - { - printk(KERN_ERR "failed to execute: s=%d response=%08x recv data size=%08x\n", - s, msg.m_response, msg.m_tag.m_recvDataSize); - return 1; - } -} diff --git a/drivers/char/broadcom/bcm2835-gpiomem.c b/drivers/char/broadcom/bcm2835-gpiomem.c index 0085e13c85ab63..911f5b7393ed48 100644 --- a/drivers/char/broadcom/bcm2835-gpiomem.c +++ b/drivers/char/broadcom/bcm2835-gpiomem.c @@ -143,7 +143,6 @@ static int bcm2835_gpiomem_probe(struct platform_device *pdev) int err; void *ptr_err; struct device *dev = &pdev->dev; - struct device_node *node = dev->of_node; struct resource *ioresource; /* Allocate buffers and instance data */ @@ -157,6 +156,15 @@ static int bcm2835_gpiomem_probe(struct platform_device *pdev) inst->dev = dev; + ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0); + if (ioresource) { + inst->gpio_regs_phys = ioresource->start; + } else { + dev_err(inst->dev, "failed to get IO resource"); + err = -ENOENT; + goto failed_get_resource; + } + /* Create character device entries */ err = alloc_chrdev_region(&bcm2835_gpiomem_devid, @@ -187,20 +195,6 @@ static int bcm2835_gpiomem_probe(struct platform_device *pdev) if (IS_ERR(ptr_err)) goto failed_device_create; - /* Get address from device tree if available (*_resource() correctly - converts the bus address in device tree to a physical address), - or use hardcoded offset + BCM2708_PERI_BASE if not. - (In spite of its name 2708 actually seems to have the correct - mach-dependent value on 2709 etc, as it is defined in - mach-bcm270x/platform.h) */ - - if (node) { - ioresource = platform_get_resource(pdev, IORESOURCE_MEM, 0); - inst->gpio_regs_phys = ioresource->start; - } else { - inst->gpio_regs_phys = GPIO_BASE; - } - dev_info(inst->dev, "Initialised: Registers at 0x%08lx", inst->gpio_regs_phys); @@ -214,6 +208,7 @@ static int bcm2835_gpiomem_probe(struct platform_device *pdev) failed_cdev_add: unregister_chrdev_region(bcm2835_gpiomem_devid, 1); failed_alloc_chrdev: +failed_get_resource: kfree(inst); failed_inst_alloc: dev_err(inst->dev, "could not load bcm2835_gpiomem"); diff --git a/drivers/char/broadcom/vc_cma/vc_cma.c b/drivers/char/broadcom/vc_cma/vc_cma.c index 07b31a7b02bbba..85f6e9da9e5baa 100644 --- a/drivers/char/broadcom/vc_cma/vc_cma.c +++ b/drivers/char/broadcom/vc_cma/vc_cma.c @@ -189,7 +189,7 @@ static int early_vc_cma_mem(char *p) early_param("vc-cma-mem", early_vc_cma_mem); -void vc_cma_early_init(void) +void __init vc_cma_early_init(void) { LOG_DBG("vc_cma_early_init - vc_cma_chunks = %d", vc_cma_chunks); if (vc_cma_size) { @@ -198,7 +198,7 @@ void vc_cma_early_init(void) } } -void vc_cma_reserve(void) +void __init vc_cma_reserve(void) { /* if vc_cma_size is set, then declare vc CMA area of the same * size from the end of memory diff --git a/drivers/char/broadcom/vc_sm/Makefile b/drivers/char/broadcom/vc_sm/Makefile index 924a66b85f859c..68fa2aa7f725d3 100644 --- a/drivers/char/broadcom/vc_sm/Makefile +++ b/drivers/char/broadcom/vc_sm/Makefile @@ -1,6 +1,5 @@ EXTRA_CFLAGS += -Wall -Wstrict-prototypes -Wno-trigraphs -O2 -EXTRA_CFLAGS += -I"./arch/arm/mach-bcm2708/include/mach" EXTRA_CFLAGS += -I"drivers/misc/vc04_services" EXTRA_CFLAGS += -I"drivers/misc/vc04_services/interface/vchi" EXTRA_CFLAGS += -I"drivers/misc/vc04_services/interface/vchiq_arm" diff --git a/arch/arm/mach-bcm2708/include/mach/vc_sm_defs.h b/drivers/char/broadcom/vc_sm/vc_sm_defs.h similarity index 100% rename from arch/arm/mach-bcm2708/include/mach/vc_sm_defs.h rename to drivers/char/broadcom/vc_sm/vc_sm_defs.h diff --git a/arch/arm/mach-bcm2708/include/mach/vc_sm_knl.h b/drivers/char/broadcom/vc_sm/vc_sm_knl.h similarity index 100% rename from arch/arm/mach-bcm2708/include/mach/vc_sm_knl.h rename to drivers/char/broadcom/vc_sm/vc_sm_knl.h diff --git a/arch/arm/mach-bcm2708/include/mach/vc_vchi_sm.h b/drivers/char/broadcom/vc_sm/vc_vchi_sm.h similarity index 100% rename from arch/arm/mach-bcm2708/include/mach/vc_vchi_sm.h rename to drivers/char/broadcom/vc_sm/vc_vchi_sm.h diff --git a/drivers/char/broadcom/vc_sm/vmcs_sm.c b/drivers/char/broadcom/vc_sm/vmcs_sm.c index b62a3b2f21b868..5d16e356bbdd27 100644 --- a/drivers/char/broadcom/vc_sm/vmcs_sm.c +++ b/drivers/char/broadcom/vc_sm/vmcs_sm.c @@ -39,7 +39,7 @@ #include "vchiq_connected.h" #include "vc_vchi_sm.h" -#include +#include #include "vc_sm_knl.h" /* ---- Private Constants and Types --------------------------------------- */ diff --git a/drivers/char/hw_random/Kconfig b/drivers/char/hw_random/Kconfig index 70f9613d2e7d0f..a2bb569f444594 100644 --- a/drivers/char/hw_random/Kconfig +++ b/drivers/char/hw_random/Kconfig @@ -333,17 +333,6 @@ config HW_RANDOM_TPM If unsure, say Y. -config HW_RANDOM_BCM2708 - tristate "BCM2708 generic true random number generator support" - depends on HW_RANDOM && (ARCH_BCM2708 || ARCH_BCM2709) - ---help--- - This driver provides the kernel-side support for the BCM2708 hardware. - - To compile this driver as a module, choose M here: the - module will be called bcm2708-rng. - - If unsure, say N. - config HW_RANDOM_MSM tristate "Qualcomm SoCs Random Number Generator support" depends on HW_RANDOM && ARCH_QCOM diff --git a/drivers/char/hw_random/Makefile b/drivers/char/hw_random/Makefile index 36be8646986412..055bb01510ad41 100644 --- a/drivers/char/hw_random/Makefile +++ b/drivers/char/hw_random/Makefile @@ -4,7 +4,6 @@ obj-$(CONFIG_HW_RANDOM) += rng-core.o rng-core-y := core.o -obj-$(CONFIG_HW_RANDOM_BCM2708) += bcm2708-rng.o obj-$(CONFIG_HW_RANDOM_TIMERIOMEM) += timeriomem-rng.o obj-$(CONFIG_HW_RANDOM_INTEL) += intel-rng.o obj-$(CONFIG_HW_RANDOM_AMD) += amd-rng.o diff --git a/drivers/char/hw_random/bcm2708-rng.c b/drivers/char/hw_random/bcm2708-rng.c deleted file mode 100755 index 340f00479af08b..00000000000000 --- a/drivers/char/hw_random/bcm2708-rng.c +++ /dev/null @@ -1,118 +0,0 @@ -/** - * Copyright (c) 2010-2012 Broadcom. All rights reserved. - * - * Redistribution and use in source and binary forms, with or without - * modification, are permitted provided that the following conditions - * are met: - * 1. Redistributions of source code must retain the above copyright - * notice, this list of conditions, and the following disclaimer, - * without modification. - * 2. Redistributions in binary form must reproduce the above copyright - * notice, this list of conditions and the following disclaimer in the - * documentation and/or other materials provided with the distribution. - * 3. The names of the above-listed copyright holders may not be used - * to endorse or promote products derived from this software without - * specific prior written permission. - * - * ALTERNATIVELY, this software may be distributed under the terms of the - * GNU General Public License ("GPL") version 2, as published by the Free - * Software Foundation. - * - * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS - * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, - * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR - * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR - * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, - * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, - * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR - * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF - * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING - * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS - * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. - */ - -#include -#include -#include -#include -#include - -#include -#include -#include - -#define RNG_CTRL (0x0) -#define RNG_STATUS (0x4) -#define RNG_DATA (0x8) -#define RNG_FF_THRESHOLD (0xc) - -/* enable rng */ -#define RNG_RBGEN 0x1 -/* double speed, less random mode */ -#define RNG_RBG2X 0x2 - -/* the initial numbers generated are "less random" so will be discarded */ -#define RNG_WARMUP_COUNT 0x40000 - -static int bcm2708_rng_data_read(struct hwrng *rng, u32 *buffer) -{ - void __iomem *rng_base = (void __iomem *)rng->priv; - unsigned words; - /* wait for a random number to be in fifo */ - do { - words = __raw_readl(rng_base + RNG_STATUS)>>24; - } - while (words == 0); - /* read the random number */ - *buffer = __raw_readl(rng_base + RNG_DATA); - return 4; -} - -static struct hwrng bcm2708_rng_ops = { - .name = "bcm2708", - .data_read = bcm2708_rng_data_read, -}; - -static int __init bcm2708_rng_init(void) -{ - void __iomem *rng_base; - int err; - - /* map peripheral */ - rng_base = ioremap(RNG_BASE, 0x10); - pr_info("bcm2708_rng_init=%p\n", rng_base); - if (!rng_base) { - pr_err("bcm2708_rng_init failed to ioremap\n"); - return -ENOMEM; - } - bcm2708_rng_ops.priv = (unsigned long)rng_base; - - /* set warm-up count & enable */ - __raw_writel(RNG_WARMUP_COUNT, rng_base + RNG_STATUS); - __raw_writel(RNG_RBGEN, rng_base + RNG_CTRL); - - /* register driver */ - err = hwrng_register(&bcm2708_rng_ops); - if (err) { - pr_err("bcm2708_rng_init hwrng_register()=%d\n", err); - iounmap(rng_base); - } - return err; -} - -static void __exit bcm2708_rng_exit(void) -{ - void __iomem *rng_base = (void __iomem *)bcm2708_rng_ops.priv; - pr_info("bcm2708_rng_exit\n"); - /* disable rng hardware */ - __raw_writel(0, rng_base + RNG_CTRL); - /* unregister driver */ - hwrng_unregister(&bcm2708_rng_ops); - iounmap(rng_base); -} - -module_init(bcm2708_rng_init); -module_exit(bcm2708_rng_exit); - -MODULE_DESCRIPTION("BCM2708 H/W Random Number Generator (RNG) driver"); -MODULE_LICENSE("GPL and additional rights"); diff --git a/drivers/clocksource/arm_arch_timer.c b/drivers/clocksource/arm_arch_timer.c index 7482c156a2d63a..d6e3e49399dd40 100644 --- a/drivers/clocksource/arm_arch_timer.c +++ b/drivers/clocksource/arm_arch_timer.c @@ -874,39 +874,3 @@ void __init acpi_generic_timer_init(void) acpi_table_parse(ACPI_SIG_GTDT, arch_timer_acpi_init); } #endif - -int __init dc4_arch_timer_init(void) -{ - if (arch_timers_present & ARCH_CP15_TIMER) { - pr_warn("arch_timer: multiple nodes in dt, skipping\n"); - return -1; - } - - arch_timers_present |= ARCH_CP15_TIMER; - - /* Try to determine the frequency from the device tree or CNTFRQ */ - arch_timer_rate = 19200000; - - arch_timer_ppi[PHYS_SECURE_PPI] = IRQ_ARM_LOCAL_CNTPSIRQ; - arch_timer_ppi[PHYS_NONSECURE_PPI] = IRQ_ARM_LOCAL_CNTPNSIRQ; - arch_timer_ppi[VIRT_PPI] = IRQ_ARM_LOCAL_CNTVIRQ; - arch_timer_ppi[HYP_PPI] = IRQ_ARM_LOCAL_CNTHPIRQ; - - /* - * If HYP mode is available, we know that the physical timer - * has been configured to be accessible from PL1. Use it, so - * that a guest can use the virtual timer instead. - * - * If no interrupt provided for virtual timer, we'll have to - * stick to the physical timer. It'd better be accessible... - */ - if (is_hyp_mode_available() || !arch_timer_ppi[VIRT_PPI]) { - arch_timer_use_virtual = false; - } - - arch_timer_c3stop = 0; - - arch_timer_register(); - arch_timer_common_init(); - return 0; -} diff --git a/drivers/i2c/busses/i2c-bcm2708.c b/drivers/i2c/busses/i2c-bcm2708.c index 5b4fd7b3ba53bc..85f411cccf61f4 100644 --- a/drivers/i2c/busses/i2c-bcm2708.c +++ b/drivers/i2c/busses/i2c-bcm2708.c @@ -96,38 +96,6 @@ struct bcm2708_i2c { bool error; }; -#ifdef CONFIG_ARCH_BCM2835 -static void bcm2708_i2c_init_pinmode(int id) { } -#else -/* - * This function sets the ALT mode on the I2C pins so that we can use them with - * the BSC hardware. - * - * FIXME: This is a hack. Use pinmux / pinctrl. - */ -static void bcm2708_i2c_init_pinmode(int id) -{ -#define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3)) -#define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3)) - - int pin; - u32 *gpio = ioremap(GPIO_BASE, SZ_16K); - - BUG_ON(id != 0 && id != 1); - /* BSC0 is on GPIO 0 & 1, BSC1 is on GPIO 2 & 3 */ - for (pin = id*2+0; pin <= id*2+1; pin++) { - printk("bcm2708_i2c_init_pinmode(%d,%d)\n", id, pin); - INP_GPIO(pin); /* set mode to GPIO input first */ - SET_GPIO_ALT(pin, 0); /* set mode to ALT 0 */ - } - - iounmap(gpio); - -#undef INP_GPIO -#undef SET_GPIO_ALT -} -#endif - static inline u32 bcm2708_rd(struct bcm2708_i2c *bi, unsigned reg) { return readl(bi->base + reg); @@ -385,9 +353,6 @@ static int bcm2708_i2c_probe(struct platform_device *pdev) goto out_clk_put; } - if (!pdev->dev.of_node) - bcm2708_i2c_init_pinmode(pdev->id); - bi = kzalloc(sizeof(*bi), GFP_KERNEL); if (!bi) goto out_clk_disable; diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index 47ab8eede04915..83c8e64546b7c9 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -88,14 +88,6 @@ config SPI_BCM2835 is for the regular SPI controller. Slave mode operation is not also not supported. -config SPI_BCM2708 - tristate "BCM2708 SPI controller driver (SPI0)" - depends on MACH_BCM2708 || MACH_BCM2709 - help - This selects a driver for the Broadcom BCM2708 SPI master (SPI0). This - driver is not compatible with the "Universal SPI Master" or the SPI slave - device. - config SPI_BFIN5XX tristate "SPI controller driver for ADI Blackfin5xx" depends on BLACKFIN && !BF60x diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile index 11bb1e7073c086..6a7f6f9d0d1c8c 100644 --- a/drivers/spi/Makefile +++ b/drivers/spi/Makefile @@ -20,7 +20,6 @@ obj-$(CONFIG_SPI_BCM63XX) += spi-bcm63xx.o obj-$(CONFIG_SPI_BCM63XX_HSSPI) += spi-bcm63xx-hsspi.o obj-$(CONFIG_SPI_BFIN5XX) += spi-bfin5xx.o obj-$(CONFIG_SPI_ADI_V3) += spi-adi-v3.o -obj-$(CONFIG_SPI_BCM2708) += spi-bcm2708.o obj-$(CONFIG_SPI_BFIN_SPORT) += spi-bfin-sport.o obj-$(CONFIG_SPI_BITBANG) += spi-bitbang.o obj-$(CONFIG_SPI_BUTTERFLY) += spi-butterfly.o diff --git a/drivers/spi/spi-bcm2708.c b/drivers/spi/spi-bcm2708.c deleted file mode 100644 index 781c747ad29246..00000000000000 --- a/drivers/spi/spi-bcm2708.c +++ /dev/null @@ -1,628 +0,0 @@ -/* - * Driver for Broadcom BCM2708 SPI Controllers - * - * Copyright (C) 2012 Chris Boot - * - * This driver is inspired by: - * spi-ath79.c, Copyright (C) 2009-2011 Gabor Juhos - * spi-atmel.c, Copyright (C) 2006 Atmel Corporation - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -/* SPI register offsets */ -#define SPI_CS 0x00 -#define SPI_FIFO 0x04 -#define SPI_CLK 0x08 -#define SPI_DLEN 0x0c -#define SPI_LTOH 0x10 -#define SPI_DC 0x14 - -/* Bitfields in CS */ -#define SPI_CS_LEN_LONG 0x02000000 -#define SPI_CS_DMA_LEN 0x01000000 -#define SPI_CS_CSPOL2 0x00800000 -#define SPI_CS_CSPOL1 0x00400000 -#define SPI_CS_CSPOL0 0x00200000 -#define SPI_CS_RXF 0x00100000 -#define SPI_CS_RXR 0x00080000 -#define SPI_CS_TXD 0x00040000 -#define SPI_CS_RXD 0x00020000 -#define SPI_CS_DONE 0x00010000 -#define SPI_CS_LEN 0x00002000 -#define SPI_CS_REN 0x00001000 -#define SPI_CS_ADCS 0x00000800 -#define SPI_CS_INTR 0x00000400 -#define SPI_CS_INTD 0x00000200 -#define SPI_CS_DMAEN 0x00000100 -#define SPI_CS_TA 0x00000080 -#define SPI_CS_CSPOL 0x00000040 -#define SPI_CS_CLEAR_RX 0x00000020 -#define SPI_CS_CLEAR_TX 0x00000010 -#define SPI_CS_CPOL 0x00000008 -#define SPI_CS_CPHA 0x00000004 -#define SPI_CS_CS_10 0x00000002 -#define SPI_CS_CS_01 0x00000001 - -#define SPI_TIMEOUT_MS 1000 - -#define DRV_NAME "bcm2708_spi" - -struct bcm2708_spi { - spinlock_t lock; - void __iomem *base; - int irq; - struct clk *clk; - bool stopping; - - struct list_head queue; - struct workqueue_struct *workq; - struct work_struct work; - struct completion done; - - const u8 *tx_buf; - u8 *rx_buf; - int len; -}; - -struct bcm2708_spi_state { - u32 cs; - u16 cdiv; -}; - -/* - * This function sets the ALT mode on the SPI pins so that we can use them with - * the SPI hardware. - * - * FIXME: This is a hack. Use pinmux / pinctrl. - */ -static void bcm2708_init_pinmode(void) -{ -#define INP_GPIO(g) *(gpio+((g)/10)) &= ~(7<<(((g)%10)*3)) -#define SET_GPIO_ALT(g,a) *(gpio+(((g)/10))) |= (((a)<=3?(a)+4:(a)==4?3:2)<<(((g)%10)*3)) - - int pin; - u32 *gpio = ioremap(GPIO_BASE, SZ_16K); - - /* SPI is on GPIO 7..11 */ - for (pin = 7; pin <= 11; pin++) { - INP_GPIO(pin); /* set mode to GPIO input first */ - SET_GPIO_ALT(pin, 0); /* set mode to ALT 0 */ - } - - iounmap(gpio); - -#undef INP_GPIO -#undef SET_GPIO_ALT -} - -static inline u32 bcm2708_rd(struct bcm2708_spi *bs, unsigned reg) -{ - return readl(bs->base + reg); -} - -static inline void bcm2708_wr(struct bcm2708_spi *bs, unsigned reg, u32 val) -{ - writel(val, bs->base + reg); -} - -static inline void bcm2708_rd_fifo(struct bcm2708_spi *bs, int len) -{ - u8 byte; - - while (len--) { - byte = bcm2708_rd(bs, SPI_FIFO); - if (bs->rx_buf) - *bs->rx_buf++ = byte; - } -} - -static inline void bcm2708_wr_fifo(struct bcm2708_spi *bs, int len) -{ - u8 byte; - u16 val; - - if (len > bs->len) - len = bs->len; - - if (unlikely(bcm2708_rd(bs, SPI_CS) & SPI_CS_LEN)) { - /* LoSSI mode */ - if (unlikely(len % 2)) { - printk(KERN_ERR"bcm2708_wr_fifo: length must be even, skipping.\n"); - bs->len = 0; - return; - } - while (len) { - if (bs->tx_buf) { - val = *(const u16 *)bs->tx_buf; - bs->tx_buf += 2; - } else - val = 0; - bcm2708_wr(bs, SPI_FIFO, val); - bs->len -= 2; - len -= 2; - } - return; - } - - while (len--) { - byte = bs->tx_buf ? *bs->tx_buf++ : 0; - bcm2708_wr(bs, SPI_FIFO, byte); - bs->len--; - } -} - -static irqreturn_t bcm2708_spi_interrupt(int irq, void *dev_id) -{ - struct spi_master *master = dev_id; - struct bcm2708_spi *bs = spi_master_get_devdata(master); - u32 cs; - - spin_lock(&bs->lock); - - cs = bcm2708_rd(bs, SPI_CS); - - if (cs & SPI_CS_DONE) { - if (bs->len) { /* first interrupt in a transfer */ - /* fill the TX fifo with up to 16 bytes */ - bcm2708_wr_fifo(bs, 16); - } else { /* transfer complete */ - /* disable interrupts */ - cs &= ~(SPI_CS_INTR | SPI_CS_INTD); - bcm2708_wr(bs, SPI_CS, cs); - - /* drain RX FIFO */ - while (cs & SPI_CS_RXD) { - bcm2708_rd_fifo(bs, 1); - cs = bcm2708_rd(bs, SPI_CS); - } - - /* wake up our bh */ - complete(&bs->done); - } - } else if (cs & SPI_CS_RXR) { - /* read 12 bytes of data */ - bcm2708_rd_fifo(bs, 12); - - /* write up to 12 bytes */ - bcm2708_wr_fifo(bs, 12); - } - - spin_unlock(&bs->lock); - - return IRQ_HANDLED; -} - -static int bcm2708_setup_state(struct spi_master *master, - struct device *dev, struct bcm2708_spi_state *state, - u32 hz, u8 csel, u8 mode, u8 bpw) -{ - struct bcm2708_spi *bs = spi_master_get_devdata(master); - int cdiv; - unsigned long bus_hz; - u32 cs = 0; - - bus_hz = clk_get_rate(bs->clk); - - if (hz >= bus_hz) { - cdiv = 2; /* bus_hz / 2 is as fast as we can go */ - } else if (hz) { - cdiv = DIV_ROUND_UP(bus_hz, hz); - - /* CDIV must be a power of 2, so round up */ - cdiv = roundup_pow_of_two(cdiv); - - if (cdiv > 65536) { - dev_dbg(dev, - "setup: %d Hz too slow, cdiv %u; min %ld Hz\n", - hz, cdiv, bus_hz / 65536); - return -EINVAL; - } else if (cdiv == 65536) { - cdiv = 0; - } else if (cdiv == 1) { - cdiv = 2; /* 1 gets rounded down to 0; == 65536 */ - } - } else { - cdiv = 0; - } - - switch (bpw) { - case 8: - break; - case 9: - /* Reading in LoSSI mode is a special case. See 'BCM2835 ARM Peripherals' datasheet */ - cs |= SPI_CS_LEN; - break; - default: - dev_dbg(dev, "setup: invalid bits_per_word %u (must be 8 or 9)\n", - bpw); - return -EINVAL; - } - - if (mode & SPI_CPOL) - cs |= SPI_CS_CPOL; - if (mode & SPI_CPHA) - cs |= SPI_CS_CPHA; - - if (!(mode & SPI_NO_CS)) { - if (mode & SPI_CS_HIGH) { - cs |= SPI_CS_CSPOL; - cs |= SPI_CS_CSPOL0 << csel; - } - - cs |= csel; - } else { - cs |= SPI_CS_CS_10 | SPI_CS_CS_01; - } - - if (state) { - state->cs = cs; - state->cdiv = cdiv; - dev_dbg(dev, "setup: want %d Hz; " - "bus_hz=%lu / cdiv=%u == %lu Hz; " - "mode %u: cs 0x%08X\n", - hz, bus_hz, cdiv, bus_hz/cdiv, mode, cs); - } - - return 0; -} - -static int bcm2708_process_transfer(struct bcm2708_spi *bs, - struct spi_message *msg, struct spi_transfer *xfer) -{ - struct spi_device *spi = msg->spi; - struct bcm2708_spi_state state, *stp; - int ret; - u32 cs; - - if (bs->stopping) - return -ESHUTDOWN; - - if (xfer->bits_per_word || xfer->speed_hz) { - ret = bcm2708_setup_state(spi->master, &spi->dev, &state, - xfer->speed_hz ? xfer->speed_hz : spi->max_speed_hz, - spi->chip_select, spi->mode, - xfer->bits_per_word ? xfer->bits_per_word : - spi->bits_per_word); - if (ret) - return ret; - - stp = &state; - } else { - stp = spi->controller_state; - } - - reinit_completion(&bs->done); - bs->tx_buf = xfer->tx_buf; - bs->rx_buf = xfer->rx_buf; - bs->len = xfer->len; - - cs = stp->cs | SPI_CS_INTR | SPI_CS_INTD | SPI_CS_TA; - - bcm2708_wr(bs, SPI_CLK, stp->cdiv); - bcm2708_wr(bs, SPI_CS, cs); - - ret = wait_for_completion_timeout(&bs->done, - msecs_to_jiffies(SPI_TIMEOUT_MS)); - if (ret == 0) { - dev_err(&spi->dev, "transfer timed out\n"); - return -ETIMEDOUT; - } - - if (xfer->delay_usecs) - udelay(xfer->delay_usecs); - - if (list_is_last(&xfer->transfer_list, &msg->transfers) || - xfer->cs_change) { - /* clear TA and interrupt flags */ - bcm2708_wr(bs, SPI_CS, stp->cs); - } - - msg->actual_length += (xfer->len - bs->len); - - return 0; -} - -static void bcm2708_work(struct work_struct *work) -{ - struct bcm2708_spi *bs = container_of(work, struct bcm2708_spi, work); - unsigned long flags; - struct spi_message *msg; - struct spi_transfer *xfer; - int status = 0; - - spin_lock_irqsave(&bs->lock, flags); - while (!list_empty(&bs->queue)) { - msg = list_first_entry(&bs->queue, struct spi_message, queue); - list_del_init(&msg->queue); - spin_unlock_irqrestore(&bs->lock, flags); - - list_for_each_entry(xfer, &msg->transfers, transfer_list) { - status = bcm2708_process_transfer(bs, msg, xfer); - if (status) - break; - } - - msg->status = status; - msg->complete(msg->context); - - spin_lock_irqsave(&bs->lock, flags); - } - spin_unlock_irqrestore(&bs->lock, flags); -} - -static int bcm2708_spi_setup(struct spi_device *spi) -{ - struct bcm2708_spi *bs = spi_master_get_devdata(spi->master); - struct bcm2708_spi_state *state; - int ret; - - if (bs->stopping) - return -ESHUTDOWN; - - state = spi->controller_state; - if (!state) { - state = kzalloc(sizeof(*state), GFP_KERNEL); - if (!state) - return -ENOMEM; - - spi->controller_state = state; - } - - ret = bcm2708_setup_state(spi->master, &spi->dev, state, - spi->max_speed_hz, spi->chip_select, spi->mode, - spi->bits_per_word); - if (ret < 0) { - kfree(state); - spi->controller_state = NULL; - return ret; - } - - dev_dbg(&spi->dev, - "setup: cd %d: %d Hz, bpw %u, mode 0x%x -> CS=%08x CDIV=%04x\n", - spi->chip_select, spi->max_speed_hz, spi->bits_per_word, - spi->mode, state->cs, state->cdiv); - - return 0; -} - -static int bcm2708_spi_transfer(struct spi_device *spi, struct spi_message *msg) -{ - struct bcm2708_spi *bs = spi_master_get_devdata(spi->master); - struct spi_transfer *xfer; - int ret; - unsigned long flags; - - if (unlikely(list_empty(&msg->transfers))) - return -EINVAL; - - if (bs->stopping) - return -ESHUTDOWN; - - list_for_each_entry(xfer, &msg->transfers, transfer_list) { - if (!(xfer->tx_buf || xfer->rx_buf) && xfer->len) { - dev_dbg(&spi->dev, "missing rx or tx buf\n"); - return -EINVAL; - } - - if (!xfer->bits_per_word || xfer->speed_hz) - continue; - - ret = bcm2708_setup_state(spi->master, &spi->dev, NULL, - xfer->speed_hz ? xfer->speed_hz : spi->max_speed_hz, - spi->chip_select, spi->mode, - xfer->bits_per_word ? xfer->bits_per_word : - spi->bits_per_word); - if (ret) - return ret; - } - - msg->status = -EINPROGRESS; - msg->actual_length = 0; - - spin_lock_irqsave(&bs->lock, flags); - list_add_tail(&msg->queue, &bs->queue); - queue_work(bs->workq, &bs->work); - spin_unlock_irqrestore(&bs->lock, flags); - - return 0; -} - -static void bcm2708_spi_cleanup(struct spi_device *spi) -{ - if (spi->controller_state) { - kfree(spi->controller_state); - spi->controller_state = NULL; - } -} - -static int bcm2708_spi_probe(struct platform_device *pdev) -{ - struct resource *regs; - int irq, err = -ENOMEM; - struct clk *clk; - struct spi_master *master; - struct bcm2708_spi *bs; - - regs = platform_get_resource(pdev, IORESOURCE_MEM, 0); - if (!regs) { - dev_err(&pdev->dev, "could not get IO memory\n"); - return -ENXIO; - } - - irq = platform_get_irq(pdev, 0); - if (irq < 0) { - dev_err(&pdev->dev, "could not get IRQ\n"); - return irq; - } - - clk = clk_get(&pdev->dev, NULL); - if (IS_ERR(clk)) { - dev_err(&pdev->dev, "could not find clk: %ld\n", PTR_ERR(clk)); - return PTR_ERR(clk); - } - - if (!pdev->dev.of_node) - bcm2708_init_pinmode(); - - master = spi_alloc_master(&pdev->dev, sizeof(*bs)); - if (!master) { - dev_err(&pdev->dev, "spi_alloc_master() failed\n"); - goto out_clk_put; - } - - /* the spi->mode bits understood by this driver: */ - master->mode_bits = SPI_CPOL | SPI_CPHA | SPI_CS_HIGH | SPI_NO_CS; - - master->bus_num = pdev->id; - master->num_chipselect = 3; - master->setup = bcm2708_spi_setup; - master->transfer = bcm2708_spi_transfer; - master->cleanup = bcm2708_spi_cleanup; - master->dev.of_node = pdev->dev.of_node; - platform_set_drvdata(pdev, master); - - bs = spi_master_get_devdata(master); - - spin_lock_init(&bs->lock); - INIT_LIST_HEAD(&bs->queue); - init_completion(&bs->done); - INIT_WORK(&bs->work, bcm2708_work); - - bs->base = ioremap(regs->start, resource_size(regs)); - if (!bs->base) { - dev_err(&pdev->dev, "could not remap memory\n"); - goto out_master_put; - } - - bs->workq = create_singlethread_workqueue(dev_name(&pdev->dev)); - if (!bs->workq) { - dev_err(&pdev->dev, "could not create workqueue\n"); - goto out_iounmap; - } - - bs->irq = irq; - bs->clk = clk; - bs->stopping = false; - - err = request_irq(irq, bcm2708_spi_interrupt, 0, dev_name(&pdev->dev), - master); - if (err) { - dev_err(&pdev->dev, "could not request IRQ: %d\n", err); - goto out_workqueue; - } - - /* initialise the hardware */ - clk_prepare_enable(clk); - bcm2708_wr(bs, SPI_CS, SPI_CS_REN | SPI_CS_CLEAR_RX | SPI_CS_CLEAR_TX); - - err = spi_register_master(master); - if (err) { - dev_err(&pdev->dev, "could not register SPI master: %d\n", err); - goto out_free_irq; - } - - dev_info(&pdev->dev, "SPI Controller at 0x%08lx (irq %d)\n", - (unsigned long)regs->start, irq); - - return 0; - -out_free_irq: - free_irq(bs->irq, master); - clk_disable_unprepare(bs->clk); -out_workqueue: - destroy_workqueue(bs->workq); -out_iounmap: - iounmap(bs->base); -out_master_put: - spi_master_put(master); -out_clk_put: - clk_put(clk); - return err; -} - -static int bcm2708_spi_remove(struct platform_device *pdev) -{ - struct spi_master *master = platform_get_drvdata(pdev); - struct bcm2708_spi *bs = spi_master_get_devdata(master); - - /* reset the hardware and block queue progress */ - spin_lock_irq(&bs->lock); - bs->stopping = true; - bcm2708_wr(bs, SPI_CS, SPI_CS_CLEAR_RX | SPI_CS_CLEAR_TX); - spin_unlock_irq(&bs->lock); - - flush_work(&bs->work); - - clk_disable_unprepare(bs->clk); - clk_put(bs->clk); - free_irq(bs->irq, master); - iounmap(bs->base); - - spi_unregister_master(master); - - return 0; -} - -static const struct of_device_id bcm2708_spi_match[] = { - { .compatible = "brcm,bcm2708-spi", }, - {} -}; -MODULE_DEVICE_TABLE(of, bcm2708_spi_match); - -static struct platform_driver bcm2708_spi_driver = { - .driver = { - .name = DRV_NAME, - .owner = THIS_MODULE, - .of_match_table = bcm2708_spi_match, - }, - .probe = bcm2708_spi_probe, - .remove = bcm2708_spi_remove, -}; - - -static int __init bcm2708_spi_init(void) -{ - return platform_driver_probe(&bcm2708_spi_driver, bcm2708_spi_probe); -} -module_init(bcm2708_spi_init); - -static void __exit bcm2708_spi_exit(void) -{ - platform_driver_unregister(&bcm2708_spi_driver); -} -module_exit(bcm2708_spi_exit); - - -//module_platform_driver(bcm2708_spi_driver); - -MODULE_DESCRIPTION("SPI controller driver for Broadcom BCM2708"); -MODULE_AUTHOR("Chris Boot "); -MODULE_LICENSE("GPL v2"); -MODULE_ALIAS("platform:" DRV_NAME); diff --git a/drivers/staging/media/lirc/lirc_rpi.c b/drivers/staging/media/lirc/lirc_rpi.c index e1c3cb645af408..f1e0de98fcf904 100644 --- a/drivers/staging/media/lirc/lirc_rpi.c +++ b/drivers/staging/media/lirc/lirc_rpi.c @@ -42,9 +42,6 @@ #include #include #include -#ifndef CONFIG_ARCH_BCM2835 -#include -#endif #define LIRC_DRIVER_NAME "lirc_rpi" #define RBUF_LEN 256 @@ -346,7 +343,7 @@ static void read_pin_settings(struct device_node *node) static int init_port(void) { - int i, nlow, nhigh, ret; + int i, nlow, nhigh; struct device_node *node; node = lirc_rpi_dev->dev.of_node; @@ -372,8 +369,7 @@ static int init_port(void) if (!pins_node) { printk(KERN_ERR LIRC_DRIVER_NAME ": pinctrl settings not found!\n"); - ret = -EINVAL; - goto exit_init_port; + return -EINVAL; } read_pin_settings(pins_node); @@ -386,39 +382,8 @@ static int init_port(void) read_bool_property(node, "rpi,debug", &debug); - } - else - { -#ifdef CONFIG_ARCH_BCM2835 - ret = -EINVAL; - goto exit_init_port; -#else - if (gpio_in_pin >= BCM2708_NR_GPIOS || - gpio_out_pin >= BCM2708_NR_GPIOS) { - ret = -EINVAL; - printk(KERN_ERR LIRC_DRIVER_NAME - ": invalid GPIO pin(s) specified!\n"); - goto exit_init_port; - } - - if (gpio_request(gpio_out_pin, LIRC_DRIVER_NAME " ir/out")) { - printk(KERN_ALERT LIRC_DRIVER_NAME - ": cant claim gpio pin %d\n", gpio_out_pin); - ret = -ENODEV; - goto exit_init_port; - } - - if (gpio_request(gpio_in_pin, LIRC_DRIVER_NAME " ir/in")) { - printk(KERN_ALERT LIRC_DRIVER_NAME - ": cant claim gpio pin %d\n", gpio_in_pin); - ret = -ENODEV; - goto exit_gpio_free_out_pin; - } - - bcm2708_gpio_setpull(gpiochip, gpio_in_pin, gpio_in_pull); - gpiochip->direction_input(gpiochip, gpio_in_pin); - gpiochip->direction_output(gpiochip, gpio_out_pin, 1); -#endif + } else { + return EINVAL; } gpiochip->set(gpiochip, gpio_out_pin, invert); @@ -455,12 +420,6 @@ static int init_port(void) } return 0; - - exit_gpio_free_out_pin: - gpio_free(gpio_out_pin); - - exit_init_port: - return ret; } // called when the character device is opened diff --git a/drivers/tty/serial/amba-pl011.c b/drivers/tty/serial/amba-pl011.c index 3c377585bae69a..fd27e986b1dd34 100644 --- a/drivers/tty/serial/amba-pl011.c +++ b/drivers/tty/serial/amba-pl011.c @@ -87,7 +87,7 @@ struct vendor_data { static unsigned int get_fifosize_arm(struct amba_device *dev) { - return 16; //TODO: fix: amba_rev(dev) < 3 ? 16 : 32; + return amba_rev(dev) < 3 ? 16 : 32; } static struct vendor_data vendor_arm = { diff --git a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c index a331720e6627a4..2ceed4212980f0 100644 --- a/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c +++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd_linux.c @@ -402,6 +402,7 @@ static void hcd_init_fiq(void *cookie) dwc_otg_device_t *otg_dev = cookie; dwc_otg_hcd_t *dwc_otg_hcd = otg_dev->hcd; struct pt_regs regs; + int irq; if (claim_fiq(&fh)) { DWC_ERROR("Can't claim FIQ"); @@ -445,16 +446,16 @@ static void hcd_init_fiq(void *cookie) DWC_WARN("MPHI periph has NOT been enabled"); #endif // Enable FIQ interrupt from USB peripheral -#ifdef CONFIG_ARCH_BCM2835 - enable_fiq(platform_get_irq(otg_dev->os_dep.platformdev, 1)); -#else #ifdef CONFIG_MULTI_IRQ_HANDLER - if (otg_dev->os_dep.platformdev->dev.of_node) - enable_fiq(platform_get_irq(otg_dev->os_dep.platformdev, 1)); - else -#endif - enable_fiq(INTERRUPT_VC_USB); + irq = platform_get_irq(otg_dev->os_dep.platformdev, 1); +#else + irq = INTERRUPT_VC_USB; #endif + if (irq < 0) { + DWC_ERROR("Can't get FIQ irq"); + return; + } + enable_fiq(irq); local_fiq_enable(); } diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig index ee7eebfef00e16..85bafd05ad59e8 100644 --- a/drivers/watchdog/Kconfig +++ b/drivers/watchdog/Kconfig @@ -482,12 +482,6 @@ config RETU_WATCHDOG To compile this driver as a module, choose M here: the module will be called retu_wdt. -config BCM2708_WDT - tristate "BCM2708 Watchdog" - depends on ARCH_BCM2708 || ARCH_BCM2709 - help - Enables BCM2708 watchdog support. - config MOXART_WDT tristate "MOXART watchdog" depends on ARCH_MOXART diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile index 3afbeed0222df4..0c616e3f67bb57 100644 --- a/drivers/watchdog/Makefile +++ b/drivers/watchdog/Makefile @@ -57,7 +57,6 @@ obj-$(CONFIG_TS72XX_WATCHDOG) += ts72xx_wdt.o obj-$(CONFIG_IMX2_WDT) += imx2_wdt.o obj-$(CONFIG_UX500_WATCHDOG) += ux500_wdt.o obj-$(CONFIG_RETU_WATCHDOG) += retu_wdt.o -obj-$(CONFIG_BCM2708_WDT) += bcm2708_wdog.o obj-$(CONFIG_BCM2835_WDT) += bcm2835_wdt.o obj-$(CONFIG_MOXART_WDT) += moxart_wdt.o obj-$(CONFIG_SIRFSOC_WATCHDOG) += sirfsoc_wdt.o diff --git a/drivers/watchdog/bcm2708_wdog.c b/drivers/watchdog/bcm2708_wdog.c deleted file mode 100644 index 8a27d68c01e2a6..00000000000000 --- a/drivers/watchdog/bcm2708_wdog.c +++ /dev/null @@ -1,382 +0,0 @@ -/* - * Broadcom BCM2708 watchdog driver. - * - * (c) Copyright 2010 Broadcom Europe Ltd - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License - * as published by the Free Software Foundation; either version - * 2 of the License, or (at your option) any later version. - * - * BCM2708 watchdog driver. Loosely based on wdt driver. - */ - -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include -#include - -#define SECS_TO_WDOG_TICKS(x) ((x) << 16) -#define WDOG_TICKS_TO_SECS(x) ((x) >> 16) - -static unsigned long wdog_is_open; -static uint32_t wdog_ticks; /* Ticks to load into wdog timer */ -static char expect_close; - -/* - * Module parameters - */ - -#define WD_TIMO 10 /* Default heartbeat = 60 seconds */ -static int heartbeat = WD_TIMO; /* Heartbeat in seconds */ - -module_param(heartbeat, int, 0); -MODULE_PARM_DESC(heartbeat, - "Watchdog heartbeat in seconds. (0 < heartbeat < 65536, default=" - __MODULE_STRING(WD_TIMO) ")"); - -static int nowayout = WATCHDOG_NOWAYOUT; -module_param(nowayout, int, 0); -MODULE_PARM_DESC(nowayout, - "Watchdog cannot be stopped once started (default=" - __MODULE_STRING(WATCHDOG_NOWAYOUT) ")"); - -static DEFINE_SPINLOCK(wdog_lock); - -/** - * Start the watchdog driver. - */ - -static int wdog_start(unsigned long timeout) -{ - uint32_t cur; - unsigned long flags; - spin_lock_irqsave(&wdog_lock, flags); - - /* enable the watchdog */ - iowrite32(PM_PASSWORD | (timeout & PM_WDOG_TIME_SET), - __io_address(PM_WDOG)); - cur = ioread32(__io_address(PM_RSTC)); - iowrite32(PM_PASSWORD | (cur & PM_RSTC_WRCFG_CLR) | - PM_RSTC_WRCFG_FULL_RESET, __io_address(PM_RSTC)); - - spin_unlock_irqrestore(&wdog_lock, flags); - return 0; -} - -/** - * Stop the watchdog driver. - */ - -static int wdog_stop(void) -{ - iowrite32(PM_PASSWORD | PM_RSTC_RESET, __io_address(PM_RSTC)); - printk(KERN_INFO "watchdog stopped\n"); - return 0; -} - -/** - * Reload counter one with the watchdog heartbeat. We don't bother - * reloading the cascade counter. - */ - -static void wdog_ping(void) -{ - wdog_start(wdog_ticks); -} - -/** - * @t: the new heartbeat value that needs to be set. - * - * Set a new heartbeat value for the watchdog device. If the heartbeat - * value is incorrect we keep the old value and return -EINVAL. If - * successful we return 0. - */ - -static int wdog_set_heartbeat(int t) -{ - if (t < 1 || t > WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET)) - return -EINVAL; - - heartbeat = t; - wdog_ticks = SECS_TO_WDOG_TICKS(t); - return 0; -} - -/** - * @file: file handle to the watchdog - * @buf: buffer to write (unused as data does not matter here - * @count: count of bytes - * @ppos: pointer to the position to write. No seeks allowed - * - * A write to a watchdog device is defined as a keepalive signal. - * - * if 'nowayout' is set then normally a close() is ignored. But - * if you write 'V' first then the close() will stop the timer. - */ - -static ssize_t wdog_write(struct file *file, const char __user *buf, - size_t count, loff_t *ppos) -{ - if (count) { - if (!nowayout) { - size_t i; - - /* In case it was set long ago */ - expect_close = 0; - - for (i = 0; i != count; i++) { - char c; - if (get_user(c, buf + i)) - return -EFAULT; - if (c == 'V') - expect_close = 42; - } - } - wdog_ping(); - } - return count; -} - -static int wdog_get_status(void) -{ - unsigned long flags; - int status = 0; - spin_lock_irqsave(&wdog_lock, flags); - /* FIXME: readback reset reason */ - spin_unlock_irqrestore(&wdog_lock, flags); - return status; -} - -static uint32_t wdog_get_remaining(void) -{ - uint32_t ret = ioread32(__io_address(PM_WDOG)); - return ret & PM_WDOG_TIME_SET; -} - -/** - * @file: file handle to the device - * @cmd: watchdog command - * @arg: argument pointer - * - * The watchdog API defines a common set of functions for all watchdogs - * according to their available features. We only actually usefully support - * querying capabilities and current status. - */ - -static long wdog_ioctl(struct file *file, unsigned int cmd, unsigned long arg) -{ - void __user *argp = (void __user *)arg; - int __user *p = argp; - int new_heartbeat; - int status; - int options; - uint32_t remaining; - - struct watchdog_info ident = { - .options = WDIOF_SETTIMEOUT| - WDIOF_MAGICCLOSE| - WDIOF_KEEPALIVEPING, - .firmware_version = 1, - .identity = "BCM2708", - }; - - switch (cmd) { - case WDIOC_GETSUPPORT: - return copy_to_user(argp, &ident, sizeof(ident)) ? -EFAULT : 0; - case WDIOC_GETSTATUS: - status = wdog_get_status(); - return put_user(status, p); - case WDIOC_GETBOOTSTATUS: - return put_user(0, p); - case WDIOC_KEEPALIVE: - wdog_ping(); - return 0; - case WDIOC_SETTIMEOUT: - if (get_user(new_heartbeat, p)) - return -EFAULT; - if (wdog_set_heartbeat(new_heartbeat)) - return -EINVAL; - wdog_ping(); - /* Fall */ - case WDIOC_GETTIMEOUT: - return put_user(heartbeat, p); - case WDIOC_GETTIMELEFT: - remaining = WDOG_TICKS_TO_SECS(wdog_get_remaining()); - return put_user(remaining, p); - case WDIOC_SETOPTIONS: - if (get_user(options, p)) - return -EFAULT; - if (options & WDIOS_DISABLECARD) - wdog_stop(); - if (options & WDIOS_ENABLECARD) - wdog_start(wdog_ticks); - return 0; - default: - return -ENOTTY; - } -} - -/** - * @inode: inode of device - * @file: file handle to device - * - * The watchdog device has been opened. The watchdog device is single - * open and on opening we load the counters. - */ - -static int wdog_open(struct inode *inode, struct file *file) -{ - if (test_and_set_bit(0, &wdog_is_open)) - return -EBUSY; - /* - * Activate - */ - wdog_start(wdog_ticks); - return nonseekable_open(inode, file); -} - -/** - * @inode: inode to board - * @file: file handle to board - * - * The watchdog has a configurable API. There is a religious dispute - * between people who want their watchdog to be able to shut down and - * those who want to be sure if the watchdog manager dies the machine - * reboots. In the former case we disable the counters, in the latter - * case you have to open it again very soon. - */ - -static int wdog_release(struct inode *inode, struct file *file) -{ - if (expect_close == 42) { - wdog_stop(); - } else { - printk(KERN_CRIT - "wdt: WDT device closed unexpectedly. WDT will not stop!\n"); - wdog_ping(); - } - clear_bit(0, &wdog_is_open); - expect_close = 0; - return 0; -} - -/** - * @this: our notifier block - * @code: the event being reported - * @unused: unused - * - * Our notifier is called on system shutdowns. Turn the watchdog - * off so that it does not fire during the next reboot. - */ - -static int wdog_notify_sys(struct notifier_block *this, unsigned long code, - void *unused) -{ - if (code == SYS_DOWN || code == SYS_HALT) - wdog_stop(); - return NOTIFY_DONE; -} - -/* - * Kernel Interfaces - */ - - -static const struct file_operations wdog_fops = { - .owner = THIS_MODULE, - .llseek = no_llseek, - .write = wdog_write, - .unlocked_ioctl = wdog_ioctl, - .open = wdog_open, - .release = wdog_release, -}; - -static struct miscdevice wdog_miscdev = { - .minor = WATCHDOG_MINOR, - .name = "watchdog", - .fops = &wdog_fops, -}; - -/* - * The WDT card needs to learn about soft shutdowns in order to - * turn the timebomb registers off. - */ - -static struct notifier_block wdog_notifier = { - .notifier_call = wdog_notify_sys, -}; - -/** - * cleanup_module: - * - * Unload the watchdog. You cannot do this with any file handles open. - * If your watchdog is set to continue ticking on close and you unload - * it, well it keeps ticking. We won't get the interrupt but the board - * will not touch PC memory so all is fine. You just have to load a new - * module in 60 seconds or reboot. - */ - -static void __exit wdog_exit(void) -{ - misc_deregister(&wdog_miscdev); - unregister_reboot_notifier(&wdog_notifier); -} - -static int __init wdog_init(void) -{ - int ret; - - /* Check that the heartbeat value is within it's range; - if not reset to the default */ - if (wdog_set_heartbeat(heartbeat)) { - wdog_set_heartbeat(WD_TIMO); - printk(KERN_INFO "bcm2708_wdog: heartbeat value must be " - "0 < heartbeat < %d, using %d\n", - WDOG_TICKS_TO_SECS(PM_WDOG_TIME_SET), - WD_TIMO); - } - - ret = register_reboot_notifier(&wdog_notifier); - if (ret) { - printk(KERN_ERR - "wdt: cannot register reboot notifier (err=%d)\n", ret); - goto out_reboot; - } - - ret = misc_register(&wdog_miscdev); - if (ret) { - printk(KERN_ERR - "wdt: cannot register miscdev on minor=%d (err=%d)\n", - WATCHDOG_MINOR, ret); - goto out_misc; - } - - printk(KERN_INFO "bcm2708 watchdog, heartbeat=%d sec (nowayout=%d)\n", - heartbeat, nowayout); - return 0; - -out_misc: - unregister_reboot_notifier(&wdog_notifier); -out_reboot: - return ret; -} - -module_init(wdog_init); -module_exit(wdog_exit); - -MODULE_AUTHOR("Luke Diamand"); -MODULE_DESCRIPTION("Driver for BCM2708 watchdog"); -MODULE_ALIAS_MISCDEV(WATCHDOG_MINOR); -MODULE_ALIAS_MISCDEV(TEMP_MINOR); -MODULE_LICENSE("GPL"); diff --git a/include/linux/broadcom/vc_cma.h b/include/linux/broadcom/vc_cma.h index 53258327ec3b37..be2819d5d41f9d 100644 --- a/include/linux/broadcom/vc_cma.h +++ b/include/linux/broadcom/vc_cma.h @@ -22,8 +22,15 @@ #define VC_CMA_IOC_RESERVE _IO(VC_CMA_IOC_MAGIC, 0) #ifdef __KERNEL__ -extern void __init vc_cma_early_init(void); -extern void __init vc_cma_reserve(void); + +#ifdef CONFIG_BCM_VC_CMA +void vc_cma_early_init(void); +void vc_cma_reserve(void); +#else +static inline void vc_cma_early_init(void) { } +static inline void vc_cma_reserve(void) { } +#endif + #endif #endif /* VC_CMA_H */ diff --git a/arch/arm/mach-bcm2708/include/mach/vmcs_sm_ioctl.h b/include/linux/broadcom/vmcs_sm_ioctl.h similarity index 100% rename from arch/arm/mach-bcm2708/include/mach/vmcs_sm_ioctl.h rename to include/linux/broadcom/vmcs_sm_ioctl.h