diff --git a/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt b/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt new file mode 100644 index 00000000000000..7a837d2182acf7 --- /dev/null +++ b/Documentation/devicetree/bindings/clock/brcm,bcm2835-aux-clock.txt @@ -0,0 +1,31 @@ +Broadcom BCM2835 auxiliary peripheral support + +This binding uses the common clock binding: + Documentation/devicetree/bindings/clock/clock-bindings.txt + +The auxiliary peripherals (UART, SPI1, and SPI2) have a small register +area controlling clock gating to the peripherals, and providing an IRQ +status register. + +Required properties: +- compatible: Should be "brcm,bcm2835-aux" +- #clock-cells: Should be <1>. The permitted clock-specifier values can be + found in include/dt-bindings/clock/bcm2835-aux.h +- reg: Specifies base physical address and size of the registers +- clocks: The parent clock phandle + +Example: + + clocks: cprman@7e101000 { + compatible = "brcm,bcm2835-cprman"; + #clock-cells = <1>; + reg = <0x7e101000 0x2000>; + clocks = <&clk_osc>; + }; + + aux: aux@0x7e215004 { + compatible = "brcm,bcm2835-aux"; + #clock-cells = <1>; + reg = <0x7e215000 0x8>; + clocks = <&clocks BCM2835_CLOCK_VPU>; + }; diff --git a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts index d2d6fa0fa6b384..bcc31136019513 100644 --- a/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts +++ b/arch/arm/boot/dts/bcm2708-rpi-b-plus.dts @@ -22,6 +22,16 @@ brcm,pins = <8 7>; brcm,function = <1>; /* output */ }; + + spi1_pins: spi1_pins { + brcm,pins = <19 20 21>; + brcm,function = <3>; /* alt4 */ + }; + + spi1_cs_pins: spi1_cs_pins { + brcm,pins = <18 17 16>; + brcm,function = <1>; /* output */ + }; i2c0_pins: i2c0 { brcm,pins = <0 1>; @@ -76,6 +86,36 @@ }; }; +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins &spi1_cs_pins>; + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>; + + spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; + + spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; + + spidev@2{ + compatible = "spidev"; + reg = <2>; /* CE2 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; @@ -122,6 +162,7 @@ uart0_clkrate = <&clk_uart0>,"clock-frequency:0"; i2s = <&i2s>,"status"; spi = <&spi0>,"status"; + spi1_aux = <&spi1>,"status"; i2c0 = <&i2c0>,"status"; i2c1 = <&i2c1>,"status"; i2c2_iknowwhatimdoing = <&i2c2>,"status"; diff --git a/arch/arm/boot/dts/bcm2708-rpi-cm.dts b/arch/arm/boot/dts/bcm2708-rpi-cm.dts index 8bcafb41c39595..0301eac1d06df3 100755 --- a/arch/arm/boot/dts/bcm2708-rpi-cm.dts +++ b/arch/arm/boot/dts/bcm2708-rpi-cm.dts @@ -20,6 +20,27 @@ brcm,pins = <8 7>; brcm,function = <1>; /* output */ }; + + + spi1_pins: spi1_pins { + brcm,pins = <19 20 21>; + brcm,function = <3>; /* alt4 */ + }; + + spi1_cs_pins: spi1_cs_pins { + brcm,pins = <18 17 16>; + brcm,function = <1>; /* output */ + }; + + spi2_pins: spi2_pins { + brcm,pins = <40 41 42>; + brcm,function = <3>; /* alt4 */ + }; + + spi2_cs_pins: spi2_cs_pins { + brcm,pins = <45 44 43>; + brcm,function = <1>; /* output */ + }; i2c0_pins: i2c0 { brcm,pins = <0 1>; @@ -59,6 +80,66 @@ }; }; +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins &spi1_cs_pins>; + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>; + + spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; + + spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; + + spidev@2{ + compatible = "spidev"; + reg = <2>; /* CE2 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; +}; + +&spi2 { + pinctrl-names = "default"; + pinctrl-0 = <&spi2_pins &spi2_cs_pins>; + cs-gpios = <&gpio 45 1>, <&gpio 44 1>, <&gpio 43 1>; + + spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; + + spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; + + spidev@2{ + compatible = "spidev"; + reg = <2>; /* CE2 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; @@ -91,6 +172,8 @@ uart0_clkrate = <&clk_uart0>,"clock-frequency:0"; i2s = <&i2s>,"status"; spi = <&spi0>,"status"; + spi1_aux = <&spi1>,"status"; + spi2_aux = <&spi2>,"status"; i2c0 = <&i2c0>,"status"; i2c1 = <&i2c1>,"status"; i2c2_iknowwhatimdoing = <&i2c2>,"status"; diff --git a/arch/arm/boot/dts/bcm2708_common.dtsi b/arch/arm/boot/dts/bcm2708_common.dtsi index 18d3c4516ff0b7..72e483e80f42f0 100644 --- a/arch/arm/boot/dts/bcm2708_common.dtsi +++ b/arch/arm/boot/dts/bcm2708_common.dtsi @@ -1,3 +1,4 @@ +#include #include "skeleton.dtsi" / { @@ -19,6 +20,8 @@ spi0 = &spi0; i2c0 = &i2c0; uart1 = &uart1; + spi1 = &spi1; + spi2 = &spi2; mmc = &mmc; i2c1 = &i2c1; i2c2 = &i2c2; @@ -185,6 +188,13 @@ #pwm-cells = <2>; status = "disabled"; }; + + aux: aux@0x7e215004 { + compatible = "brcm,bcm2835-aux"; + #clock-cells = <1>; + reg = <0x7e215000 0x8>; + clocks = <&clk_core>; + }; uart1: uart@7e215040 { compatible = "brcm,bcm2835-aux-uart", "ns16550"; @@ -194,8 +204,30 @@ reg-shift = <2>; no-loopback-test; status = "disabled"; - }; - + }; + + spi1: spi@7e215080 { + compatible = "brcm,bcm2835-aux-spi"; + reg = <0x7e215080 0x40>, <0x7e215000 0x8>; + interrupts = <1 29>; + clocks = <&aux BCM2835_AUX_CLOCK_SPI1>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + cs-gpios = <0>, <0>, <0>; + }; + + spi2: spi@7e2150C0 { + compatible = "brcm,bcm2835-aux-spi"; + reg = <0x7e2150C0 0x40>, <0x7e215000 0x8>; + interrupts = <1 29>; + clocks = <&aux BCM2835_AUX_CLOCK_SPI2>; + #address-cells = <1>; + #size-cells = <0>; + status = "disabled"; + cs-gpios = <0>, <0>, <0>; + }; + mmc: mmc@7e300000 { compatible = "brcm,bcm2835-mmc"; reg = <0x7e300000 0x100>; diff --git a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts index aca253ff9b7b21..4fd826d2272a16 100644 --- a/arch/arm/boot/dts/bcm2709-rpi-2-b.dts +++ b/arch/arm/boot/dts/bcm2709-rpi-2-b.dts @@ -22,6 +22,16 @@ brcm,pins = <8 7>; brcm,function = <1>; /* output */ }; + + spi1_pins: spi1_pins { + brcm,pins = <19 20 21>; + brcm,function = <3>; /* alt4 */ + }; + + spi1_cs_pins: spi1_cs_pins { + brcm,pins = <18 17 16>; + brcm,function = <1>; /* output */ + }; i2c0_pins: i2c0 { brcm,pins = <0 1>; @@ -76,6 +86,36 @@ }; }; +&spi1 { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins &spi1_cs_pins>; + cs-gpios = <&gpio 18 1>, <&gpio 17 1>, <&gpio 16 1>; + + spidev@0{ + compatible = "spidev"; + reg = <0>; /* CE0 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; + + spidev@1{ + compatible = "spidev"; + reg = <1>; /* CE1 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; + + spidev@2{ + compatible = "spidev"; + reg = <2>; /* CE2 */ + #address-cells = <1>; + #size-cells = <0>; + spi-max-frequency = <500000>; + }; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0_pins>; @@ -122,6 +162,7 @@ uart0_clkrate = <&clk_uart0>,"clock-frequency:0"; i2s = <&i2s>,"status"; spi = <&spi0>,"status"; + spi1_aux = <&spi1>,"status"; i2c0 = <&i2c0>,"status"; i2c1 = <&i2c1>,"status"; i2c2_iknowwhatimdoing = <&i2c2>,"status"; diff --git a/arch/arm/configs/bcm2709_defconfig b/arch/arm/configs/bcm2709_defconfig index fc3525411dd631..ff61f6f8f26707 100644 --- a/arch/arm/configs/bcm2709_defconfig +++ b/arch/arm/configs/bcm2709_defconfig @@ -598,6 +598,7 @@ CONFIG_I2C_BCM2708=m CONFIG_I2C_GPIO=m CONFIG_SPI=y CONFIG_SPI_BCM2835=m +CONFIG_SPI_BCM2835AUX=m CONFIG_SPI_SPIDEV=y CONFIG_PPS=m CONFIG_PPS_CLIENT_LDISC=m diff --git a/arch/arm/configs/bcmrpi_defconfig b/arch/arm/configs/bcmrpi_defconfig index 51dc0197b7e47d..598a6b3534033a 100644 --- a/arch/arm/configs/bcmrpi_defconfig +++ b/arch/arm/configs/bcmrpi_defconfig @@ -591,6 +591,7 @@ CONFIG_I2C_BCM2708=m CONFIG_I2C_GPIO=m CONFIG_SPI=y CONFIG_SPI_BCM2835=m +CONFIG_SPI_BCM2835AUX=m CONFIG_SPI_SPIDEV=y CONFIG_PPS=m CONFIG_PPS_CLIENT_LDISC=m diff --git a/drivers/clk/bcm/Makefile b/drivers/clk/bcm/Makefile index a1b4cbcae647e7..d60fd3f220a0ea 100644 --- a/drivers/clk/bcm/Makefile +++ b/drivers/clk/bcm/Makefile @@ -4,6 +4,7 @@ obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm281xx.o obj-$(CONFIG_CLK_BCM_KONA) += clk-bcm21664.o obj-$(CONFIG_COMMON_CLK_IPROC) += clk-iproc-armpll.o clk-iproc-pll.o clk-iproc-asiu.o obj-$(CONFIG_ARCH_BCM2835)$(CONFIG_ARCH_BCM2708)$(CONFIG_ARCH_BCM2709) += clk-bcm2835.o +obj-$(CONFIG_ARCH_BCM2835)$(CONFIG_ARCH_BCM2708)$(CONFIG_ARCH_BCM2709) += clk-bcm2835-aux.o obj-$(CONFIG_COMMON_CLK_IPROC) += clk-ns2.o obj-$(CONFIG_ARCH_BCM_CYGNUS) += clk-cygnus.o obj-$(CONFIG_ARCH_BCM_NSP) += clk-nsp.o diff --git a/drivers/clk/bcm/clk-bcm2835-aux.c b/drivers/clk/bcm/clk-bcm2835-aux.c new file mode 100644 index 00000000000000..e4f89e28b5ecf5 --- /dev/null +++ b/drivers/clk/bcm/clk-bcm2835-aux.c @@ -0,0 +1,85 @@ +/* + * Copyright (C) 2015 Broadcom + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include + +#define BCM2835_AUXIRQ 0x00 +#define BCM2835_AUXENB 0x04 + +static int bcm2835_aux_clk_probe(struct platform_device *pdev) +{ + struct device *dev = &pdev->dev; + struct clk_onecell_data *onecell; + const char *parent; + struct clk *parent_clk; + struct resource *res; + void __iomem *reg, *gate; + + parent_clk = devm_clk_get(dev, NULL); + if (IS_ERR(parent_clk)) + return PTR_ERR(parent_clk); + parent = __clk_get_name(parent_clk); + + res = platform_get_resource(pdev, IORESOURCE_MEM, 0); + reg = devm_ioremap_resource(dev, res); + if (!reg) + return -ENODEV; + + onecell = devm_kmalloc(dev, sizeof(*onecell), GFP_KERNEL); + if (!onecell) + return -ENOMEM; + onecell->clk_num = BCM2835_AUX_CLOCK_COUNT; + onecell->clks = devm_kcalloc(dev, BCM2835_AUX_CLOCK_COUNT, + sizeof(*onecell->clks), GFP_KERNEL); + if (!onecell->clks) + return -ENOMEM; + + gate = reg + BCM2835_AUXENB; + onecell->clks[BCM2835_AUX_CLOCK_UART] = + clk_register_gate(dev, "aux_uart", parent, 0, gate, 0, 0, NULL); + + onecell->clks[BCM2835_AUX_CLOCK_SPI1] = + clk_register_gate(dev, "aux_spi1", parent, 0, gate, 1, 0, NULL); + + onecell->clks[BCM2835_AUX_CLOCK_SPI2] = + clk_register_gate(dev, "aux_spi2", parent, 0, gate, 2, 0, NULL); + + of_clk_add_provider(pdev->dev.of_node, of_clk_src_onecell_get, onecell); + + return 0; +} + +static const struct of_device_id bcm2835_aux_clk_of_match[] = { + { .compatible = "brcm,bcm2835-aux", }, + {}, +}; +MODULE_DEVICE_TABLE(of, bcm2835_aux_clk_of_match); + +static struct platform_driver bcm2835_aux_clk_driver = { + .driver = { + .name = "bcm2835-aux-clk", + .of_match_table = bcm2835_aux_clk_of_match, + }, + .probe = bcm2835_aux_clk_probe, +}; +builtin_platform_driver(bcm2835_aux_clk_driver); + +MODULE_AUTHOR("Eric Anholt "); +MODULE_DESCRIPTION("BCM2835 auxiliary peripheral clock driver"); +MODULE_LICENSE("GPL v2"); diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig index e842e8613b144f..c9d1558eddcc68 100644 --- a/drivers/spi/Kconfig +++ b/drivers/spi/Kconfig @@ -90,7 +90,7 @@ config SPI_BCM2835 config SPI_BCM2835AUX tristate "BCM2835 SPI auxiliary controller" - depends on ARCH_BCM2835 || COMPILE_TEST + depends on ARCH_BCM2835 || ARCH_BCM2708 || ARCH_BCM2709 || COMPILE_TEST depends on GPIOLIB help This selects a driver for the Broadcom BCM2835 SPI aux master. diff --git a/include/dt-bindings/clock/bcm2835-aux.h b/include/dt-bindings/clock/bcm2835-aux.h new file mode 100644 index 00000000000000..d91156e2658dab --- /dev/null +++ b/include/dt-bindings/clock/bcm2835-aux.h @@ -0,0 +1,17 @@ +/* + * Copyright (C) 2015 Broadcom Corporation + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation version 2. + * + * This program is distributed "as is" WITHOUT ANY WARRANTY of any + * kind, whether express or implied; without even the implied warranty + * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#define BCM2835_AUX_CLOCK_UART 0 +#define BCM2835_AUX_CLOCK_SPI1 1 +#define BCM2835_AUX_CLOCK_SPI2 2 +#define BCM2835_AUX_CLOCK_COUNT 3