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Commit 3053b39

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sakumisusakumisu
committedJan 25, 2025
feat(cherryusb): add cherryusb device & host demo
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‎usb/CMakeLists.txt

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@@ -13,3 +13,15 @@ if (TARGET tinyusb_pico_pio_usb)
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else ()
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message("Skipping TinyUSB dual examples, as TinyUSB hw/mcu/raspberry_pi/Pico-PIO-USB submodule unavailable")
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endif ()
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if (TARGET cherryusb_device)
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add_subdirectory(cherryusb/device)
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else()
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message("Skipping CherryUSB device examples as CherryUSB is unavailable")
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endif()
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if (TARGET cherryusb_host)
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add_subdirectory(cherryusb/host)
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else()
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message("Skipping CherryUSB host examples as CherryUSB is unavailable")
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endif()

‎usb/cherryusb/device/CMakeLists.txt

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@@ -0,0 +1 @@
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add_subdirectory(dev_cdc_msc_hid)

‎usb/cherryusb/device/dev_cdc_msc_hid/CMakeLists.txt

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get_filename_component(project_name ${CMAKE_CURRENT_LIST_DIR} NAME)
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add_executable(${project_name}
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main.c
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)
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target_include_directories(${project_name} PUBLIC
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${CMAKE_CURRENT_LIST_DIR})
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# pull in common dependencies
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target_link_libraries(${project_name} PRIVATE pico_stdlib hardware_resets hardware_irq cherryusb_device)
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# create map/bin/hex file etc.
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pico_add_extra_outputs(${project_name})
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# add url via pico_set_program_url
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example_auto_set_url(${project_name})

‎usb/cherryusb/device/dev_cdc_msc_hid/main.c

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#include "pico/stdlib.h"
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#include "pico/time.h"
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#include "usbd_core.h"
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#include <stdio.h>
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#include <string.h>
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#include "cdc_acm_hid_msc_template.c"
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int main(void)
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{
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stdio_init_all();
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printf("CherryUSB device cdc msc example\n");
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extern void cdc_acm_hid_msc_descriptor_init(uint8_t busid, uintptr_t reg_base);
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cdc_acm_hid_msc_descriptor_init(0, 0); // regbase is not used
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// Everything is interrupt driven so just loop here
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while (1) {
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extern void cdc_acm_data_send_with_dtr_test(uint8_t busid);
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cdc_acm_data_send_with_dtr_test(0);
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extern void hid_mouse_test(uint8_t busid);
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hid_mouse_test(0);
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}
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return 0;
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}

‎usb/cherryusb/device/dev_cdc_msc_hid/usb_config.h

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/*
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* Copyright (c) 2022, sakumisu
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef CHERRYUSB_CONFIG_H
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#define CHERRYUSB_CONFIG_H
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/* ================ USB common Configuration ================ */
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#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__)
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#ifndef CONFIG_USB_DBG_LEVEL
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#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO
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#endif
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/* Enable print with color */
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#define CONFIG_USB_PRINTF_COLOR_ENABLE
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/* data align size when use dma or use dcache */
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#ifndef CONFIG_USB_ALIGN_SIZE
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#define CONFIG_USB_ALIGN_SIZE 4
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#endif
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//#define CONFIG_USB_DCACHE_ENABLE
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/* attribute data into no cache ram */
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#define USB_NOCACHE_RAM_SECTION
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/* ================= USB Device Stack Configuration ================ */
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/* Ep0 in and out transfer buffer */
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#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN
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#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512
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#endif
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/* Setup packet log for debug */
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// #define CONFIG_USBDEV_SETUP_LOG_PRINT
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/* Send ep0 in data from user buffer instead of copying into ep0 reqdata
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* Please note that user buffer must be aligned with CONFIG_USB_ALIGN_SIZE
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*/
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// #define CONFIG_USBDEV_EP0_INDATA_NO_COPY
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/* Check if the input descriptor is correct */
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// #define CONFIG_USBDEV_DESC_CHECK
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/* Enable test mode */
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// #define CONFIG_USBDEV_TEST_MODE
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#ifndef CONFIG_USBDEV_MSC_MAX_LUN
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#define CONFIG_USBDEV_MSC_MAX_LUN 1
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#endif
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#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE
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#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 512
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#endif
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#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING
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#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING ""
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#endif
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#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING
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#define CONFIG_USBDEV_MSC_PRODUCT_STRING ""
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#endif
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#ifndef CONFIG_USBDEV_MSC_VERSION_STRING
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#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01"
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#endif
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/* move msc read & write from isr to while(1), you should call usbd_msc_polling in while(1) */
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// #define CONFIG_USBDEV_MSC_POLLING
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/* move msc read & write from isr to thread */
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// #define CONFIG_USBDEV_MSC_THREAD
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#ifndef CONFIG_USBDEV_MSC_PRIO
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#define CONFIG_USBDEV_MSC_PRIO 4
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#endif
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#ifndef CONFIG_USBDEV_MSC_STACKSIZE
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#define CONFIG_USBDEV_MSC_STACKSIZE 2048
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE
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#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156
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#endif
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/* rndis transfer buffer size, must be a multiple of (1536 + 44)*/
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#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE
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#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 1580
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID
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#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff
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#endif
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#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC
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#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB"
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#endif
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#define CONFIG_USBDEV_RNDIS_USING_LWIP
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/* ================ USB HOST Stack Configuration ================== */
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#define CONFIG_USBHOST_MAX_RHPORTS 1
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#define CONFIG_USBHOST_MAX_EXTHUBS 1
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#define CONFIG_USBHOST_MAX_EHPORTS 4
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#define CONFIG_USBHOST_MAX_INTERFACES 8
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#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8
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#define CONFIG_USBHOST_MAX_ENDPOINTS 4
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#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4
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#define CONFIG_USBHOST_MAX_HID_CLASS 4
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#define CONFIG_USBHOST_MAX_MSC_CLASS 2
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#define CONFIG_USBHOST_MAX_AUDIO_CLASS 1
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#define CONFIG_USBHOST_MAX_VIDEO_CLASS 1
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#define CONFIG_USBHOST_DEV_NAMELEN 16
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#ifndef CONFIG_USBHOST_PSC_PRIO
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#define CONFIG_USBHOST_PSC_PRIO 0
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#endif
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#ifndef CONFIG_USBHOST_PSC_STACKSIZE
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#define CONFIG_USBHOST_PSC_STACKSIZE 2048
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#endif
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//#define CONFIG_USBHOST_GET_STRING_DESC
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// #define CONFIG_USBHOST_MSOS_ENABLE
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#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE
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#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00
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#endif
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/* Ep0 max transfer buffer */
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#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN
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#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512
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#endif
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#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT
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#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500
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#endif
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#ifndef CONFIG_USBHOST_MSC_TIMEOUT
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#define CONFIG_USBHOST_MSC_TIMEOUT 5000
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#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
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* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
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*/
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#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE
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#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048)
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#endif
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/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
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#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE
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#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048)
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#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
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* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
162+
*/
163+
#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE
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#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048)
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#endif
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/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
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#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE
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#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048)
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#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
172+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
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*/
174+
#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE
175+
#define CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE (2048)
176+
#endif
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/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
178+
#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE
179+
#define CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE (2048)
180+
#endif
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/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
183+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
184+
*/
185+
#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE
186+
#define CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE (2048)
187+
#endif
188+
/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
189+
#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE
190+
#define CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE (2048)
191+
#endif
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#define CONFIG_USBHOST_BLUETOOTH_HCI_H4
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// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG
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#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE
197+
#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048
198+
#endif
199+
#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE
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#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048
201+
#endif
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/* ================ USB Device Port Configuration ================*/
204+
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#ifndef CONFIG_USBDEV_MAX_BUS
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#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip
207+
#endif
208+
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#ifndef CONFIG_USBDEV_EP_NUM
210+
#define CONFIG_USBDEV_EP_NUM 16
211+
#endif
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/* When your chip hardware supports high-speed and wants to initialize it in high-speed mode, the relevant IP will configure the internal or external high-speed PHY according to CONFIG_USB_HS. */
214+
// #define CONFIG_USB_HS
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/* ---------------- FSDEV Configuration ---------------- */
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//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference
218+
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/* ---------------- DWC2 Configuration ---------------- */
220+
/* (5 * number of control endpoints + 8) + ((largest USB packet used / 4) + 1 for
221+
* status information) + (2 * number of OUT endpoints) + 1 for Global NAK
222+
*/
223+
// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4)
224+
/* IN Endpoints Max packet Size / 4 */
225+
// #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4)
226+
// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (1024 / 4)
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// #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4)
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// #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4)
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// #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4)
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// #define CONFIG_USB_DWC2_DMA_ENABLE
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/* ---------------- MUSB Configuration ---------------- */
238+
// #define CONFIG_USB_MUSB_SUNXI
239+
240+
/* ================ USB Host Port Configuration ==================*/
241+
#ifndef CONFIG_USBHOST_MAX_BUS
242+
#define CONFIG_USBHOST_MAX_BUS 1
243+
#endif
244+
245+
#ifndef CONFIG_USBHOST_PIPE_NUM
246+
#define CONFIG_USBHOST_PIPE_NUM 15
247+
#endif
248+
249+
/* ---------------- EHCI Configuration ---------------- */
250+
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#define CONFIG_USB_EHCI_HCCR_OFFSET (0x0)
252+
#define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024
253+
#define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM
254+
#define CONFIG_USB_EHCI_QTD_NUM 3
255+
#define CONFIG_USB_EHCI_ITD_NUM 20
256+
// #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE
257+
// #define CONFIG_USB_EHCI_CONFIGFLAG
258+
// #define CONFIG_USB_EHCI_ISO
259+
// #define CONFIG_USB_EHCI_WITH_OHCI
260+
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/* ---------------- OHCI Configuration ---------------- */
262+
#define CONFIG_USB_OHCI_HCOR_OFFSET (0x0)
263+
264+
/* ---------------- XHCI Configuration ---------------- */
265+
#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0)
266+
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/* ---------------- DWC2 Configuration ---------------- */
268+
/* largest non-periodic USB packet used / 4 */
269+
// #define CONFIG_USB_DWC2_NPTX_FIFO_SIZE (512 / 4)
270+
/* largest periodic USB packet used / 4 */
271+
// #define CONFIG_USB_DWC2_PTX_FIFO_SIZE (1024 / 4)
272+
/*
273+
* (largest USB packet used / 4) + 1 for status information + 1 transfer complete +
274+
* 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario
275+
*/
276+
// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE))
277+
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/* ---------------- MUSB Configuration ---------------- */
279+
// #define CONFIG_USB_MUSB_SUNXI
280+
281+
/* ================ USB Dcache Configuration ==================*/
282+
283+
#ifdef CONFIG_USB_DCACHE_ENABLE
284+
/* style 1*/
285+
// void usb_dcache_clean(uintptr_t addr, uint32_t size);
286+
// void usb_dcache_invalidate(uintptr_t addr, uint32_t size);
287+
// void usb_dcache_flush(uintptr_t addr, uint32_t size);
288+
289+
/* style 2*/
290+
// #define usb_dcache_clean(addr, size)
291+
// #define usb_dcache_invalidate(addr, size)
292+
// #define usb_dcache_flush(addr, size)
293+
#endif
294+
295+
#endif

‎usb/cherryusb/host/CMakeLists.txt

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1+
if (NOT FREERTOS_KERNEL_PATH AND NOT DEFINED ENV{FREERTOS_KERNEL_PATH})
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message("Skipping FreeRTOS examples as FREERTOS_KERNEL_PATH not defined")
3+
return()
4+
endif()
5+
6+
include(FreeRTOS_Kernel_import.cmake)
7+
8+
add_subdirectory(host_cdc_msc_hid)

‎usb/cherryusb/host/FreeRTOS_Kernel_import.cmake

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# This is a copy of <FREERTOS_KERNEL_PATH>/portable/ThirdParty/GCC/RP2040/FREERTOS_KERNEL_import.cmake
2+
3+
# This can be dropped into an external project to help locate the FreeRTOS kernel
4+
# It should be include()ed prior to project(). Alternatively this file may
5+
# or the CMakeLists.txt in this directory may be included or added via add_subdirectory
6+
# respectively.
7+
8+
if (DEFINED ENV{FREERTOS_KERNEL_PATH} AND (NOT FREERTOS_KERNEL_PATH))
9+
set(FREERTOS_KERNEL_PATH $ENV{FREERTOS_KERNEL_PATH})
10+
message("Using FREERTOS_KERNEL_PATH from environment ('${FREERTOS_KERNEL_PATH}')")
11+
endif ()
12+
13+
# first pass we look in old tree; second pass we look in new tree
14+
foreach(SEARCH_PASS RANGE 0 1)
15+
if (SEARCH_PASS)
16+
# ports may be moving to submodule in the future
17+
set(FREERTOS_KERNEL_RP2040_RELATIVE_PATH "portable/ThirdParty/Community-Supported-Ports/GCC")
18+
set(FREERTOS_KERNEL_RP2040_BACK_PATH "../../../../..")
19+
else()
20+
set(FREERTOS_KERNEL_RP2040_RELATIVE_PATH "portable/ThirdParty/GCC")
21+
set(FREERTOS_KERNEL_RP2040_BACK_PATH "../../../..")
22+
endif()
23+
24+
if(PICO_PLATFORM STREQUAL "rp2040")
25+
set(FREERTOS_KERNEL_RP2040_RELATIVE_PATH "${FREERTOS_KERNEL_RP2040_RELATIVE_PATH}/RP2040")
26+
else()
27+
if (PICO_PLATFORM STREQUAL "rp2350-riscv")
28+
set(FREERTOS_KERNEL_RP2040_RELATIVE_PATH "${FREERTOS_KERNEL_RP2040_RELATIVE_PATH}/RP2350_RISC-V")
29+
else()
30+
set(FREERTOS_KERNEL_RP2040_RELATIVE_PATH "${FREERTOS_KERNEL_RP2040_RELATIVE_PATH}/RP2350_ARM_NTZ")
31+
endif()
32+
endif()
33+
34+
if (NOT FREERTOS_KERNEL_PATH)
35+
# check if we are inside the FreeRTOS kernel tree (i.e. this file has been included directly)
36+
get_filename_component(_ACTUAL_PATH ${CMAKE_CURRENT_LIST_DIR} REALPATH)
37+
get_filename_component(_POSSIBLE_PATH ${CMAKE_CURRENT_LIST_DIR}/${FREERTOS_KERNEL_RP2040_BACK_PATH}/${FREERTOS_KERNEL_RP2040_RELATIVE_PATH} REALPATH)
38+
if (_ACTUAL_PATH STREQUAL _POSSIBLE_PATH)
39+
get_filename_component(FREERTOS_KERNEL_PATH ${CMAKE_CURRENT_LIST_DIR}/${FREERTOS_KERNEL_RP2040_BACK_PATH} REALPATH)
40+
endif()
41+
if (_ACTUAL_PATH STREQUAL _POSSIBLE_PATH)
42+
get_filename_component(FREERTOS_KERNEL_PATH ${CMAKE_CURRENT_LIST_DIR}/${FREERTOS_KERNEL_RP2040_BACK_PATH} REALPATH)
43+
message("Setting FREERTOS_KERNEL_PATH to ${FREERTOS_KERNEL_PATH} based on location of FreeRTOS-Kernel-import.cmake")
44+
break()
45+
elseif (PICO_SDK_PATH AND EXISTS "${PICO_SDK_PATH}/../FreeRTOS-Kernel")
46+
set(FREERTOS_KERNEL_PATH ${PICO_SDK_PATH}/../FreeRTOS-Kernel)
47+
message("Defaulting FREERTOS_KERNEL_PATH as sibling of PICO_SDK_PATH: ${FREERTOS_KERNEL_PATH}")
48+
break()
49+
endif()
50+
endif ()
51+
52+
if (NOT FREERTOS_KERNEL_PATH)
53+
foreach(POSSIBLE_SUFFIX Source FreeRTOS-Kernel FreeRTOS/Source)
54+
# check if FreeRTOS-Kernel exists under directory that included us
55+
set(SEARCH_ROOT ${CMAKE_CURRENT_SOURCE_DIR})
56+
get_filename_component(_POSSIBLE_PATH ${SEARCH_ROOT}/${POSSIBLE_SUFFIX} REALPATH)
57+
if (EXISTS ${_POSSIBLE_PATH}/${FREERTOS_KERNEL_RP2040_RELATIVE_PATH}/CMakeLists.txt)
58+
get_filename_component(FREERTOS_KERNEL_PATH ${_POSSIBLE_PATH} REALPATH)
59+
message("Setting FREERTOS_KERNEL_PATH to '${FREERTOS_KERNEL_PATH}' found relative to enclosing project")
60+
break()
61+
endif()
62+
endforeach()
63+
if (FREERTOS_KERNEL_PATH)
64+
break()
65+
endif()
66+
endif()
67+
68+
# user must have specified
69+
if (FREERTOS_KERNEL_PATH)
70+
if (EXISTS "${FREERTOS_KERNEL_PATH}/${FREERTOS_KERNEL_RP2040_RELATIVE_PATH}")
71+
break()
72+
endif()
73+
endif()
74+
endforeach ()
75+
76+
if (NOT FREERTOS_KERNEL_PATH)
77+
message(FATAL_ERROR "FreeRTOS location was not specified. Please set FREERTOS_KERNEL_PATH.")
78+
endif()
79+
80+
set(FREERTOS_KERNEL_PATH "${FREERTOS_KERNEL_PATH}" CACHE PATH "Path to the FreeRTOS Kernel")
81+
82+
get_filename_component(FREERTOS_KERNEL_PATH "${FREERTOS_KERNEL_PATH}" REALPATH BASE_DIR "${CMAKE_BINARY_DIR}")
83+
if (NOT EXISTS ${FREERTOS_KERNEL_PATH})
84+
message(FATAL_ERROR "Directory '${FREERTOS_KERNEL_PATH}' not found")
85+
endif()
86+
if (NOT EXISTS ${FREERTOS_KERNEL_PATH}/${FREERTOS_KERNEL_RP2040_RELATIVE_PATH}/CMakeLists.txt)
87+
message(FATAL_ERROR "Directory '${FREERTOS_KERNEL_PATH}' does not contain a '${PICO_PLATFORM}' port here: ${FREERTOS_KERNEL_RP2040_RELATIVE_PATH}")
88+
endif()
89+
set(FREERTOS_KERNEL_PATH ${FREERTOS_KERNEL_PATH} CACHE PATH "Path to the FreeRTOS_KERNEL" FORCE)
90+
91+
add_subdirectory(${FREERTOS_KERNEL_PATH}/${FREERTOS_KERNEL_RP2040_RELATIVE_PATH} FREERTOS_KERNEL)

‎usb/cherryusb/host/host_cdc_msc_hid/CMakeLists.txt

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@@ -0,0 +1,23 @@
1+
get_filename_component(project_name ${CMAKE_CURRENT_LIST_DIR} NAME)
2+
3+
add_executable(${project_name}
4+
main.c
5+
)
6+
7+
target_compile_definitions(${project_name} PUBLIC -DxPortIsInsideInterrupt=portCHECK_IF_IN_ISR)
8+
target_include_directories(${project_name} PUBLIC
9+
${CMAKE_CURRENT_LIST_DIR})
10+
11+
# pull in common dependencies
12+
target_link_libraries(${project_name} PRIVATE
13+
pico_stdlib
14+
hardware_resets
15+
hardware_irq
16+
cherryusb_host
17+
pico_async_context_freertos
18+
FreeRTOS-Kernel-Heap4)
19+
# create map/bin/hex file etc.
20+
pico_add_extra_outputs(${project_name})
21+
22+
# add url via pico_set_program_url
23+
example_auto_set_url(${project_name})

‎usb/cherryusb/host/host_cdc_msc_hid/FreeRTOSConfig.h

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1+
#ifndef FREERTOS_CONFIG_H
2+
#define FREERTOS_CONFIG_H
3+
4+
// This example uses a common include to avoid repetition
5+
#include "FreeRTOSConfig_examples_common.h"
6+
7+
#endif

‎usb/cherryusb/host/host_cdc_msc_hid/FreeRTOSConfig_examples_common.h

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1+
/*
2+
* FreeRTOS V202111.00
3+
* Copyright (C) 2020 Amazon.com, Inc. or its affiliates. All Rights Reserved.
4+
*
5+
* Permission is hereby granted, free of charge, to any person obtaining a copy of
6+
* this software and associated documentation files (the "Software"), to deal in
7+
* the Software without restriction, including without limitation the rights to
8+
* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
9+
* the Software, and to permit persons to whom the Software is furnished to do so,
10+
* subject to the following conditions:
11+
*
12+
* The above copyright notice and this permission notice shall be included in all
13+
* copies or substantial portions of the Software.
14+
*
15+
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
16+
* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
17+
* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
18+
* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
19+
* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
20+
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
21+
*
22+
* http://www.FreeRTOS.org
23+
* http://aws.amazon.com/freertos
24+
*
25+
* 1 tab == 4 spaces!
26+
*/
27+
28+
#ifndef FREERTOS_CONFIG_EXAMPLES_COMMON_H
29+
#define FREERTOS_CONFIG_EXAMPLES_COMMON_H
30+
31+
/*-----------------------------------------------------------
32+
* Application specific definitions.
33+
*
34+
* These definitions should be adjusted for your particular hardware and
35+
* application requirements.
36+
*
37+
* THESE PARAMETERS ARE DESCRIBED WITHIN THE 'CONFIGURATION' SECTION OF THE
38+
* FreeRTOS API DOCUMENTATION AVAILABLE ON THE FreeRTOS.org WEB SITE.
39+
*
40+
* See http://www.freertos.org/a00110.html
41+
*----------------------------------------------------------*/
42+
43+
/* Scheduler Related */
44+
#define configUSE_PREEMPTION 1
45+
#define configUSE_TICKLESS_IDLE 0
46+
#define configUSE_IDLE_HOOK 0
47+
#define configUSE_TICK_HOOK 0
48+
#define configTICK_RATE_HZ ( ( TickType_t ) 1000 )
49+
#define configMAX_PRIORITIES 32
50+
#define configMINIMAL_STACK_SIZE ( configSTACK_DEPTH_TYPE ) 512
51+
#define configUSE_16_BIT_TICKS 0
52+
53+
#define configIDLE_SHOULD_YIELD 1
54+
55+
/* Synchronization Related */
56+
#define configUSE_MUTEXES 1
57+
#define configUSE_RECURSIVE_MUTEXES 1
58+
#define configUSE_APPLICATION_TASK_TAG 0
59+
#define configUSE_COUNTING_SEMAPHORES 1
60+
#define configQUEUE_REGISTRY_SIZE 8
61+
#define configUSE_QUEUE_SETS 1
62+
#define configUSE_TIME_SLICING 1
63+
#define configUSE_NEWLIB_REENTRANT 0
64+
// todo need this for lwip FreeRTOS sys_arch to compile
65+
#define configENABLE_BACKWARD_COMPATIBILITY 1
66+
#define configNUM_THREAD_LOCAL_STORAGE_POINTERS 5
67+
68+
/* System */
69+
#define configSTACK_DEPTH_TYPE uint32_t
70+
#define configMESSAGE_BUFFER_LENGTH_TYPE size_t
71+
72+
/* Memory allocation related definitions. */
73+
#define configSUPPORT_STATIC_ALLOCATION 0
74+
#define configSUPPORT_DYNAMIC_ALLOCATION 1
75+
#define configTOTAL_HEAP_SIZE (128*1024)
76+
#define configAPPLICATION_ALLOCATED_HEAP 0
77+
78+
/* Hook function related definitions. */
79+
#define configCHECK_FOR_STACK_OVERFLOW 0
80+
#define configUSE_MALLOC_FAILED_HOOK 0
81+
#define configUSE_DAEMON_TASK_STARTUP_HOOK 0
82+
83+
/* Run time and task stats gathering related definitions. */
84+
#define configGENERATE_RUN_TIME_STATS 0
85+
#define configUSE_TRACE_FACILITY 1
86+
#define configUSE_STATS_FORMATTING_FUNCTIONS 0
87+
88+
/* Co-routine related definitions. */
89+
#define configUSE_CO_ROUTINES 0
90+
#define configMAX_CO_ROUTINE_PRIORITIES 1
91+
92+
/* Software timer related definitions. */
93+
#define configUSE_TIMERS 1
94+
#define configTIMER_TASK_PRIORITY ( configMAX_PRIORITIES - 1 )
95+
#define configTIMER_QUEUE_LENGTH 10
96+
#define configTIMER_TASK_STACK_DEPTH 1024
97+
98+
/* Interrupt nesting behaviour configuration. */
99+
/*
100+
#define configKERNEL_INTERRUPT_PRIORITY [dependent of processor]
101+
#define configMAX_SYSCALL_INTERRUPT_PRIORITY [dependent on processor and application]
102+
#define configMAX_API_CALL_INTERRUPT_PRIORITY [dependent on processor and application]
103+
*/
104+
105+
#if FREE_RTOS_KERNEL_SMP // set by the RP2xxx SMP port of FreeRTOS
106+
/* SMP port only */
107+
#ifndef configNUMBER_OF_CORES
108+
#define configNUMBER_OF_CORES 2
109+
#endif
110+
#define configNUM_CORES configNUMBER_OF_CORES
111+
#define configTICK_CORE 0
112+
#define configRUN_MULTIPLE_PRIORITIES 1
113+
#if configNUMBER_OF_CORES > 1
114+
#define configUSE_CORE_AFFINITY 1
115+
#endif
116+
#define configUSE_PASSIVE_IDLE_HOOK 0
117+
#endif
118+
119+
/* RP2040 specific */
120+
#define configSUPPORT_PICO_SYNC_INTEROP 1
121+
#define configSUPPORT_PICO_TIME_INTEROP 1
122+
123+
#include <assert.h>
124+
/* Define to trap errors during development. */
125+
#define configASSERT(x) assert(x)
126+
127+
/* Set the following definitions to 1 to include the API function, or zero
128+
to exclude the API function. */
129+
#define INCLUDE_vTaskPrioritySet 1
130+
#define INCLUDE_uxTaskPriorityGet 1
131+
#define INCLUDE_vTaskDelete 1
132+
#define INCLUDE_vTaskSuspend 1
133+
#define INCLUDE_vTaskDelayUntil 1
134+
#define INCLUDE_vTaskDelay 1
135+
#define INCLUDE_xTaskGetSchedulerState 1
136+
#define INCLUDE_xTaskGetCurrentTaskHandle 1
137+
#define INCLUDE_uxTaskGetStackHighWaterMark 1
138+
#define INCLUDE_xTaskGetIdleTaskHandle 1
139+
#define INCLUDE_eTaskGetState 1
140+
#define INCLUDE_xTimerPendFunctionCall 1
141+
#define INCLUDE_xTaskAbortDelay 1
142+
#define INCLUDE_xTaskGetHandle 1
143+
#define INCLUDE_xTaskResumeFromISR 1
144+
#define INCLUDE_xQueueGetMutexHolder 1
145+
146+
#if PICO_RP2350
147+
#define configENABLE_MPU 0
148+
#define configENABLE_TRUSTZONE 0
149+
#define configRUN_FREERTOS_SECURE_ONLY 1
150+
#define configENABLE_FPU 1
151+
#define configMAX_SYSCALL_INTERRUPT_PRIORITY 16
152+
#endif
153+
154+
/* A header file that defines trace macro can be included here. */
155+
156+
#endif /* FREERTOS_CONFIG_H */
157+

‎usb/cherryusb/host/host_cdc_msc_hid/main.c

Lines changed: 23 additions & 0 deletions
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1+
#include "pico/stdlib.h"
2+
#include "pico/time.h"
3+
#include "usbh_core.h"
4+
#include <stdio.h>
5+
#include <string.h>
6+
#include "FreeRTOS.h"
7+
#include "task.h"
8+
9+
#include "usb_host.c"
10+
11+
int main(void)
12+
{
13+
stdio_init_all();
14+
printf("CherryUSB host cdc msc example\n");
15+
16+
usbh_initialize(0, 0); // regbase is not used
17+
18+
vTaskStartScheduler();
19+
// Everything is interrupt driven so just loop here
20+
while (1) {
21+
}
22+
return 0;
23+
}

‎usb/cherryusb/host/host_cdc_msc_hid/usb_config.h

Lines changed: 295 additions & 0 deletions
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1+
/*
2+
* Copyright (c) 2022, sakumisu
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
#ifndef CHERRYUSB_CONFIG_H
7+
#define CHERRYUSB_CONFIG_H
8+
9+
/* ================ USB common Configuration ================ */
10+
11+
#define CONFIG_USB_PRINTF(...) printf(__VA_ARGS__)
12+
13+
#ifndef CONFIG_USB_DBG_LEVEL
14+
#define CONFIG_USB_DBG_LEVEL USB_DBG_INFO
15+
#endif
16+
17+
/* Enable print with color */
18+
#define CONFIG_USB_PRINTF_COLOR_ENABLE
19+
20+
/* data align size when use dma or use dcache */
21+
#ifndef CONFIG_USB_ALIGN_SIZE
22+
#define CONFIG_USB_ALIGN_SIZE 4
23+
#endif
24+
25+
//#define CONFIG_USB_DCACHE_ENABLE
26+
27+
/* attribute data into no cache ram */
28+
#define USB_NOCACHE_RAM_SECTION
29+
30+
/* ================= USB Device Stack Configuration ================ */
31+
32+
/* Ep0 in and out transfer buffer */
33+
#ifndef CONFIG_USBDEV_REQUEST_BUFFER_LEN
34+
#define CONFIG_USBDEV_REQUEST_BUFFER_LEN 512
35+
#endif
36+
37+
/* Setup packet log for debug */
38+
// #define CONFIG_USBDEV_SETUP_LOG_PRINT
39+
40+
/* Send ep0 in data from user buffer instead of copying into ep0 reqdata
41+
* Please note that user buffer must be aligned with CONFIG_USB_ALIGN_SIZE
42+
*/
43+
// #define CONFIG_USBDEV_EP0_INDATA_NO_COPY
44+
45+
/* Check if the input descriptor is correct */
46+
// #define CONFIG_USBDEV_DESC_CHECK
47+
48+
/* Enable test mode */
49+
// #define CONFIG_USBDEV_TEST_MODE
50+
51+
#ifndef CONFIG_USBDEV_MSC_MAX_LUN
52+
#define CONFIG_USBDEV_MSC_MAX_LUN 1
53+
#endif
54+
55+
#ifndef CONFIG_USBDEV_MSC_MAX_BUFSIZE
56+
#define CONFIG_USBDEV_MSC_MAX_BUFSIZE 512
57+
#endif
58+
59+
#ifndef CONFIG_USBDEV_MSC_MANUFACTURER_STRING
60+
#define CONFIG_USBDEV_MSC_MANUFACTURER_STRING ""
61+
#endif
62+
63+
#ifndef CONFIG_USBDEV_MSC_PRODUCT_STRING
64+
#define CONFIG_USBDEV_MSC_PRODUCT_STRING ""
65+
#endif
66+
67+
#ifndef CONFIG_USBDEV_MSC_VERSION_STRING
68+
#define CONFIG_USBDEV_MSC_VERSION_STRING "0.01"
69+
#endif
70+
71+
/* move msc read & write from isr to while(1), you should call usbd_msc_polling in while(1) */
72+
// #define CONFIG_USBDEV_MSC_POLLING
73+
74+
/* move msc read & write from isr to thread */
75+
// #define CONFIG_USBDEV_MSC_THREAD
76+
77+
#ifndef CONFIG_USBDEV_MSC_PRIO
78+
#define CONFIG_USBDEV_MSC_PRIO 4
79+
#endif
80+
81+
#ifndef CONFIG_USBDEV_MSC_STACKSIZE
82+
#define CONFIG_USBDEV_MSC_STACKSIZE 2048
83+
#endif
84+
85+
#ifndef CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE
86+
#define CONFIG_USBDEV_RNDIS_RESP_BUFFER_SIZE 156
87+
#endif
88+
89+
/* rndis transfer buffer size, must be a multiple of (1536 + 44)*/
90+
#ifndef CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE
91+
#define CONFIG_USBDEV_RNDIS_ETH_MAX_FRAME_SIZE 1580
92+
#endif
93+
94+
#ifndef CONFIG_USBDEV_RNDIS_VENDOR_ID
95+
#define CONFIG_USBDEV_RNDIS_VENDOR_ID 0x0000ffff
96+
#endif
97+
98+
#ifndef CONFIG_USBDEV_RNDIS_VENDOR_DESC
99+
#define CONFIG_USBDEV_RNDIS_VENDOR_DESC "CherryUSB"
100+
#endif
101+
102+
#define CONFIG_USBDEV_RNDIS_USING_LWIP
103+
104+
/* ================ USB HOST Stack Configuration ================== */
105+
106+
#define CONFIG_USBHOST_MAX_RHPORTS 1
107+
#define CONFIG_USBHOST_MAX_EXTHUBS 1
108+
#define CONFIG_USBHOST_MAX_EHPORTS 4
109+
#define CONFIG_USBHOST_MAX_INTERFACES 8
110+
#define CONFIG_USBHOST_MAX_INTF_ALTSETTINGS 8
111+
#define CONFIG_USBHOST_MAX_ENDPOINTS 4
112+
113+
#define CONFIG_USBHOST_MAX_CDC_ACM_CLASS 4
114+
#define CONFIG_USBHOST_MAX_HID_CLASS 4
115+
#define CONFIG_USBHOST_MAX_MSC_CLASS 2
116+
#define CONFIG_USBHOST_MAX_AUDIO_CLASS 1
117+
#define CONFIG_USBHOST_MAX_VIDEO_CLASS 1
118+
119+
#define CONFIG_USBHOST_DEV_NAMELEN 16
120+
121+
#ifndef CONFIG_USBHOST_PSC_PRIO
122+
#define CONFIG_USBHOST_PSC_PRIO 0
123+
#endif
124+
#ifndef CONFIG_USBHOST_PSC_STACKSIZE
125+
#define CONFIG_USBHOST_PSC_STACKSIZE 2048
126+
#endif
127+
128+
//#define CONFIG_USBHOST_GET_STRING_DESC
129+
130+
// #define CONFIG_USBHOST_MSOS_ENABLE
131+
#ifndef CONFIG_USBHOST_MSOS_VENDOR_CODE
132+
#define CONFIG_USBHOST_MSOS_VENDOR_CODE 0x00
133+
#endif
134+
135+
/* Ep0 max transfer buffer */
136+
#ifndef CONFIG_USBHOST_REQUEST_BUFFER_LEN
137+
#define CONFIG_USBHOST_REQUEST_BUFFER_LEN 512
138+
#endif
139+
140+
#ifndef CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT
141+
#define CONFIG_USBHOST_CONTROL_TRANSFER_TIMEOUT 500
142+
#endif
143+
144+
#ifndef CONFIG_USBHOST_MSC_TIMEOUT
145+
#define CONFIG_USBHOST_MSC_TIMEOUT 5000
146+
#endif
147+
148+
/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
149+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
150+
*/
151+
#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE
152+
#define CONFIG_USBHOST_RNDIS_ETH_MAX_RX_SIZE (2048)
153+
#endif
154+
155+
/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
156+
#ifndef CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE
157+
#define CONFIG_USBHOST_RNDIS_ETH_MAX_TX_SIZE (2048)
158+
#endif
159+
160+
/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
161+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
162+
*/
163+
#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE
164+
#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_RX_SIZE (2048)
165+
#endif
166+
/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
167+
#ifndef CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE
168+
#define CONFIG_USBHOST_CDC_NCM_ETH_MAX_TX_SIZE (2048)
169+
#endif
170+
171+
/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
172+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
173+
*/
174+
#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE
175+
#define CONFIG_USBHOST_ASIX_ETH_MAX_RX_SIZE (2048)
176+
#endif
177+
/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
178+
#ifndef CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE
179+
#define CONFIG_USBHOST_ASIX_ETH_MAX_TX_SIZE (2048)
180+
#endif
181+
182+
/* This parameter affects usb performance, and depends on (TCP_WND)tcp eceive windows size,
183+
* you can change to 2K ~ 16K and must be larger than TCP RX windows size in order to avoid being overflow.
184+
*/
185+
#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE
186+
#define CONFIG_USBHOST_RTL8152_ETH_MAX_RX_SIZE (2048)
187+
#endif
188+
/* Because lwip do not support multi pbuf at a time, so increasing this variable has no performance improvement */
189+
#ifndef CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE
190+
#define CONFIG_USBHOST_RTL8152_ETH_MAX_TX_SIZE (2048)
191+
#endif
192+
193+
#define CONFIG_USBHOST_BLUETOOTH_HCI_H4
194+
// #define CONFIG_USBHOST_BLUETOOTH_HCI_LOG
195+
196+
#ifndef CONFIG_USBHOST_BLUETOOTH_TX_SIZE
197+
#define CONFIG_USBHOST_BLUETOOTH_TX_SIZE 2048
198+
#endif
199+
#ifndef CONFIG_USBHOST_BLUETOOTH_RX_SIZE
200+
#define CONFIG_USBHOST_BLUETOOTH_RX_SIZE 2048
201+
#endif
202+
203+
/* ================ USB Device Port Configuration ================*/
204+
205+
#ifndef CONFIG_USBDEV_MAX_BUS
206+
#define CONFIG_USBDEV_MAX_BUS 1 // for now, bus num must be 1 except hpm ip
207+
#endif
208+
209+
#ifndef CONFIG_USBDEV_EP_NUM
210+
#define CONFIG_USBDEV_EP_NUM 16
211+
#endif
212+
213+
/* When your chip hardware supports high-speed and wants to initialize it in high-speed mode, the relevant IP will configure the internal or external high-speed PHY according to CONFIG_USB_HS. */
214+
// #define CONFIG_USB_HS
215+
216+
/* ---------------- FSDEV Configuration ---------------- */
217+
//#define CONFIG_USBDEV_FSDEV_PMA_ACCESS 2 // maybe 1 or 2, many chips may have a difference
218+
219+
/* ---------------- DWC2 Configuration ---------------- */
220+
/* (5 * number of control endpoints + 8) + ((largest USB packet used / 4) + 1 for
221+
* status information) + (2 * number of OUT endpoints) + 1 for Global NAK
222+
*/
223+
// #define CONFIG_USB_DWC2_RXALL_FIFO_SIZE (1024 / 4)
224+
/* IN Endpoints Max packet Size / 4 */
225+
// #define CONFIG_USB_DWC2_TX0_FIFO_SIZE (64 / 4)
226+
// #define CONFIG_USB_DWC2_TX1_FIFO_SIZE (1024 / 4)
227+
// #define CONFIG_USB_DWC2_TX2_FIFO_SIZE (64 / 4)
228+
// #define CONFIG_USB_DWC2_TX3_FIFO_SIZE (64 / 4)
229+
// #define CONFIG_USB_DWC2_TX4_FIFO_SIZE (0 / 4)
230+
// #define CONFIG_USB_DWC2_TX5_FIFO_SIZE (0 / 4)
231+
// #define CONFIG_USB_DWC2_TX6_FIFO_SIZE (0 / 4)
232+
// #define CONFIG_USB_DWC2_TX7_FIFO_SIZE (0 / 4)
233+
// #define CONFIG_USB_DWC2_TX8_FIFO_SIZE (0 / 4)
234+
235+
// #define CONFIG_USB_DWC2_DMA_ENABLE
236+
237+
/* ---------------- MUSB Configuration ---------------- */
238+
// #define CONFIG_USB_MUSB_SUNXI
239+
240+
/* ================ USB Host Port Configuration ==================*/
241+
#ifndef CONFIG_USBHOST_MAX_BUS
242+
#define CONFIG_USBHOST_MAX_BUS 1
243+
#endif
244+
245+
#ifndef CONFIG_USBHOST_PIPE_NUM
246+
#define CONFIG_USBHOST_PIPE_NUM 15
247+
#endif
248+
249+
/* ---------------- EHCI Configuration ---------------- */
250+
251+
#define CONFIG_USB_EHCI_HCCR_OFFSET (0x0)
252+
#define CONFIG_USB_EHCI_FRAME_LIST_SIZE 1024
253+
#define CONFIG_USB_EHCI_QH_NUM CONFIG_USBHOST_PIPE_NUM
254+
#define CONFIG_USB_EHCI_QTD_NUM 3
255+
#define CONFIG_USB_EHCI_ITD_NUM 20
256+
// #define CONFIG_USB_EHCI_HCOR_RESERVED_DISABLE
257+
// #define CONFIG_USB_EHCI_CONFIGFLAG
258+
// #define CONFIG_USB_EHCI_ISO
259+
// #define CONFIG_USB_EHCI_WITH_OHCI
260+
261+
/* ---------------- OHCI Configuration ---------------- */
262+
#define CONFIG_USB_OHCI_HCOR_OFFSET (0x0)
263+
264+
/* ---------------- XHCI Configuration ---------------- */
265+
#define CONFIG_USB_XHCI_HCCR_OFFSET (0x0)
266+
267+
/* ---------------- DWC2 Configuration ---------------- */
268+
/* largest non-periodic USB packet used / 4 */
269+
// #define CONFIG_USB_DWC2_NPTX_FIFO_SIZE (512 / 4)
270+
/* largest periodic USB packet used / 4 */
271+
// #define CONFIG_USB_DWC2_PTX_FIFO_SIZE (1024 / 4)
272+
/*
273+
* (largest USB packet used / 4) + 1 for status information + 1 transfer complete +
274+
* 1 location each for Bulk/Control endpoint for handling NAK/NYET scenario
275+
*/
276+
// #define CONFIG_USB_DWC2_RX_FIFO_SIZE ((1012 - CONFIG_USB_DWC2_NPTX_FIFO_SIZE - CONFIG_USB_DWC2_PTX_FIFO_SIZE))
277+
278+
/* ---------------- MUSB Configuration ---------------- */
279+
// #define CONFIG_USB_MUSB_SUNXI
280+
281+
/* ================ USB Dcache Configuration ==================*/
282+
283+
#ifdef CONFIG_USB_DCACHE_ENABLE
284+
/* style 1*/
285+
// void usb_dcache_clean(uintptr_t addr, uint32_t size);
286+
// void usb_dcache_invalidate(uintptr_t addr, uint32_t size);
287+
// void usb_dcache_flush(uintptr_t addr, uint32_t size);
288+
289+
/* style 2*/
290+
// #define usb_dcache_clean(addr, size)
291+
// #define usb_dcache_invalidate(addr, size)
292+
// #define usb_dcache_flush(addr, size)
293+
#endif
294+
295+
#endif

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