diff --git a/.travis.yml b/.travis.yml index f28520bf..e53d7a69 100644 --- a/.travis.yml +++ b/.travis.yml @@ -22,6 +22,10 @@ matrix: rust: stable if: (branch = staging OR branch = trying) OR (type = pull_request AND branch = master) + - env: TARGET=thumbv8m.main-none-eabi + rust: stable + if: (branch = staging OR branch = trying) OR (type = pull_request AND branch = master) + - env: TARGET=x86_64-unknown-linux-gnu rust: nightly if: (branch = staging OR branch = trying) OR (type = pull_request AND branch = master) @@ -42,6 +46,10 @@ matrix: rust: nightly if: (branch = staging OR branch = trying) OR (type = pull_request AND branch = master) + - env: TARGET=thumbv8m.main-none-eabi + rust: nightly + if: (branch = staging OR branch = trying) OR (type = pull_request AND branch = master) + before_install: set -e install: diff --git a/Cargo.toml b/Cargo.toml index 949bdadc..29310d7c 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -19,10 +19,21 @@ autoexamples = true r0 = "0.2.2" cortex-m-rt-macros = { path = "macros", version = "0.1.5" } +[target.thumbv7em-none-eabihf.dev-dependencies] +cortex-m-semihosting = "0.3.1" + +[target.thumbv7em-none-eabi.dev-dependencies] +cortex-m-semihosting = "0.3.1" + +[target.thumbv7m-none-eabi.dev-dependencies] +cortex-m-semihosting = "0.3.1" + +[target.thumbv6m-none-eabi.dev-dependencies] +cortex-m-semihosting = "0.3.1" + [dev-dependencies] -cortex-m = ">= 0.5.7, <0.7" +cortex-m = "0.6" panic-halt = "0.2.0" -cortex-m-semihosting = "0.3.1" [dev-dependencies.rand] default-features = false diff --git a/assemble.sh b/assemble.sh index 27c10de3..bd04c5bc 100755 --- a/assemble.sh +++ b/assemble.sh @@ -22,4 +22,7 @@ ar crs bin/thumbv7em-none-eabihf.a bin/$crate.o arm-none-eabi-as -march=armv8-m.base asm.s -o bin/$crate.o ar crs bin/thumbv8m.base-none-eabi.a bin/$crate.o +arm-none-eabi-as -march=armv8-m.main asm.s -o bin/$crate.o +ar crs bin/thumbv8m.main-none-eabi.a bin/$crate.o + rm bin/$crate.o diff --git a/bin/thumbv6m-none-eabi.a b/bin/thumbv6m-none-eabi.a index 6a6a5470..51c1dc01 100644 Binary files a/bin/thumbv6m-none-eabi.a and b/bin/thumbv6m-none-eabi.a differ diff --git a/bin/thumbv7em-none-eabi.a b/bin/thumbv7em-none-eabi.a index 51d9aef4..6daed97b 100644 Binary files a/bin/thumbv7em-none-eabi.a and b/bin/thumbv7em-none-eabi.a differ diff --git a/bin/thumbv7em-none-eabihf.a b/bin/thumbv7em-none-eabihf.a index 51d9aef4..6daed97b 100644 Binary files a/bin/thumbv7em-none-eabihf.a and b/bin/thumbv7em-none-eabihf.a differ diff --git a/bin/thumbv7m-none-eabi.a b/bin/thumbv7m-none-eabi.a index dc37fbf0..d6da5d8f 100644 Binary files a/bin/thumbv7m-none-eabi.a and b/bin/thumbv7m-none-eabi.a differ diff --git a/bin/thumbv8m.base-none-eabi.a b/bin/thumbv8m.base-none-eabi.a index dda8dcc7..e8fd3686 100644 Binary files a/bin/thumbv8m.base-none-eabi.a and b/bin/thumbv8m.base-none-eabi.a differ diff --git a/bin/thumbv8m.main-none-eabi.a b/bin/thumbv8m.main-none-eabi.a new file mode 100644 index 00000000..9335af08 Binary files /dev/null and b/bin/thumbv8m.main-none-eabi.a differ diff --git a/build.rs b/build.rs index a9781463..5a8fb9c5 100644 --- a/build.rs +++ b/build.rs @@ -8,7 +8,6 @@ fn main() { let out_dir = PathBuf::from(env::var("OUT_DIR").unwrap()); has_fpu(&target); - let is_armv6m = is_armv6m(&target); if target.starts_with("thumbv") { fs::copy( @@ -43,7 +42,23 @@ INCLUDE device.x"# f }; - let max_int_handlers = if is_armv6m { 32 } else { 240 }; + let max_int_handlers = if target.starts_with("thumbv6m-") { + println!("cargo:rustc-cfg=cortex_m"); + println!("cargo:rustc-cfg=armv6m"); + 32 + } else if target.starts_with("thumbv7m-") || target.starts_with("thumbv7em-") { + println!("cargo:rustc-cfg=cortex_m"); + println!("cargo:rustc-cfg=armv7m"); + 240 + } else if target.starts_with("thumbv8m") { + println!("cargo:rustc-cfg=cortex_m"); + println!("cargo:rustc-cfg=armv8m"); + 240 + } else { + // Non ARM target. We assume you're just testing the syntax. + // This value seems as soon as any + 240 + }; // checking the size of the interrupts portion of the vector table is sub-architecture dependent writeln!( @@ -58,6 +73,10 @@ handlers."); max_int_handlers ).unwrap(); + if target.ends_with("-eabihf") { + println!("cargo:rustc-cfg=has_fpu"); + } + println!("cargo:rustc-link-search={}", out.display()); println!("cargo:rerun-if-changed=build.rs"); @@ -69,12 +88,3 @@ fn has_fpu(target: &str) { println!("cargo:rustc-cfg=has_fpu"); } } - -fn is_armv6m(target: &str) -> bool { - if target.starts_with("thumbv6m-") { - println!("cargo:rustc-cfg=armv6m"); - true - } else { - false - } -} diff --git a/examples/qemu.rs b/examples/qemu.rs index e2cd895c..7553e70b 100644 --- a/examples/qemu.rs +++ b/examples/qemu.rs @@ -2,18 +2,22 @@ #![no_main] #![no_std] -extern crate cortex_m; +extern crate cortex_m; extern crate cortex_m_rt as rt; + +#[cfg(not(armv8m))] extern crate cortex_m_semihosting as semihosting; + extern crate panic_halt; -use core::fmt::Write; use cortex_m::asm; use rt::entry; +#[cfg(not(armv8m))] #[entry] fn main() -> ! { + use core::fmt::Write; let x = 42; loop { @@ -21,9 +25,16 @@ fn main() -> ! { // write something through semihosting interface let mut hstdout = semihosting::hio::hstdout().unwrap(); - write!(hstdout, "x = {}\n", x); - + write!(hstdout, "x = {}\n", x).unwrap(); // exit from qemu semihosting::debug::exit(semihosting::debug::EXIT_SUCCESS); } } + +#[cfg(armv8m)] +#[entry] +fn main() -> ! { + loop { + asm::nop(); + } +}