From 9450916f1c2bf5a1c703f23b153c7cdea84ef7a2 Mon Sep 17 00:00:00 2001 From: Vadim Kaushan Date: Wed, 15 Jul 2020 04:16:13 +0300 Subject: [PATCH 1/3] Preserve .eh_frame and .eh_frame_hdr --- link.x | 7 ++----- 1 file changed, 2 insertions(+), 5 deletions(-) diff --git a/link.x b/link.x index ae4e7a8..404cf2e 100644 --- a/link.x +++ b/link.x @@ -97,11 +97,8 @@ SECTIONS KEEP(*(.got .got.*)); } - /* Discard .eh_frame, we are not doing unwind on panic so it is not needed */ - /DISCARD/ : - { - *(.eh_frame); - } + .eh_frame (INFO) : { KEEP(*(.eh_frame)) } + .eh_frame_hdr (INFO) : { *(.eh_frame_hdr) } } /* Do not exceed this mark in the error messages above | */ From 8486104ba6128c4d89b514a7663ea0ca79ab15bc Mon Sep 17 00:00:00 2001 From: Richard Meadows <962920+richardeoin@users.noreply.github.com> Date: Wed, 15 Jul 2020 22:53:29 +0200 Subject: [PATCH 2/3] Update link.x Similar to #38, riscv compilers may also generate 'small ro data' `.srodata` sections. This doesn't appear to be well documented, but see [this blog post](https://www.sifive.com/blog/all-aboard-part-3-linker-relaxation-in-riscv-toolchain) for small amount of context. --- link.x | 1 + 1 file changed, 1 insertion(+) diff --git a/link.x b/link.x index 404cf2e..47b22d7 100644 --- a/link.x +++ b/link.x @@ -43,6 +43,7 @@ SECTIONS .rodata : ALIGN(4) { + *(.srodata .srodata.*); *(.rodata .rodata.*); /* 4-byte align the end (VMA) of this section. From 37837eafb56df8a798342985a97d2409d0117546 Mon Sep 17 00:00:00 2001 From: Vadim Kaushan Date: Thu, 16 Jul 2020 00:23:34 +0300 Subject: [PATCH 3/3] Release v0.6.2 --- Cargo.toml | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Cargo.toml b/Cargo.toml index 6067e00..3dcbdc2 100644 --- a/Cargo.toml +++ b/Cargo.toml @@ -1,6 +1,6 @@ [package] name = "riscv-rt" -version = "0.6.1" +version = "0.6.2" repository = "https://github.com/rust-embedded/riscv-rt" authors = ["The RISC-V Team "] categories = ["embedded", "no-std"]