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Commit 79f477b

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tesujitesuji
committedOct 4, 2020
Add asm! support for mips64
1 parent 6cb062d commit 79f477b

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5 files changed

+118
-82
lines changed

5 files changed

+118
-82
lines changed
 

‎compiler/rustc_codegen_llvm/src/asm.rs

Lines changed: 4 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -259,7 +259,7 @@ impl AsmBuilderMethods<'tcx> for Builder<'a, 'll, 'tcx> {
259259
InlineAsmArch::RiscV32 | InlineAsmArch::RiscV64 => {}
260260
InlineAsmArch::Nvptx64 => {}
261261
InlineAsmArch::Hexagon => {}
262-
InlineAsmArch::Mips => {}
262+
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {}
263263
}
264264
}
265265
if !options.contains(InlineAsmOptions::NOMEM) {
@@ -710,6 +710,7 @@ fn llvm_fixup_input(
710710
// MIPS only supports register-length arithmetics.
711711
Primitive::Int(Integer::I8 | Integer::I16, _) => bx.zext(value, bx.cx.type_i32()),
712712
Primitive::F32 => bx.bitcast(value, bx.cx.type_i32()),
713+
Primitive::F64 => bx.bitcast(value, bx.cx.type_i64()),
713714
_ => value,
714715
},
715716
_ => value,
@@ -785,6 +786,7 @@ fn llvm_fixup_output(
785786
Primitive::Int(Integer::I8, _) => bx.trunc(value, bx.cx.type_i8()),
786787
Primitive::Int(Integer::I16, _) => bx.trunc(value, bx.cx.type_i16()),
787788
Primitive::F32 => bx.bitcast(value, bx.cx.type_f32()),
789+
Primitive::F64 => bx.bitcast(value, bx.cx.type_f64()),
788790
_ => value,
789791
},
790792
_ => value,
@@ -854,6 +856,7 @@ fn llvm_fixup_output_type(
854856
// MIPS only supports register-length arithmetics.
855857
Primitive::Int(Integer::I8 | Integer::I16, _) => cx.type_i32(),
856858
Primitive::F32 => cx.type_i32(),
859+
Primitive::F64 => cx.type_i64(),
857860
_ => layout.llvm_type(cx),
858861
},
859862
_ => layout.llvm_type(cx),

‎compiler/rustc_target/src/asm/mips.rs

Lines changed: 5 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -32,11 +32,12 @@ impl MipsInlineAsmRegClass {
3232

3333
pub fn supported_types(
3434
self,
35-
_arch: InlineAsmArch,
35+
arch: InlineAsmArch,
3636
) -> &'static [(InlineAsmType, Option<&'static str>)] {
37-
match self {
38-
Self::reg => types! { _: I8, I16, I32, F32; },
39-
Self::freg => types! { _: F32, F64; },
37+
match (self, arch) {
38+
(Self::reg, InlineAsmArch::Mips64) => types! { _: I8, I16, I32, I64, F32, F64; },
39+
(Self::reg, _) => types! { _: I8, I16, I32, F32; },
40+
(Self::freg, _) => types! { _: F32, F64; },
4041
}
4142
}
4243
}

‎compiler/rustc_target/src/asm/mod.rs

Lines changed: 7 additions & 3 deletions
Original file line numberDiff line numberDiff line change
@@ -176,6 +176,7 @@ pub enum InlineAsmArch {
176176
Nvptx64,
177177
Hexagon,
178178
Mips,
179+
Mips64,
179180
}
180181

181182
impl FromStr for InlineAsmArch {
@@ -192,6 +193,7 @@ impl FromStr for InlineAsmArch {
192193
"nvptx64" => Ok(Self::Nvptx64),
193194
"hexagon" => Ok(Self::Hexagon),
194195
"mips" => Ok(Self::Mips),
196+
"mips64" => Ok(Self::Mips64),
195197
_ => Err(()),
196198
}
197199
}
@@ -259,7 +261,7 @@ impl InlineAsmReg {
259261
InlineAsmArch::Hexagon => {
260262
Self::Hexagon(HexagonInlineAsmReg::parse(arch, has_feature, target, &name)?)
261263
}
262-
InlineAsmArch::Mips => {
264+
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
263265
Self::Mips(MipsInlineAsmReg::parse(arch, has_feature, target, &name)?)
264266
}
265267
})
@@ -409,7 +411,9 @@ impl InlineAsmRegClass {
409411
InlineAsmArch::Hexagon => {
410412
Self::Hexagon(HexagonInlineAsmRegClass::parse(arch, name)?)
411413
}
412-
InlineAsmArch::Mips => Self::Mips(MipsInlineAsmRegClass::parse(arch, name)?),
414+
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
415+
Self::Mips(MipsInlineAsmRegClass::parse(arch, name)?)
416+
}
413417
})
414418
})
415419
}
@@ -565,7 +569,7 @@ pub fn allocatable_registers(
565569
hexagon::fill_reg_map(arch, has_feature, target, &mut map);
566570
map
567571
}
568-
InlineAsmArch::Mips => {
572+
InlineAsmArch::Mips | InlineAsmArch::Mips64 => {
569573
let mut map = mips::regclass_map();
570574
mips::fill_reg_map(arch, has_feature, target, &mut map);
571575
map

‎src/doc/unstable-book/src/library-features/asm.md

Lines changed: 12 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -27,7 +27,7 @@ Inline assembly is currently supported on the following architectures:
2727
- RISC-V
2828
- NVPTX
2929
- Hexagon
30-
- MIPS32
30+
- MIPS32r2 and MIPS64r2
3131

3232
## Basic usage
3333

@@ -513,8 +513,8 @@ Here is the list of currently supported register classes:
513513
| ARM | `qreg` | `q[0-15]` | `w` |
514514
| ARM | `qreg_low8` | `q[0-7]` | `t` |
515515
| ARM | `qreg_low4` | `q[0-3]` | `x` |
516-
| MIPS32 | `reg` | `$[2-25]` | `r` |
517-
| MIPS32 | `freg` | `$f[0-31]` | `f` |
516+
| MIPS | `reg` | `$[2-25]` | `r` |
517+
| MIPS | `freg` | `$f[0-31]` | `f` |
518518
| NVPTX | `reg16` | None\* | `h` |
519519
| NVPTX | `reg32` | None\* | `r` |
520520
| NVPTX | `reg64` | None\* | `l` |
@@ -552,6 +552,8 @@ Each register class has constraints on which value types they can be used with.
552552
| ARM | `qreg` | `neon` | `i8x16`, `i16x8`, `i32x4`, `i64x2`, `f32x4` |
553553
| MIPS32 | `reg` | None | `i8`, `i16`, `i32`, `f32` |
554554
| MIPS32 | `freg` | None | `f32`, `f64` |
555+
| MIPS64 | `reg` | None | `i8`, `i16`, `i32`, `i64`, `f32`, `f64` |
556+
| MIPS64 | `freg` | None | `f32`, `f64` |
555557
| NVPTX | `reg16` | None | `i8`, `i16` |
556558
| NVPTX | `reg32` | None | `i8`, `i16`, `i32`, `f32` |
557559
| NVPTX | `reg64` | None | `i8`, `i16`, `i32`, `f32`, `i64`, `f64` |
@@ -637,11 +639,11 @@ Some registers cannot be used for input or output operands:
637639
| x86 | `st([0-7])` | x87 registers are not currently supported (but may be in the future). |
638640
| AArch64 | `xzr` | This is a constant zero register which can't be modified. |
639641
| ARM | `pc` | This is the program counter, not a real register. |
640-
| MIPS32 | `$0` or `$zero` | This is a constant zero register which can't be modified. |
641-
| MIPS32 | `$1` or `$at` | Reserved for assembler. |
642-
| MIPS32 | `$26`/`$k0`, `$27`/`$k1` | OS-reserved registers. |
643-
| MIPS32 | `$28`/`$gp` | Global pointer cannot be used as inputs or outputs. |
644-
| MIPS32 | `$ra` | Return address cannot be used as inputs or outputs. |
642+
| MIPS | `$0` or `$zero` | This is a constant zero register which can't be modified. |
643+
| MIPS | `$1` or `$at` | Reserved for assembler. |
644+
| MIPS | `$26`/`$k0`, `$27`/`$k1` | OS-reserved registers. |
645+
| MIPS | `$28`/`$gp` | Global pointer cannot be used as inputs or outputs. |
646+
| MIPS | `$ra` | Return address cannot be used as inputs or outputs. |
645647
| RISC-V | `x0` | This is a constant zero register which can't be modified. |
646648
| RISC-V | `gp`, `tp` | These registers are reserved and cannot be used as inputs or outputs. |
647649
| Hexagon | `lr` | This is the link register which cannot be used as an input or output. |
@@ -689,8 +691,8 @@ The supported modifiers are a subset of LLVM's (and GCC's) [asm template argumen
689691
| ARM | `dreg` | None | `d0` | `P` |
690692
| ARM | `qreg` | None | `q0` | `q` |
691693
| ARM | `qreg` | `e` / `f` | `d0` / `d1` | `e` / `f` |
692-
| MIPS32 | `reg` | None | `$2` | None |
693-
| MIPS32 | `freg` | None | `$f0` | None |
694+
| MIPS | `reg` | None | `$2` | None |
695+
| MIPS | `freg` | None | `$f0` | None |
694696
| NVPTX | `reg16` | None | `rs0` | None |
695697
| NVPTX | `reg32` | None | `r0` | None |
696698
| NVPTX | `reg64` | None | `rd0` | None |

‎src/test/assembly/asm/mips-types.rs

Lines changed: 90 additions & 64 deletions
Original file line numberDiff line numberDiff line change
@@ -1,6 +1,8 @@
11
// no-system-llvm
2+
// revisions: mips32 mips64
23
// assembly-output: emit-asm
3-
// compile-flags: --target mips-unknown-linux-gnu
4+
//[mips32] compile-flags: --target mips-unknown-linux-gnu
5+
//[mips64] compile-flags: --target mips64-unknown-linux-gnuabi64
46
// needs-llvm-components: mips
57

68
#![feature(no_core, lang_items, rustc_attrs, repr_simd)]
@@ -32,7 +34,9 @@ impl Copy for i8 {}
3234
impl Copy for u8 {}
3335
impl Copy for i16 {}
3436
impl Copy for i32 {}
37+
impl Copy for i64 {}
3538
impl Copy for f32 {}
39+
impl Copy for f64 {}
3640
impl Copy for ptr {}
3741
extern "C" {
3842
fn extern_func();
@@ -44,168 +48,190 @@ extern "Rust" {
4448
fn dont_merge(s: &str);
4549
}
4650

47-
macro_rules! check { ($func:ident, $ty:ty, $class:ident) => {
51+
macro_rules! check { ($func:ident, $ty:ty, $class:ident, $mov:literal) => {
4852
#[no_mangle]
4953
pub unsafe fn $func(x: $ty) -> $ty {
5054
dont_merge(stringify!($func));
5155

5256
let y;
53-
asm!("move {}, {}", out($class) y, in($class) x);
57+
asm!(concat!($mov," {}, {}"), out($class) y, in($class) x);
5458
y
5559
}
5660
};}
5761

58-
macro_rules! check_reg { ($func:ident, $ty:ty, $reg:tt) => {
62+
macro_rules! check_reg { ($func:ident, $ty:ty, $reg:tt, $mov:literal) => {
5963
#[no_mangle]
6064
pub unsafe fn $func(x: $ty) -> $ty {
6165
dont_merge(stringify!($func));
6266

6367
let y;
64-
asm!(concat!("move ", $reg, ", ", $reg), lateout($reg) y, in($reg) x);
68+
asm!(concat!($mov, " ", $reg, ", ", $reg), lateout($reg) y, in($reg) x);
6569
y
6670
}
6771
};}
6872

69-
// CHECK-LABEL: sym_static:
70-
// CHECK: #APP
71-
// CHECK: lw $3, %got(extern_static)
72-
// CHECK: #NO_APP
73+
// mips32-LABEL: sym_static_32:
74+
// mips32: #APP
75+
// mips32: lw $3, %got(extern_static)
76+
// mips32: #NO_APP
77+
#[cfg(mips32)]
7378
#[no_mangle]
74-
pub unsafe fn sym_static() {
75-
asm!("la $v1, {}", sym extern_static);
79+
pub unsafe fn sym_static_32() {
80+
asm!("lw $v1, {}", sym extern_static);
7681
}
7782

78-
// CHECK-LABEL: sym_fn:
79-
// CHECK: #APP
80-
// CHECK: lw $3, %got(extern_func)
81-
// CHECK: #NO_APP
83+
// mips32-LABEL: sym_fn_32:
84+
// mips32: #APP
85+
// mips32: lw $3, %got(extern_func)
86+
// mips32: #NO_APP
87+
#[cfg(mips32)]
88+
#[no_mangle]
89+
pub unsafe fn sym_fn_32() {
90+
asm!("lw $v1, {}", sym extern_func);
91+
}
92+
93+
// mips64-LABEL: sym_static_64:
94+
// mips64: #APP
95+
// mips64: ld $3, %got_disp(extern_static)
96+
// mips64: #NO_APP
97+
#[cfg(mips64)]
8298
#[no_mangle]
83-
pub unsafe fn sym_fn() {
84-
asm!("la $v1, {}", sym extern_func);
99+
pub unsafe fn sym_static_64() {
100+
asm!("ld $v1, {}", sym extern_static);
101+
}
102+
103+
// mips64-LABEL: sym_fn_64:
104+
// mips64: #APP
105+
// mips64: ld $3, %got_disp(extern_func)
106+
// mips64: #NO_APP
107+
#[cfg(mips64)]
108+
#[no_mangle]
109+
pub unsafe fn sym_fn_64() {
110+
asm!("ld $v1, {}", sym extern_func);
85111
}
86112

87113
// CHECK-LABEL: reg_f32:
88114
// CHECK: #APP
89115
// CHECK: mov.s $f{{[0-9]+}}, $f{{[0-9]+}}
90116
// CHECK: #NO_APP
91-
#[no_mangle]
92-
pub unsafe fn reg_f32(x: f32) -> f32 {
93-
dont_merge("reg_f32");
94-
let y;
95-
asm!("mov.s {}, {}", out(freg) y, in(freg) x);
96-
y
97-
}
117+
check!(reg_f32, f32, freg, "mov.s");
98118

99119
// CHECK-LABEL: f0_f32:
100120
// CHECK: #APP
101121
// CHECK: mov.s $f0, $f0
102122
// CHECK: #NO_APP
103123
#[no_mangle]
104-
pub unsafe fn f0_f32(x: f32) -> f32 {
105-
dont_merge("f0_f32");
106-
let y;
107-
asm!("mov.s $f0, $f0", lateout("$f0") y, in("$f0") x);
108-
y
109-
}
124+
check_reg!(f0_f32, f32, "$f0", "mov.s");
125+
126+
// CHECK-LABEL: reg_f32_64:
127+
// CHECK: #APP
128+
// CHECK: mov.d $f{{[0-9]+}}, $f{{[0-9]+}}
129+
// CHECK: #NO_APP
130+
check!(reg_f32_64, f32, freg, "mov.d");
131+
132+
// CHECK-LABEL: f0_f32_64:
133+
// CHECK: #APP
134+
// CHECK: mov.d $f0, $f0
135+
// CHECK: #NO_APP
136+
#[no_mangle]
137+
check_reg!(f0_f32_64, f32, "$f0", "mov.d");
110138

111139
// CHECK-LABEL: reg_f64:
112140
// CHECK: #APP
113141
// CHECK: mov.d $f{{[0-9]+}}, $f{{[0-9]+}}
114142
// CHECK: #NO_APP
115143
#[no_mangle]
116-
pub unsafe fn reg_f64(x: f64) -> f64 {
117-
dont_merge("reg_f64");
118-
let y;
119-
asm!("mov.d {}, {}", out(freg) y, in(freg) x);
120-
y
121-
}
144+
check!(reg_f64, f64, freg, "mov.d");
122145

123146
// CHECK-LABEL: f0_f64:
124147
// CHECK: #APP
125148
// CHECK: mov.d $f0, $f0
126149
// CHECK: #NO_APP
127150
#[no_mangle]
128-
pub unsafe fn f0_f64(x: f64) -> f64 {
129-
dont_merge("f0_f64");
130-
let y;
131-
asm!("mov.d $f0, $f0", lateout("$f0") y, in("$f0") x);
132-
y
133-
}
151+
check_reg!(f0_f64, f64, "$f0", "mov.d");
134152

135153
// CHECK-LABEL: reg_ptr:
136154
// CHECK: #APP
137155
// CHECK: move ${{[0-9]+}}, ${{[0-9]+}}
138156
// CHECK: #NO_APP
139-
check!(reg_ptr, ptr, reg);
157+
check!(reg_ptr, ptr, reg, "move");
140158

141159
// CHECK-LABEL: reg_i32:
142160
// CHECK: #APP
143161
// CHECK: move ${{[0-9]+}}, ${{[0-9]+}}
144162
// CHECK: #NO_APP
145-
check!(reg_i32, i32, reg);
163+
check!(reg_i32, i32, reg, "move");
146164

147165
// CHECK-LABEL: reg_f32_soft:
148166
// CHECK: #APP
149167
// CHECK: move ${{[0-9]+}}, ${{[0-9]+}}
150168
// CHECK: #NO_APP
151-
check!(reg_f32_soft, f32, reg);
169+
check!(reg_f32_soft, f32, reg, "move");
170+
171+
// mips64-LABEL: reg_f64_soft:
172+
// mips64: #APP
173+
// mips64: move ${{[0-9]+}}, ${{[0-9]+}}
174+
// mips64: #NO_APP
175+
#[cfg(mips64)]
176+
check!(reg_f64_soft, f64, reg, "move");
152177

153178
// CHECK-LABEL: reg_i8:
154179
// CHECK: #APP
155180
// CHECK: move ${{[0-9]+}}, ${{[0-9]+}}
156181
// CHECK: #NO_APP
157-
check!(reg_i8, i8, reg);
182+
check!(reg_i8, i8, reg, "move");
158183

159184
// CHECK-LABEL: reg_u8:
160185
// CHECK: #APP
161186
// CHECK: move ${{[0-9]+}}, ${{[0-9]+}}
162187
// CHECK: #NO_APP
163-
check!(reg_u8, u8, reg);
188+
check!(reg_u8, u8, reg, "move");
164189

165190
// CHECK-LABEL: reg_i16:
166191
// CHECK: #APP
167192
// CHECK: move ${{[0-9]+}}, ${{[0-9]+}}
168193
// CHECK: #NO_APP
169-
check!(reg_i16, i16, reg);
194+
check!(reg_i16, i16, reg, "move");
170195

171-
// CHECK-LABEL: t0_ptr:
172-
// CHECK: #APP
173-
// CHECK: move $8, $8
174-
// CHECK: #NO_APP
175-
check_reg!(t0_ptr, ptr, "$t0");
196+
// mips64-LABEL: reg_i64:
197+
// mips64: #APP
198+
// mips64: move ${{[0-9]+}}, ${{[0-9]+}}
199+
// mips64: #NO_APP
200+
#[cfg(mips64)]
201+
check!(reg_i64, i64, reg, "move");
176202

177-
// CHECK-LABEL: t0_i32:
203+
// CHECK-LABEL: r8_ptr:
178204
// CHECK: #APP
179205
// CHECK: move $8, $8
180206
// CHECK: #NO_APP
181-
check_reg!(t0_i32, i32, "$t0");
207+
check_reg!(r8_ptr, ptr, "$8", "move");
182208

183-
// CHECK-LABEL: t0_f32:
209+
// CHECK-LABEL: r8_i32:
184210
// CHECK: #APP
185211
// CHECK: move $8, $8
186212
// CHECK: #NO_APP
187-
check_reg!(t0_f32, f32, "$t0");
213+
check_reg!(r8_i32, i32, "$8", "move");
188214

189-
// CHECK-LABEL: t0_i8:
215+
// CHECK-LABEL: r8_f32:
190216
// CHECK: #APP
191217
// CHECK: move $8, $8
192218
// CHECK: #NO_APP
193-
check_reg!(t0_i8, i8, "$t0");
219+
check_reg!(r8_f32, f32, "$8", "move");
194220

195-
// CHECK-LABEL: t0_u8:
221+
// CHECK-LABEL: r8_i8:
196222
// CHECK: #APP
197223
// CHECK: move $8, $8
198224
// CHECK: #NO_APP
199-
check_reg!(t0_u8, u8, "$t0");
225+
check_reg!(r8_i8, i8, "$8", "move");
200226

201-
// CHECK-LABEL: t0_i16:
227+
// CHECK-LABEL: r8_u8:
202228
// CHECK: #APP
203229
// CHECK: move $8, $8
204230
// CHECK: #NO_APP
205-
check_reg!(t0_i16, i16, "$t0");
231+
check_reg!(r8_u8, u8, "$8", "move");
206232

207233
// CHECK-LABEL: r8_i16:
208234
// CHECK: #APP
209235
// CHECK: move $8, $8
210236
// CHECK: #NO_APP
211-
check_reg!(r8_i16, i16, "$8");
237+
check_reg!(r8_i16, i16, "$8", "move");

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