diff --git a/src/shims/intrinsics/atomic.rs b/src/intrinsics/atomic.rs
similarity index 100%
rename from src/shims/intrinsics/atomic.rs
rename to src/intrinsics/atomic.rs
diff --git a/src/shims/intrinsics/mod.rs b/src/intrinsics/mod.rs
similarity index 100%
rename from src/shims/intrinsics/mod.rs
rename to src/intrinsics/mod.rs
diff --git a/src/shims/intrinsics/simd.rs b/src/intrinsics/simd.rs
similarity index 100%
rename from src/shims/intrinsics/simd.rs
rename to src/intrinsics/simd.rs
diff --git a/src/lib.rs b/src/lib.rs
index f47c84842b..f01c2da25d 100644
--- a/src/lib.rs
+++ b/src/lib.rs
@@ -79,6 +79,7 @@ mod concurrency;
 mod diagnostics;
 mod eval;
 mod helpers;
+mod intrinsics;
 mod machine;
 mod mono_hash_map;
 mod operator;
@@ -95,9 +96,9 @@ pub use rustc_const_eval::interpret::*;
 #[doc(no_inline)]
 pub use rustc_const_eval::interpret::{self, AllocMap, PlaceTy, Provenance as _};
 
+pub use crate::intrinsics::EvalContextExt as _;
 pub use crate::shims::env::{EnvVars, EvalContextExt as _};
 pub use crate::shims::foreign_items::{DynSym, EvalContextExt as _};
-pub use crate::shims::intrinsics::EvalContextExt as _;
 pub use crate::shims::os_str::EvalContextExt as _;
 pub use crate::shims::panic::{CatchUnwindData, EvalContextExt as _};
 pub use crate::shims::time::EvalContextExt as _;
diff --git a/src/shims/foreign_items.rs b/src/shims/foreign_items.rs
index 4b96ff18b7..6a12180b83 100644
--- a/src/shims/foreign_items.rs
+++ b/src/shims/foreign_items.rs
@@ -893,36 +893,6 @@ trait EvalContextExtPriv<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
                     throw_unsup_format!("unsupported `llvm.prefetch` type argument: {}", ty);
                 }
             }
-            // FIXME: Move these to an `arm` submodule.
-            "llvm.aarch64.isb" if this.tcx.sess.target.arch == "aarch64" => {
-                let [arg] = this.check_shim(abi, Abi::Unadjusted, link_name, args)?;
-                let arg = this.read_scalar(arg)?.to_i32()?;
-                match arg {
-                    // SY ("full system scope")
-                    15 => {
-                        this.yield_active_thread();
-                    }
-                    _ => {
-                        throw_unsup_format!("unsupported llvm.aarch64.isb argument {}", arg);
-                    }
-                }
-            }
-            "llvm.arm.hint" if this.tcx.sess.target.arch == "arm" => {
-                let [arg] = this.check_shim(abi, Abi::Unadjusted, link_name, args)?;
-                let arg = this.read_scalar(arg)?.to_i32()?;
-                // Note that different arguments might have different target feature requirements.
-                match arg {
-                    // YIELD
-                    1 => {
-                        this.expect_target_feature_for_intrinsic(link_name, "v6")?;
-                        this.yield_active_thread();
-                    }
-                    _ => {
-                        throw_unsup_format!("unsupported llvm.arm.hint argument {}", arg);
-                    }
-                }
-            }
-
             // Used to implement the x86 `_mm{,256,512}_popcnt_epi{8,16,32,64}` and wasm
             // `{i,u}8x16_popcnt` functions.
             name if name.starts_with("llvm.ctpop.v") => {
@@ -946,6 +916,7 @@ trait EvalContextExtPriv<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
                 }
             }
 
+            // Target-specific shims
             name if name.starts_with("llvm.x86.")
                 && (this.tcx.sess.target.arch == "x86"
                     || this.tcx.sess.target.arch == "x86_64") =>
@@ -954,6 +925,35 @@ trait EvalContextExtPriv<'mir, 'tcx: 'mir>: crate::MiriInterpCxExt<'mir, 'tcx> {
                     this, link_name, abi, args, dest,
                 );
             }
+            // FIXME: Move these to an `arm` submodule.
+            "llvm.aarch64.isb" if this.tcx.sess.target.arch == "aarch64" => {
+                let [arg] = this.check_shim(abi, Abi::Unadjusted, link_name, args)?;
+                let arg = this.read_scalar(arg)?.to_i32()?;
+                match arg {
+                    // SY ("full system scope")
+                    15 => {
+                        this.yield_active_thread();
+                    }
+                    _ => {
+                        throw_unsup_format!("unsupported llvm.aarch64.isb argument {}", arg);
+                    }
+                }
+            }
+            "llvm.arm.hint" if this.tcx.sess.target.arch == "arm" => {
+                let [arg] = this.check_shim(abi, Abi::Unadjusted, link_name, args)?;
+                let arg = this.read_scalar(arg)?.to_i32()?;
+                // Note that different arguments might have different target feature requirements.
+                match arg {
+                    // YIELD
+                    1 => {
+                        this.expect_target_feature_for_intrinsic(link_name, "v6")?;
+                        this.yield_active_thread();
+                    }
+                    _ => {
+                        throw_unsup_format!("unsupported llvm.arm.hint argument {}", arg);
+                    }
+                }
+            }
 
             // Platform-specific shims
             _ =>
diff --git a/src/shims/mod.rs b/src/shims/mod.rs
index 85c9a202f7..ab5a8c5877 100644
--- a/src/shims/mod.rs
+++ b/src/shims/mod.rs
@@ -5,7 +5,6 @@ mod backtrace;
 #[cfg(target_os = "linux")]
 pub mod ffi_support;
 pub mod foreign_items;
-pub mod intrinsics;
 pub mod unix;
 pub mod windows;
 mod x86;
diff --git a/tests/fail/shims/intrinsic_target_feature.rs b/tests/fail/intrinsics/intrinsic_target_feature.rs
similarity index 100%
rename from tests/fail/shims/intrinsic_target_feature.rs
rename to tests/fail/intrinsics/intrinsic_target_feature.rs
diff --git a/tests/fail/shims/intrinsic_target_feature.stderr b/tests/fail/intrinsics/intrinsic_target_feature.stderr
similarity index 100%
rename from tests/fail/shims/intrinsic_target_feature.stderr
rename to tests/fail/intrinsics/intrinsic_target_feature.stderr
diff --git a/tests/pass/ints.rs b/tests/pass/integers.rs
similarity index 100%
rename from tests/pass/ints.rs
rename to tests/pass/integers.rs
diff --git a/tests/pass/intrinsics-integer.rs b/tests/pass/intrinsics/integer.rs
similarity index 100%
rename from tests/pass/intrinsics-integer.rs
rename to tests/pass/intrinsics/integer.rs
diff --git a/tests/pass/intrinsics.rs b/tests/pass/intrinsics/intrinsics.rs
similarity index 100%
rename from tests/pass/intrinsics.rs
rename to tests/pass/intrinsics/intrinsics.rs
diff --git a/tests/pass/portable-simd-ptrs.rs b/tests/pass/intrinsics/portable-simd-ptrs.rs
similarity index 100%
rename from tests/pass/portable-simd-ptrs.rs
rename to tests/pass/intrinsics/portable-simd-ptrs.rs
diff --git a/tests/pass/portable-simd.rs b/tests/pass/intrinsics/portable-simd.rs
similarity index 100%
rename from tests/pass/portable-simd.rs
rename to tests/pass/intrinsics/portable-simd.rs
diff --git a/tests/pass/volatile.rs b/tests/pass/intrinsics/volatile.rs
similarity index 100%
rename from tests/pass/volatile.rs
rename to tests/pass/intrinsics/volatile.rs
diff --git a/tests/pass/available-parallelism-miri-num-cpus.rs b/tests/pass/shims/available-parallelism-miri-num-cpus.rs
similarity index 100%
rename from tests/pass/available-parallelism-miri-num-cpus.rs
rename to tests/pass/shims/available-parallelism-miri-num-cpus.rs
diff --git a/tests/pass/available-parallelism.rs b/tests/pass/shims/available-parallelism.rs
similarity index 100%
rename from tests/pass/available-parallelism.rs
rename to tests/pass/shims/available-parallelism.rs
diff --git a/tests/pass/intrinsics-x86-aes-vaes.rs b/tests/pass/shims/x86/intrinsics-x86-aes-vaes.rs
similarity index 100%
rename from tests/pass/intrinsics-x86-aes-vaes.rs
rename to tests/pass/shims/x86/intrinsics-x86-aes-vaes.rs
diff --git a/tests/pass/intrinsics-x86-avx.rs b/tests/pass/shims/x86/intrinsics-x86-avx.rs
similarity index 100%
rename from tests/pass/intrinsics-x86-avx.rs
rename to tests/pass/shims/x86/intrinsics-x86-avx.rs
diff --git a/tests/pass/intrinsics-x86-avx2.rs b/tests/pass/shims/x86/intrinsics-x86-avx2.rs
similarity index 100%
rename from tests/pass/intrinsics-x86-avx2.rs
rename to tests/pass/shims/x86/intrinsics-x86-avx2.rs
diff --git a/tests/pass/intrinsics-x86-avx512.rs b/tests/pass/shims/x86/intrinsics-x86-avx512.rs
similarity index 100%
rename from tests/pass/intrinsics-x86-avx512.rs
rename to tests/pass/shims/x86/intrinsics-x86-avx512.rs
diff --git a/tests/pass/intrinsics-x86-pause-without-sse2.rs b/tests/pass/shims/x86/intrinsics-x86-pause-without-sse2.rs
similarity index 100%
rename from tests/pass/intrinsics-x86-pause-without-sse2.rs
rename to tests/pass/shims/x86/intrinsics-x86-pause-without-sse2.rs
diff --git a/tests/pass/intrinsics-x86-sse.rs b/tests/pass/shims/x86/intrinsics-x86-sse.rs
similarity index 100%
rename from tests/pass/intrinsics-x86-sse.rs
rename to tests/pass/shims/x86/intrinsics-x86-sse.rs
diff --git a/tests/pass/intrinsics-x86-sse2.rs b/tests/pass/shims/x86/intrinsics-x86-sse2.rs
similarity index 100%
rename from tests/pass/intrinsics-x86-sse2.rs
rename to tests/pass/shims/x86/intrinsics-x86-sse2.rs
diff --git a/tests/pass/intrinsics-x86-sse3-ssse3.rs b/tests/pass/shims/x86/intrinsics-x86-sse3-ssse3.rs
similarity index 100%
rename from tests/pass/intrinsics-x86-sse3-ssse3.rs
rename to tests/pass/shims/x86/intrinsics-x86-sse3-ssse3.rs
diff --git a/tests/pass/intrinsics-x86-sse41.rs b/tests/pass/shims/x86/intrinsics-x86-sse41.rs
similarity index 100%
rename from tests/pass/intrinsics-x86-sse41.rs
rename to tests/pass/shims/x86/intrinsics-x86-sse41.rs
diff --git a/tests/pass/intrinsics-x86.rs b/tests/pass/shims/x86/intrinsics-x86.rs
similarity index 100%
rename from tests/pass/intrinsics-x86.rs
rename to tests/pass/shims/x86/intrinsics-x86.rs