[clippy] fix clippy issues

gnzlbg · gnzlbg · commit 7b83e03a7dee · 2017-10-12T09:57:20.000+02:00
diff --git a/.appveyor.yml b/.appveyor.yml
@@ -15,7 +15,6 @@ install:
   - if NOT "%TARGET%" == "x86_64-pc-windows-msvc" rustup target add %TARGET%
   - rustc -vV
   - cargo -vV
-  - cargo install clippy
 
 build: false
 
diff --git a/.travis.yml b/.travis.yml
@@ -17,19 +17,17 @@ matrix:
     - install: true
       script: ci/dox.sh
     - env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1
+      script: |
+        cargo install clippy
+        cargo clippy --all -- -D clippy-pedantic
   allow_failures:
     - env: CLIPPY=On TARGET=x86_64-unknown-linux-gnu NO_ADD=1
 install:
   - if [ "$NO_ADD" == "" ]; then rustup target add $TARGET; fi
 
 script:
   - cargo generate-lockfile
-  - if [[ "${CLIPPY}" == "" ]]; then ci/run-docker.sh $TARGET; fi
-  - |
-    if [[ "${CLIPPY}" == "On" ]]; then
-      cargo install clippy
-      cargo clippy --all -- -D clippy-pedantic
-    fi
+  - ci/run-docker.sh $TARGET
 
 notifications:
   email:
diff --git a/ci/run.sh b/ci/run.sh
@@ -4,4 +4,3 @@ set -ex
 
 cargo test --target $TARGET
 cargo test --release --target $TARGET
-cargo clippy --all -- -D clippy-pedantic
diff --git a/examples/play.rs b/examples/play.rs
@@ -1,5 +1,12 @@
 #![feature(target_feature)]
 
+#![cfg_attr(feature = "cargo-clippy",
+            allow(similar_names, missing_docs_in_private_items, cast_sign_loss,
+                  cast_possible_truncation, cast_possible_wrap, option_unwrap_used,
+                  use_debug, print_stdout,
+            )
+)]
+
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 mod example {
 
diff --git a/examples/types.rs b/examples/types.rs
@@ -1,5 +1,11 @@
 #![feature(target_feature)]
 
+#![cfg_attr(feature = "cargo-clippy",
+            allow(missing_docs_in_private_items, result_unwrap_used,
+                  option_unwrap_used, print_stdout, use_debug
+            )
+)]
+
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 mod example {
     extern crate stdsimd;
diff --git a/examples/wat.rs b/examples/wat.rs
@@ -1,5 +1,11 @@
 #![feature(target_feature)]
 
+#![cfg_attr(feature = "cargo-clippy",
+            allow(missing_docs_in_private_items, result_unwrap_used,
+                  option_unwrap_used, print_stdout, use_debug
+            )
+)]
+
 #[cfg(any(target_arch = "x86", target_arch = "x86_64"))]
 mod example {
     extern crate stdsimd;
diff --git a/src/lib.rs b/src/lib.rs
@@ -26,7 +26,7 @@
 //! others at:
 //!
 //! * [i686](https://rust-lang-nursery.github.io/stdsimd/i686/stdsimd/)
-//! * [x86_64](https://rust-lang-nursery.github.io/stdsimd/x86_64/stdsimd/)
+//! * [`x86_64`](https://rust-lang-nursery.github.io/stdsimd/x86_64/stdsimd/)
 //! * [arm](https://rust-lang-nursery.github.io/stdsimd/arm/stdsimd/)
 //! * [aarch64](https://rust-lang-nursery.github.io/stdsimd/aarch64/stdsimd/)
 //!
@@ -117,6 +117,13 @@
 )]
 #![cfg_attr(test, feature(proc_macro, test))]
 
+#![cfg_attr(feature = "cargo-clippy",
+            allow(inline_always, too_many_arguments, missing_docs_in_private_items,
+                  cast_sign_loss, cast_lossless, cast_possible_wrap,
+                  cast_possible_truncation, cast_precision_loss, shadow_reuse,
+                  cyclomatic_complexity, similar_names
+            ))]
+
 #[cfg(test)]
 extern crate stdsimd_test;
 
diff --git a/src/x86/avx.rs b/src/x86/avx.rs
@@ -106,7 +106,7 @@ pub unsafe fn _mm256_shuffle_pd(a: f64x4, b: f64x4, imm8: i32) -> f64x4 {
             }
         }
     }
-    match (imm8 >> 0) & 0x1 {
+    match imm8 & 0x1 {
         0 => shuffle1!(0),
         _ => shuffle1!(1),
     }
@@ -806,8 +806,8 @@ pub unsafe fn _mm_permutevar_ps(a: f32x4, b: i32x4) -> f32x4 {
 #[target_feature = "+avx"]
 #[cfg_attr(test, assert_instr(vpermilps, imm8 = 9))]
 pub unsafe fn _mm256_permute_ps(a: f32x8, imm8: i32) -> f32x8 {
-    let imm8 = (imm8 & 0xFF) as u8;
     const fn add4(x: u32) -> u32 { x + 4 }
+    let imm8 = (imm8 & 0xFF) as u8;
     macro_rules! shuffle4 {
         ($a:expr, $b:expr, $c:expr, $d:expr) => {
             simd_shuffle8(a, _mm256_undefined_ps(), [
@@ -845,7 +845,7 @@ pub unsafe fn _mm256_permute_ps(a: f32x8, imm8: i32) -> f32x8 {
             }
         }
     }
-    match (imm8 >> 0) & 0b11 {
+    match imm8 & 0b11 {
         0b00 => shuffle1!(0),
         0b01 => shuffle1!(1),
         0b10 => shuffle1!(2),
@@ -899,7 +899,7 @@ pub unsafe fn _mm_permute_ps(a: f32x4, imm8: i32) -> f32x4 {
             }
         }
     }
-    match (imm8 >> 0) & 0b11 {
+    match imm8 & 0b11 {
         0b00 => shuffle1!(0),
         0b01 => shuffle1!(1),
         0b10 => shuffle1!(2),
@@ -959,7 +959,7 @@ pub unsafe fn _mm256_permute_pd(a: f64x4, imm8: i32) -> f64x4 {
             }
         }
     }
-    match (imm8 >> 0) & 0x1 {
+    match imm8 & 0x1 {
         0 => shuffle1!(0),
         _ => shuffle1!(1),
     }
@@ -987,7 +987,7 @@ pub unsafe fn _mm_permute_pd(a: f64x2, imm8: i32) -> f64x2 {
             }
         }
     }
-    match (imm8 >> 0) & 0x1 {
+    match imm8 & 0x1 {
         0 => shuffle1!(0),
         _ => shuffle1!(1),
     }
diff --git a/src/x86/avx2.rs b/src/x86/avx2.rs
@@ -100,6 +100,7 @@ pub unsafe fn _mm256_adds_epu16(a: u16x16, b: u16x16) -> u16x16 {
 #[target_feature = "+avx2"]
 #[cfg_attr(test, assert_instr(vpalignr, n = 15))]
 pub unsafe fn _mm256_alignr_epi8(a: i8x32, b: i8x32, n: i32) -> i8x32 {
+    const fn add(a: u32, b: u32) -> u32 { a + b }
     let n = n as u32;
     // If palignr is shifting the pair of vectors more than the size of two
     // lanes, emit zero.
@@ -114,7 +115,6 @@ pub unsafe fn _mm256_alignr_epi8(a: i8x32, b: i8x32, n: i32) -> i8x32 {
         (a, b, n)
     };
 
-    const fn add(a: u32, b: u32) -> u32 { a + b }
     macro_rules! shuffle {
         ($shift:expr) => {
             simd_shuffle32(b, a, [
diff --git a/src/x86/bmi.rs b/src/x86/bmi.rs
@@ -16,7 +16,7 @@ use stdsimd_test::assert_instr;
 #[target_feature = "+bmi"]
 #[cfg_attr(test, assert_instr(bextr))]
 pub unsafe fn _bextr_u32(a: u32, start: u32, len: u32) -> u32 {
-    _bextr2_u32(a, (start & 0xffu32) | ((len & 0xffu32) << 8u32))
+    _bextr2_u32(a, (start & 0xff_u32) | ((len & 0xff_u32) << 8_u32))
 }
 
 /// Extracts bits in range [`start`, `start` + `length`) from `a` into
@@ -26,7 +26,7 @@ pub unsafe fn _bextr_u32(a: u32, start: u32, len: u32) -> u32 {
 #[cfg_attr(test, assert_instr(bextr))]
 #[cfg(not(target_arch = "x86"))]
 pub unsafe fn _bextr_u64(a: u64, start: u64, len: u64) -> u64 {
-    _bextr2_u64(a, (start & 0xffu64) | ((len & 0xffu64) << 8u64))
+    _bextr2_u64(a, (start & 0xff_u64) | ((len & 0xff_u64) << 8_u64))
 }
 
 /// Extracts bits of `a` specified by `control` into
@@ -92,7 +92,7 @@ pub unsafe fn _blsi_u64(x: u64) -> u64 {
 #[target_feature = "+bmi"]
 #[cfg_attr(test, assert_instr(blsmsk))]
 pub unsafe fn _blsmsk_u32(x: u32) -> u32 {
-    x ^ (x.wrapping_sub(1u32))
+    x ^ (x.wrapping_sub(1_u32))
 }
 
 /// Get mask up to lowest set bit.
@@ -101,7 +101,7 @@ pub unsafe fn _blsmsk_u32(x: u32) -> u32 {
 #[cfg_attr(test, assert_instr(blsmsk))]
 #[cfg(not(target_arch = "x86"))] // generates lots of instructions
 pub unsafe fn _blsmsk_u64(x: u64) -> u64 {
-    x ^ (x.wrapping_sub(1u64))
+    x ^ (x.wrapping_sub(1_u64))
 }
 
 /// Resets the lowest set bit of `x`.
diff --git a/src/x86/runtime.rs b/src/x86/runtime.rs
@@ -85,21 +85,18 @@ pub enum __Feature {
     __NonExhaustive
 }
 
+/// Sets the `bit`-th bit of `x`.
 fn set_bit(x: usize, bit: u32) -> usize {
     debug_assert!(32 > bit);
     x | 1 << bit
 }
 
+/// Tests the `bit`-th bit of `x`.
 fn test_bit(x: usize, bit: u32) -> bool {
     debug_assert!(32 > bit);
     x & (1 << bit) != 0
 }
 
-fn inv_test_bit(v: usize, idx: u32) -> bool {
-    debug_assert!(32 > idx);
-    ((v >> idx) & 1) != 0
-}
-
 /// Run-time feature detection on x86 works by using the CPUID instruction.
 ///
 /// The [CPUID Wikipedia page](https://en.wikipedia.org/wiki/CPUID) contains all
@@ -122,37 +119,37 @@ fn detect_features() -> usize {
         /// This gives us most of the CPU features in ECX and EDX (see below),
         asm!("cpuid"
              : "={ecx}"(ecx), "={edx}"(edx)
-             : "{eax}"(0x00000001u32), "{ecx}"(0 as u32)
+             : "{eax}"(0x0000_0001_u32), "{ecx}"(0 as u32)
              : :);
 
         /// 2. EAX=7, ECX=0: Queries "Extended Features"
         /// This gives us information about bmi,bmi2, and avx2 support (see below).
         asm!("cpuid"
              : "={ebx}"(ebx)
-             : "{eax}"(0x00000007u32), "{ecx}"(0 as u32)
+             : "{eax}"(0x0000_0007_u32), "{ecx}"(0 as u32)
              : :);
     }
 
     let mut value: usize = 0;
 
     // CPUID call with EAX=7, ECX=0 => Extended Features in EBX and ECX (unneeded):
-    if inv_test_bit(ebx, 3) { value = set_bit(value, __Feature::bmi as u32); }
-    if inv_test_bit(ebx, 5) { value = set_bit(value, __Feature::avx2 as u32); }
-    if inv_test_bit(ebx, 8) { value = set_bit(value, __Feature::bmi2 as u32); }
+    if test_bit(ebx, 3) { value = set_bit(value, __Feature::bmi as u32); }
+    if test_bit(ebx, 5) { value = set_bit(value, __Feature::avx2 as u32); }
+    if test_bit(ebx, 8) { value = set_bit(value, __Feature::bmi2 as u32); }
 
     // CPUID call with EAX=1 => feature bits in ECX and EDX:
-    if inv_test_bit(ecx, 0) { value = set_bit(value, __Feature::sse3 as u32); }
-    if inv_test_bit(ecx, 5) { value = set_bit(value, __Feature::abm as u32); }
-    if inv_test_bit(ecx, 9) { value = set_bit(value, __Feature::ssse3 as u32); }
-    if inv_test_bit(ecx, 12) { value = set_bit(value, __Feature::fma as u32); }
-    if inv_test_bit(ecx, 19) { value = set_bit(value, __Feature::sse4_1 as u32); }
-    if inv_test_bit(ecx, 20) { value = set_bit(value, __Feature::sse4_2 as u32); }
-    if inv_test_bit(ecx, 21) { value = set_bit(value, __Feature::tbm as u32); }
-    if inv_test_bit(ecx, 23) { value = set_bit(value, __Feature::popcnt as u32); }
-    if inv_test_bit(ecx, 28) { value = set_bit(value, __Feature::avx as u32); }
-
-    if inv_test_bit(edx, 25) { value = set_bit(value, __Feature::sse as u32); }
-    if inv_test_bit(edx, 26) { value = set_bit(value, __Feature::sse2 as u32); }
+    if test_bit(ecx, 0) { value = set_bit(value, __Feature::sse3 as u32); }
+    if test_bit(ecx, 5) { value = set_bit(value, __Feature::abm as u32); }
+    if test_bit(ecx, 9) { value = set_bit(value, __Feature::ssse3 as u32); }
+    if test_bit(ecx, 12) { value = set_bit(value, __Feature::fma as u32); }
+    if test_bit(ecx, 19) { value = set_bit(value, __Feature::sse4_1 as u32); }
+    if test_bit(ecx, 20) { value = set_bit(value, __Feature::sse4_2 as u32); }
+    if test_bit(ecx, 21) { value = set_bit(value, __Feature::tbm as u32); }
+    if test_bit(ecx, 23) { value = set_bit(value, __Feature::popcnt as u32); }
+    if test_bit(ecx, 28) { value = set_bit(value, __Feature::avx as u32); }
+
+    if test_bit(edx, 25) { value = set_bit(value, __Feature::sse as u32); }
+    if test_bit(edx, 26) { value = set_bit(value, __Feature::sse2 as u32); }
 
     value
 }
diff --git a/src/x86/sse.rs b/src/x86/sse.rs
@@ -561,7 +561,7 @@ pub unsafe fn _mm_sfence() {
 #[target_feature = "+sse"]
 #[cfg_attr(test, assert_instr(stmxcsr))]
 pub unsafe fn _mm_getcsr() -> u32 {
-    let mut result = 0i32;
+    let mut result = 0_i32;
     stmxcsr((&mut result) as *mut _ as *mut i8);
     result as u32
 }
diff --git a/src/x86/sse2.rs b/src/x86/sse2.rs
@@ -316,8 +316,8 @@ pub unsafe fn _mm_subs_epu16(a: u16x8, b: u16x8) -> u16x8 {
 #[target_feature = "+sse2"]
 #[cfg_attr(test, assert_instr(pslldq, imm8 = 1))]
 pub unsafe fn _mm_slli_si128(a: __m128i, imm8: i32) -> __m128i {
-    let (zero, imm8) = (__m128i::splat(0), imm8 as u32);
     const fn sub(a: u32, b: u32) -> u32 { a - b }
+    let (zero, imm8) = (__m128i::splat(0), imm8 as u32);
     macro_rules! shuffle {
         ($shift:expr) => {
             simd_shuffle16::<__m128i, __m128i>(zero, a, [
@@ -453,8 +453,8 @@ pub unsafe fn _mm_sra_epi32(a: i32x4, count: i32x4) -> i32x4 {
 #[target_feature = "+sse2"]
 #[cfg_attr(test, assert_instr(psrldq, imm8 = 1))]
 pub unsafe fn _mm_srli_si128(a: __m128i, imm8: i32) -> __m128i {
-    let (zero, imm8) = (__m128i::splat(0), imm8 as u32);
     const fn add(a: u32, b: u32) -> u32 { a + b }
+    let (zero, imm8) = (__m128i::splat(0), imm8 as u32);
     macro_rules! shuffle {
         ($shift:expr) => {
             simd_shuffle16::<__m128i, __m128i>(a, zero, [
@@ -1074,10 +1074,9 @@ pub unsafe fn _mm_shuffle_epi32(a: i32x4, imm8: i32) -> i32x4 {
 #[target_feature = "+sse2"]
 #[cfg_attr(test, assert_instr(pshufhw, imm8 = 9))]
 pub unsafe fn _mm_shufflehi_epi16(a: i16x8, imm8: i32) -> i16x8 {
+    const fn add4(x: u32) -> u32 { x + 4 }
     // See _mm_shuffle_epi32.
     let imm8 = (imm8 & 0xFF) as u8;
-    const fn add4(x: u32) -> u32 { x + 4 }
-
     macro_rules! shuffle_done {
         ($x01:expr, $x23:expr, $x45:expr, $x67:expr) => {
             simd_shuffle8(a, a, [
diff --git a/src/x86/sse42.rs b/src/x86/sse42.rs
@@ -5,41 +5,41 @@ use v128::*;
 use x86::__m128i;
 
 /// String contains unsigned 8-bit characters *(Default)*
-pub const _SIDD_UBYTE_OPS: i8 = 0b00000000;
+pub const _SIDD_UBYTE_OPS: i8 = 0b0000_0000;
 /// String contains unsigned 16-bit characters
-pub const _SIDD_UWORD_OPS: i8 = 0b00000001;
+pub const _SIDD_UWORD_OPS: i8 = 0b0000_0001;
 /// String contains signed 8-bit characters
-pub const _SIDD_SBYTE_OPS: i8 = 0b00000010;
+pub const _SIDD_SBYTE_OPS: i8 = 0b0000_0010;
 /// String contains unsigned 16-bit characters
-pub const _SIDD_SWORD_OPS: i8 = 0b00000011;
+pub const _SIDD_SWORD_OPS: i8 = 0b0000_0011;
 
 /// For each character in `a`, find if it is in `b` *(Default)*
-pub const _SIDD_CMP_EQUAL_ANY: i8 = 0b00000000;
+pub const _SIDD_CMP_EQUAL_ANY: i8 = 0b0000_0000;
 /// For each character in `a`, determine if `b[0] <= c <= b[1] or b[1] <= c <= b[2]...`
-pub const _SIDD_CMP_RANGES: i8 = 0b00000100;
+pub const _SIDD_CMP_RANGES: i8 = 0b0000_0100;
 /// The strings defined by `a` and `b` are equal
-pub const _SIDD_CMP_EQUAL_EACH: i8 = 0b00001000;
+pub const _SIDD_CMP_EQUAL_EACH: i8 = 0b0000_1000;
 /// Search for the defined substring in the target
-pub const _SIDD_CMP_EQUAL_ORDERED: i8 = 0b00001100;
+pub const _SIDD_CMP_EQUAL_ORDERED: i8 = 0b0000_1100;
 
 /// Do not negate results *(Default)*
-pub const _SIDD_POSITIVE_POLARITY: i8 = 0b00000000;
+pub const _SIDD_POSITIVE_POLARITY: i8 = 0b0000_0000;
 /// Negate results
-pub const _SIDD_NEGATIVE_POLARITY: i8 = 0b00010000;
+pub const _SIDD_NEGATIVE_POLARITY: i8 = 0b0001_0000;
 /// Do not negate results before the end of the string
-pub const _SIDD_MASKED_POSITIVE_POLARITY: i8 = 0b00100000;
+pub const _SIDD_MASKED_POSITIVE_POLARITY: i8 = 0b0010_0000;
 /// Negate results only before the end of the string
-pub const _SIDD_MASKED_NEGATIVE_POLARITY: i8 = 0b00110000;
+pub const _SIDD_MASKED_NEGATIVE_POLARITY: i8 = 0b0011_0000;
 
 /// **Index only**: return the least significant bit *(Default)*
-pub const _SIDD_LEAST_SIGNIFICANT: i8 = 0b00000000;
+pub const _SIDD_LEAST_SIGNIFICANT: i8 = 0b0000_0000;
 /// **Index only**: return the most significant bit
-pub const _SIDD_MOST_SIGNIFICANT: i8 = 0b01000000;
+pub const _SIDD_MOST_SIGNIFICANT: i8 = 0b0100_0000;
 
 /// **Mask only**: return the bit mask
-pub const _SIDD_BIT_MASK: i8 = 0b00000000;
+pub const _SIDD_BIT_MASK: i8 = 0b0000_0000;
 /// **Mask only**: return the byte mask
-pub const _SIDD_UNIT_MASK: i8 = 0b01000000;
+pub const _SIDD_UNIT_MASK: i8 = 0b0100_0000;
 
 /// Compare packed strings with implicit lengths in `a` and `b` using the
 /// control in `imm8`, and return the generated mask.
diff --git a/src/x86/ssse3.rs b/src/x86/ssse3.rs
@@ -68,6 +68,8 @@ pub unsafe fn _mm_shuffle_epi8(a: u8x16, b: u8x16) -> u8x16 {
 #[target_feature = "+ssse3"]
 #[cfg_attr(test, assert_instr(palignr, n = 15))]
 pub unsafe fn _mm_alignr_epi8(a: i8x16, b: i8x16, n: i32) -> i8x16 {
+    const fn add(a: u32, b: u32) -> u32 { a + b }
+
     let n = n as u32;
     // If palignr is shifting the pair of vectors more than the size of two
     // lanes, emit zero.
@@ -82,7 +84,6 @@ pub unsafe fn _mm_alignr_epi8(a: i8x16, b: i8x16, n: i32) -> i8x16 {
         (a, b, n)
     };
 
-    const fn add(a: u32, b: u32) -> u32 { a + b }
     macro_rules! shuffle {
         ($shift:expr) => {
             simd_shuffle16(b, a, [
diff --git a/tests/cpu-detection.rs b/tests/cpu-detection.rs

Original file line number	Diff line number	Diff line change
`@@ -4,4 +4,3 @@ set -ex`
`4`	`4`
`5`	`5`	`cargo test --target $TARGET`
`6`	`6`	`cargo test --release --target $TARGET`
`7`		`-cargo clippy --all -- -D clippy-pedantic`
Original file line number	Diff line number	Diff line change
`@@ -106,7 +106,7 @@ pub unsafe fn _mm256_shuffle_pd(a: f64x4, b: f64x4, imm8: i32) -> f64x4 {`
`106`	`106`	`}`
`107`	`107`	`}`
`108`	`108`	`}`
`109`		`- match (imm8 >> 0) & 0x1 {`
	`109`	`+ match imm8 & 0x1 {`
`110`	`110`	`0 => shuffle1!(0),`
`111`	`111`	`_ => shuffle1!(1),`
`112`	`112`	`}`
`@@ -806,8 +806,8 @@ pub unsafe fn _mm_permutevar_ps(a: f32x4, b: i32x4) -> f32x4 {`
`806`	`806`	`#[target_feature = "+avx"]`
`807`	`807`	`#[cfg_attr(test, assert_instr(vpermilps, imm8 = 9))]`
`808`	`808`	`pub unsafe fn _mm256_permute_ps(a: f32x8, imm8: i32) -> f32x8 {`
`809`		`- let imm8 = (imm8 & 0xFF) as u8;`
`810`	`809`	`const fn add4(x: u32) -> u32 { x + 4 }`
	`810`	`+ let imm8 = (imm8 & 0xFF) as u8;`
`811`	`811`	`macro_rules! shuffle4 {`
`812`	`812`	`($a:expr, $b:expr, $c:expr, $d:expr) => {`
`813`	`813`	`simd_shuffle8(a, _mm256_undefined_ps(), [`
`@@ -845,7 +845,7 @@ pub unsafe fn _mm256_permute_ps(a: f32x8, imm8: i32) -> f32x8 {`
`845`	`845`	`}`
`846`	`846`	`}`
`847`	`847`	`}`
`848`		`- match (imm8 >> 0) & 0b11 {`
	`848`	`+ match imm8 & 0b11 {`
`849`	`849`	`0b00 => shuffle1!(0),`
`850`	`850`	`0b01 => shuffle1!(1),`
`851`	`851`	`0b10 => shuffle1!(2),`
`@@ -899,7 +899,7 @@ pub unsafe fn _mm_permute_ps(a: f32x4, imm8: i32) -> f32x4 {`
`899`	`899`	`}`
`900`	`900`	`}`
`901`	`901`	`}`
`902`		`- match (imm8 >> 0) & 0b11 {`
	`902`	`+ match imm8 & 0b11 {`
`903`	`903`	`0b00 => shuffle1!(0),`
`904`	`904`	`0b01 => shuffle1!(1),`
`905`	`905`	`0b10 => shuffle1!(2),`
`@@ -959,7 +959,7 @@ pub unsafe fn _mm256_permute_pd(a: f64x4, imm8: i32) -> f64x4 {`
`959`	`959`	`}`
`960`	`960`	`}`
`961`	`961`	`}`
`962`		`- match (imm8 >> 0) & 0x1 {`
	`962`	`+ match imm8 & 0x1 {`
`963`	`963`	`0 => shuffle1!(0),`
`964`	`964`	`_ => shuffle1!(1),`
`965`	`965`	`}`
`@@ -987,7 +987,7 @@ pub unsafe fn _mm_permute_pd(a: f64x2, imm8: i32) -> f64x2 {`
`987`	`987`	`}`
`988`	`988`	`}`
`989`	`989`	`}`
`990`		`- match (imm8 >> 0) & 0x1 {`
	`990`	`+ match imm8 & 0x1 {`
`991`	`991`	`0 => shuffle1!(0),`
`992`	`992`	`_ => shuffle1!(1),`
`993`	`993`	`}`