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AmanieuAmanieu
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Use llvm_asm! instead of asm!
1 parent 78ba5a7 commit ee9bc53

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13 files changed

+85
-85
lines changed

13 files changed

+85
-85
lines changed

‎crates/assert-instr-macro/src/lib.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -139,7 +139,7 @@ pub fn assert_instr(
139139

140140
// Make sure that the shim is not removed by leaking it to unknown
141141
// code:
142-
unsafe { asm!("" : : "r"(#shim_name as usize) : "memory" : "volatile") };
142+
unsafe { llvm_asm!("" : : "r"(#shim_name as usize) : "memory" : "volatile") };
143143

144144
::stdarch_test::assert(#shim_name as usize,
145145
stringify!(#shim_name),

‎crates/core_arch/src/acle/barrier/cp15.rs

+3-3
Original file line numberDiff line numberDiff line change
@@ -8,20 +8,20 @@ pub struct SY;
88
impl super::super::sealed::Dmb for SY {
99
#[inline(always)]
1010
unsafe fn __dmb(&self) {
11-
asm!("mcr p15, 0, r0, c7, c10, 5" : : : "memory" : "volatile")
11+
llvm_asm!("mcr p15, 0, r0, c7, c10, 5" : : : "memory" : "volatile")
1212
}
1313
}
1414

1515
impl super::super::sealed::Dsb for SY {
1616
#[inline(always)]
1717
unsafe fn __dsb(&self) {
18-
asm!("mcr p15, 0, r0, c7, c10, 4" : : : "memory" : "volatile")
18+
llvm_asm!("mcr p15, 0, r0, c7, c10, 4" : : : "memory" : "volatile")
1919
}
2020
}
2121

2222
impl super::super::sealed::Isb for SY {
2323
#[inline(always)]
2424
unsafe fn __isb(&self) {
25-
asm!("mcr p15, 0, r0, c7, c5, 4" : : : "memory" : "volatile")
25+
llvm_asm!("mcr p15, 0, r0, c7, c5, 4" : : : "memory" : "volatile")
2626
}
2727
}

‎crates/core_arch/src/acle/hints.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -85,7 +85,7 @@ pub unsafe fn __yield() {
8585
pub unsafe fn __dbg(imm4: u32) {
8686
macro_rules! call {
8787
($imm4:expr) => {
88-
asm!(concat!("DBG ", stringify!($imm4)) : : : : "volatile")
88+
llvm_asm!(concat!("DBG ", stringify!($imm4)) : : : : "volatile")
8989
}
9090
}
9191

@@ -117,7 +117,7 @@ pub unsafe fn __dbg(imm4: u32) {
117117
/// will increase execution time.
118118
#[inline(always)]
119119
pub unsafe fn __nop() {
120-
asm!("NOP" : : : : "volatile")
120+
llvm_asm!("NOP" : : : : "volatile")
121121
}
122122

123123
extern "C" {

‎crates/core_arch/src/acle/registers/mod.rs

+4-4
Original file line numberDiff line numberDiff line change
@@ -4,7 +4,7 @@ macro_rules! rsr {
44
impl super::super::sealed::Rsr for $R {
55
unsafe fn __rsr(&self) -> u32 {
66
let r: u32;
7-
asm!(concat!("mrs $0,", stringify!($R)) : "=r"(r) : : : "volatile");
7+
llvm_asm!(concat!("mrs $0,", stringify!($R)) : "=r"(r) : : : "volatile");
88
r
99
}
1010
}
@@ -17,7 +17,7 @@ macro_rules! rsrp {
1717
impl super::super::sealed::Rsrp for $R {
1818
unsafe fn __rsrp(&self) -> *const u8 {
1919
let r: *const u8;
20-
asm!(concat!("mrs $0,", stringify!($R)) : "=r"(r) : : : "volatile");
20+
llvm_asm!(concat!("mrs $0,", stringify!($R)) : "=r"(r) : : : "volatile");
2121
r
2222
}
2323
}
@@ -29,7 +29,7 @@ macro_rules! wsr {
2929
($R:ident) => {
3030
impl super::super::sealed::Wsr for $R {
3131
unsafe fn __wsr(&self, value: u32) {
32-
asm!(concat!("msr ", stringify!($R), ",$0") : : "r"(value) : : "volatile");
32+
llvm_asm!(concat!("msr ", stringify!($R), ",$0") : : "r"(value) : : "volatile");
3333
}
3434
}
3535
};
@@ -40,7 +40,7 @@ macro_rules! wsrp {
4040
($R:ident) => {
4141
impl super::super::sealed::Wsrp for $R {
4242
unsafe fn __wsrp(&self, value: *const u8) {
43-
asm!(concat!("msr ", stringify!($R), ",$0") : : "r"(value) : : "volatile");
43+
llvm_asm!(concat!("msr ", stringify!($R), ",$0") : : "r"(value) : : "volatile");
4444
}
4545
}
4646
};

‎crates/core_arch/src/arm/armclang.rs

+2-2
Original file line numberDiff line numberDiff line change
@@ -51,14 +51,14 @@ pub unsafe fn __breakpoint(val: i32) {
5151
#[cfg(target_arch = "arm")]
5252
macro_rules! call {
5353
($imm8:expr) => {
54-
asm!(concat!("BKPT ", stringify!($imm8)) : : : : "volatile")
54+
llvm_asm!(concat!("BKPT ", stringify!($imm8)) : : : : "volatile")
5555
}
5656
}
5757

5858
#[cfg(target_arch = "aarch64")]
5959
macro_rules! call {
6060
($imm8:expr) => {
61-
asm!(concat!("BRK ", stringify!($imm8)) : : : : "volatile")
61+
llvm_asm!(concat!("BRK ", stringify!($imm8)) : : : : "volatile")
6262
}
6363
}
6464

‎crates/core_arch/src/lib.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -9,7 +9,7 @@
99
platform_intrinsics,
1010
repr_simd,
1111
simd_ffi,
12-
asm,
12+
llvm_asm,
1313
proc_macro_hygiene,
1414
stmt_expr_attributes,
1515
core_intrinsics,

‎crates/core_arch/src/x86/bt.rs

+16-16
Original file line numberDiff line numberDiff line change
@@ -7,10 +7,10 @@ use stdarch_test::assert_instr;
77
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
88
pub unsafe fn _bittest(p: *const i32, b: i32) -> u8 {
99
let r: u8;
10-
asm!("btl $2, $1\n\tsetc ${0:b}"
11-
: "=r"(r)
12-
: "*m"(p), "r"(b)
13-
: "cc", "memory");
10+
llvm_asm!("btl $2, $1\n\tsetc ${0:b}"
11+
: "=r"(r)
12+
: "*m"(p), "r"(b)
13+
: "cc", "memory");
1414
r
1515
}
1616

@@ -20,10 +20,10 @@ pub unsafe fn _bittest(p: *const i32, b: i32) -> u8 {
2020
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
2121
pub unsafe fn _bittestandset(p: *mut i32, b: i32) -> u8 {
2222
let r: u8;
23-
asm!("btsl $2, $1\n\tsetc ${0:b}"
24-
: "=r"(r), "+*m"(p)
25-
: "r"(b)
26-
: "cc", "memory");
23+
llvm_asm!("btsl $2, $1\n\tsetc ${0:b}"
24+
: "=r"(r), "+*m"(p)
25+
: "r"(b)
26+
: "cc", "memory");
2727
r
2828
}
2929

@@ -33,10 +33,10 @@ pub unsafe fn _bittestandset(p: *mut i32, b: i32) -> u8 {
3333
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
3434
pub unsafe fn _bittestandreset(p: *mut i32, b: i32) -> u8 {
3535
let r: u8;
36-
asm!("btrl $2, $1\n\tsetc ${0:b}"
37-
: "=r"(r), "+*m"(p)
38-
: "r"(b)
39-
: "cc", "memory");
36+
llvm_asm!("btrl $2, $1\n\tsetc ${0:b}"
37+
: "=r"(r), "+*m"(p)
38+
: "r"(b)
39+
: "cc", "memory");
4040
r
4141
}
4242

@@ -46,10 +46,10 @@ pub unsafe fn _bittestandreset(p: *mut i32, b: i32) -> u8 {
4646
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
4747
pub unsafe fn _bittestandcomplement(p: *mut i32, b: i32) -> u8 {
4848
let r: u8;
49-
asm!("btcl $2, $1\n\tsetc ${0:b}"
50-
: "=r"(r), "+*m"(p)
51-
: "r"(b)
52-
: "cc", "memory");
49+
llvm_asm!("btcl $2, $1\n\tsetc ${0:b}"
50+
: "=r"(r), "+*m"(p)
51+
: "r"(b)
52+
: "cc", "memory");
5353
r
5454
}
5555

‎crates/core_arch/src/x86/cpuid.rs

+31-31
Original file line numberDiff line numberDiff line change
@@ -57,18 +57,18 @@ pub unsafe fn __cpuid_count(leaf: u32, sub_leaf: u32) -> CpuidResult {
5757
let edx;
5858
#[cfg(target_arch = "x86")]
5959
{
60-
asm!("cpuid"
61-
: "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx)
62-
: "{eax}"(leaf), "{ecx}"(sub_leaf)
63-
: :);
60+
llvm_asm!("cpuid"
61+
: "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx)
62+
: "{eax}"(leaf), "{ecx}"(sub_leaf)
63+
: :);
6464
}
6565
#[cfg(target_arch = "x86_64")]
6666
{
6767
// x86-64 uses %rbx as the base register, so preserve it.
68-
asm!("cpuid"
69-
: "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx)
70-
: "{eax}"(leaf), "{ecx}"(sub_leaf)
71-
: "rbx" :);
68+
llvm_asm!("cpuid"
69+
: "={eax}"(eax), "={ebx}"(ebx), "={ecx}"(ecx), "={edx}"(edx)
70+
: "{eax}"(leaf), "{ecx}"(sub_leaf)
71+
: "rbx" :);
7272
}
7373
CpuidResult { eax, ebx, ecx, edx }
7474
}
@@ -113,29 +113,29 @@ pub fn has_cpuid() -> bool {
113113
// If it is, then `cpuid` is available.
114114
let result: u32;
115115
let _temp: u32;
116-
asm!(r#"
117-
# Read eflags into $0 and copy it into $1:
118-
pushfd
119-
pop $0
120-
mov $1, $0
121-
# Flip 21st bit of $0.
122-
xor $0, 0x200000
123-
# Set eflags to the value of $0
124-
#
125-
# Bit 21st can only be modified if cpuid is available
126-
push $0
127-
popfd # A
128-
# Read eflags into $0:
129-
pushfd # B
130-
pop $0
131-
# xor with the original eflags sets the bits that
132-
# have been modified:
133-
xor $0, $1
134-
"#
135-
: "=r"(result), "=r"(_temp)
136-
:
137-
: "cc", "memory"
138-
: "intel");
116+
llvm_asm!(r#"
117+
# Read eflags into $0 and copy it into $1:
118+
pushfd
119+
pop $0
120+
mov $1, $0
121+
# Flip 21st bit of $0.
122+
xor $0, 0x200000
123+
# Set eflags to the value of $0
124+
#
125+
# Bit 21st can only be modified if cpuid is available
126+
push $0
127+
popfd # A
128+
# Read eflags into $0:
129+
pushfd # B
130+
pop $0
131+
# xor with the original eflags sets the bits that
132+
# have been modified:
133+
xor $0, $1
134+
"#
135+
: "=r"(result), "=r"(_temp)
136+
:
137+
: "cc", "memory"
138+
: "intel");
139139
// There is a race between popfd (A) and pushfd (B)
140140
// where other bits beyond 21st may have been modified due to
141141
// interrupts, a debugger stepping through the asm, etc.

‎crates/core_arch/src/x86/eflags.rs

+4-4
Original file line numberDiff line numberDiff line change
@@ -13,7 +13,7 @@
1313
#[doc(hidden)]
1414
pub unsafe fn __readeflags() -> u32 {
1515
let eflags: u32;
16-
asm!("pushfd; popl $0" : "=r"(eflags) : : : "volatile");
16+
llvm_asm!("pushfd; popl $0" : "=r"(eflags) : : : "volatile");
1717
eflags
1818
}
1919

@@ -30,7 +30,7 @@ pub unsafe fn __readeflags() -> u32 {
3030
#[doc(hidden)]
3131
pub unsafe fn __readeflags() -> u64 {
3232
let eflags: u64;
33-
asm!("pushfq; popq $0" : "=r"(eflags) : : : "volatile");
33+
llvm_asm!("pushfq; popq $0" : "=r"(eflags) : : : "volatile");
3434
eflags
3535
}
3636

@@ -46,7 +46,7 @@ pub unsafe fn __readeflags() -> u64 {
4646
)]
4747
#[doc(hidden)]
4848
pub unsafe fn __writeeflags(eflags: u32) {
49-
asm!("pushl $0; popfd" : : "r"(eflags) : "cc", "flags" : "volatile");
49+
llvm_asm!("pushl $0; popfd" : : "r"(eflags) : "cc", "flags" : "volatile");
5050
}
5151

5252
/// Write EFLAGS.
@@ -61,7 +61,7 @@ pub unsafe fn __writeeflags(eflags: u32) {
6161
)]
6262
#[doc(hidden)]
6363
pub unsafe fn __writeeflags(eflags: u64) {
64-
asm!("pushq $0; popfq" : : "r"(eflags) : "cc", "flags" : "volatile");
64+
llvm_asm!("pushq $0; popfq" : : "r"(eflags) : "cc", "flags" : "volatile");
6565
}
6666

6767
#[cfg(test)]

‎crates/core_arch/src/x86/xsave.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -87,7 +87,7 @@ pub unsafe fn _xsetbv(a: u32, val: u64) {
8787
pub unsafe fn _xgetbv(xcr_no: u32) -> u64 {
8888
let eax: u32;
8989
let edx: u32;
90-
asm!("xgetbv" : "={eax}"(eax), "={edx}"(edx) : "{ecx}"(xcr_no));
90+
llvm_asm!("xgetbv" : "={eax}"(eax), "={edx}"(edx) : "{ecx}"(xcr_no));
9191
((edx as u64) << 32) | (eax as u64)
9292
}
9393

‎crates/core_arch/src/x86_64/bt.rs

+16-16
Original file line numberDiff line numberDiff line change
@@ -7,10 +7,10 @@ use stdarch_test::assert_instr;
77
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
88
pub unsafe fn _bittest64(p: *const i64, b: i64) -> u8 {
99
let r: u8;
10-
asm!("btq $2, $1\n\tsetc ${0:b}"
11-
: "=r"(r)
12-
: "*m"(p), "r"(b)
13-
: "cc", "memory");
10+
llvm_asm!("btq $2, $1\n\tsetc ${0:b}"
11+
: "=r"(r)
12+
: "*m"(p), "r"(b)
13+
: "cc", "memory");
1414
r
1515
}
1616

@@ -20,10 +20,10 @@ pub unsafe fn _bittest64(p: *const i64, b: i64) -> u8 {
2020
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
2121
pub unsafe fn _bittestandset64(p: *mut i64, b: i64) -> u8 {
2222
let r: u8;
23-
asm!("btsq $2, $1\n\tsetc ${0:b}"
24-
: "=r"(r), "+*m"(p)
25-
: "r"(b)
26-
: "cc", "memory");
23+
llvm_asm!("btsq $2, $1\n\tsetc ${0:b}"
24+
: "=r"(r), "+*m"(p)
25+
: "r"(b)
26+
: "cc", "memory");
2727
r
2828
}
2929

@@ -33,10 +33,10 @@ pub unsafe fn _bittestandset64(p: *mut i64, b: i64) -> u8 {
3333
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
3434
pub unsafe fn _bittestandreset64(p: *mut i64, b: i64) -> u8 {
3535
let r: u8;
36-
asm!("btrq $2, $1\n\tsetc ${0:b}"
37-
: "=r"(r), "+*m"(p)
38-
: "r"(b)
39-
: "cc", "memory");
36+
llvm_asm!("btrq $2, $1\n\tsetc ${0:b}"
37+
: "=r"(r), "+*m"(p)
38+
: "r"(b)
39+
: "cc", "memory");
4040
r
4141
}
4242

@@ -46,10 +46,10 @@ pub unsafe fn _bittestandreset64(p: *mut i64, b: i64) -> u8 {
4646
#[unstable(feature = "simd_x86_bittest", issue = "59414")]
4747
pub unsafe fn _bittestandcomplement64(p: *mut i64, b: i64) -> u8 {
4848
let r: u8;
49-
asm!("btcq $2, $1\n\tsetc ${0:b}"
50-
: "=r"(r), "+*m"(p)
51-
: "r"(b)
52-
: "cc", "memory");
49+
llvm_asm!("btcq $2, $1\n\tsetc ${0:b}"
50+
: "=r"(r), "+*m"(p)
51+
: "r"(b)
52+
: "cc", "memory");
5353
r
5454
}
5555

‎crates/std_detect/src/detect/os/aarch64.rs

+3-3
Original file line numberDiff line numberDiff line change
@@ -34,7 +34,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
3434
// ID_AA64ISAR0_EL1 - Instruction Set Attribute Register 0
3535
let aa64isar0: u64;
3636
unsafe {
37-
asm!("mrs $0, ID_AA64ISAR0_EL1" : "=r"(aa64isar0));
37+
llvm_asm!("mrs $0, ID_AA64ISAR0_EL1" : "=r"(aa64isar0));
3838
}
3939

4040
let aes = bits_shift(aa64isar0, 7, 4) >= 1;
@@ -50,7 +50,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
5050
// ID_AA64PFR0_EL1 - Processor Feature Register 0
5151
let aa64pfr0: u64;
5252
unsafe {
53-
asm!("mrs $0, ID_AA64PFR0_EL1" : "=r"(aa64pfr0));
53+
llvm_asm!("mrs $0, ID_AA64PFR0_EL1" : "=r"(aa64pfr0));
5454
}
5555

5656
let fp = bits_shift(aa64pfr0, 19, 16) < 0xF;
@@ -73,7 +73,7 @@ pub(crate) fn detect_features() -> cache::Initializer {
7373
// ID_AA64ISAR1_EL1 - Instruction Set Attribute Register 1
7474
let aa64isar1: u64;
7575
unsafe {
76-
asm!("mrs $0, ID_AA64ISAR1_EL1" : "=r"(aa64isar1));
76+
llvm_asm!("mrs $0, ID_AA64ISAR1_EL1" : "=r"(aa64isar1));
7777
}
7878

7979
enable_feature(Feature::rcpc, bits_shift(aa64isar1, 23, 20) >= 1);

‎crates/std_detect/src/lib.rs

+1-1
Original file line numberDiff line numberDiff line change
@@ -16,7 +16,7 @@
1616
#![allow(clippy::shadow_reuse)]
1717
#![deny(clippy::missing_inline_in_public_items)]
1818
#![cfg_attr(target_os = "linux", feature(linkage))]
19-
#![cfg_attr(all(target_os = "freebsd", target_arch = "aarch64"), feature(asm))]
19+
#![cfg_attr(all(target_os = "freebsd", target_arch = "aarch64"), feature(llvm_asm))]
2020
#![cfg_attr(test, allow(unused_imports))]
2121
#![no_std]
2222

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