diff --git a/.github/workflows/release-binaries-all.yml b/.github/workflows/release-binaries-all.yml index d18b9b0b5c2ff..fd4694ebea32d 100644 --- a/.github/workflows/release-binaries-all.yml +++ b/.github/workflows/release-binaries-all.yml @@ -27,6 +27,10 @@ on: required: true default: false type: boolean + secrets: + RELEASE_TASKS_USER_TOKEN: + description: "Secret used to check user permissions." + required: false pull_request: types: diff --git a/.github/workflows/release-binaries.yml b/.github/workflows/release-binaries.yml index a18f64d6bc226..231dd26e54ae0 100644 --- a/.github/workflows/release-binaries.yml +++ b/.github/workflows/release-binaries.yml @@ -133,7 +133,7 @@ jobs: # add extra CMake args to disable them. # See https://github.com/llvm/llvm-project/issues/99767 if [ "$RUNNER_OS" = "macOS" ]; then - target_cmake_flags="$target_cmake_flags -DBOOTSTRAP_COMPILER_RT_ENABLE_IOS=OFF" + target_cmake_flags="$target_cmake_flags -DBOOTSTRAP_BOOTSTRAP_COMPILER_RT_ENABLE_IOS=OFF" if [ "$RUNNER_ARCH" = "ARM64" ]; then arches=arm64 else @@ -144,7 +144,7 @@ jobs: # so we need to disable flang there. target_cmake_flags="$target_cmake_flags -DLLVM_RELEASE_ENABLE_PROJECTS='clang;lld;lldb;clang-tools-extra;polly;mlir'" fi - target_cmake_flags="$target_cmake_flags -DBOOTSTRAP_DARWIN_osx_ARCHS=$arches -DBOOTSTRAP_DARWIN_osx_BUILTIN_ARCHS=$arches" + target_cmake_flags="$target_cmake_flags -DBOOTSTRAP_BOOTSTRAP_DARWIN_osx_ARCHS=$arches -DBOOTSTRAP_BOOTSTRAP_DARWIN_osx_BUILTIN_ARCHS=$arches" fi build_flang="true" diff --git a/clang-tools-extra/docs/ReleaseNotes.rst b/clang-tools-extra/docs/ReleaseNotes.rst index cc5f64a3f9fa3..316ac1743ccb7 100644 --- a/clang-tools-extra/docs/ReleaseNotes.rst +++ b/clang-tools-extra/docs/ReleaseNotes.rst @@ -56,7 +56,8 @@ Improvements to clangd Inlay hints ^^^^^^^^^^^ -- Added `DefaultArguments` Inlay Hints option. +- Added support for inlay hints for default arguments, enabled using the + `DefaultArguments` config option (#GH95712) Diagnostics ^^^^^^^^^^^ @@ -67,21 +68,42 @@ Semantic Highlighting Compile flags ^^^^^^^^^^^^^ +- Fixed a bug where clangd would unnecessarily reparse open files whose + compile command did not change when receiving a new compile command + via an LSP `workspace/configuration` request (#GH115438) + Hover ^^^^^ +- Hovering over a function name now shows the function's documentation + comment even if the comment is written above the function's out-of-line + definition in a different source file (#GH67802) + Code completion ^^^^^^^^^^^^^^^ +- Added an `ArgumentLists` config option under `Completion`. This is a more + flexible version of the `--function-arg-placeholders` command line flag, + allowing users more detailed control of what is inserted in argument list + position when clangd completes the name of a function in a function call + context. (#GH111322) +- Clangd now supports configuring which headers should be inserted using + `<>` vs. `""` syntax using the `QuotedHeaders` and `AngledHeaders` config + options under `Style` (#GH67749) - Added completion for C++20 keywords. +- Improved code completion behaviour in dependent/templated code +- Completion items now include documentation comments in more cases (#GH120099) Code actions ^^^^^^^^^^^^ - Added `Swap operands` tweak for certain binary operators. - - Improved the extract-to-function code action to allow extracting statements with overloaded operators like ``<<`` of ``std::ostream``. +- `Define outline` now handles member functions of class templates, and + member function templates. +- `Extract variable` can now operate on the top-level expression in an + expression statement (#GH112525) Signature help ^^^^^^^^^^^^^^ @@ -89,13 +111,38 @@ Signature help Cross-references ^^^^^^^^^^^^^^^^ +- Clangd now supports the "outgoing calls" direction of call hierarchy + (#GH77556) +- Call hierarchy can now be invoked on fields and namespace-scope + variables (#GH113900) +- Improved heuristics for filtering out generated Protobuf symbol names + during indexing (#GH110091) +- Compiler intrinsics defined in `*intrin.h` system headers are now + indexed even if they have reserved names (#GH119735) +- Various improvements to go-to-definition in templated code + Objective-C ^^^^^^^^^^^ +Clang-tidy integration +^^^^^^^^^^^^^^^^^^^^^^ + +- Improved robustness in handling clang-tidy check names (#GH109421) + +C++20 Modules Support +^^^^^^^^^^^^^^^^^^^^^ + +- Support code completion for symbols defined in modules (#GH110083) +- Improve performance when opening files that import modules (#GH106683) +- Compile commands for modules now respect modifications specified in `.clangd` + files (#GH122606) + Miscellaneous ^^^^^^^^^^^^^ -- The DefineOutline tweak now handles member functions of class templates. +- Fixed an OOM affecting some versions of libcxx headers compiled in C++20 + mode (#GH108866) +- Various other stability improvements, e.g. crash fixes Improvements to clang-doc ------------------------- diff --git a/clang/docs/ClangFormatStyleOptions.rst b/clang/docs/ClangFormatStyleOptions.rst index bbb912eb10e94..4b4c412a13323 100644 --- a/clang/docs/ClangFormatStyleOptions.rst +++ b/clang/docs/ClangFormatStyleOptions.rst @@ -4735,15 +4735,24 @@ the configuration (without a prefix: ``Auto``). .. _Language: **Language** (``LanguageKind``) :versionbadge:`clang-format 3.5` :ref:`ΒΆ ` - Language, this format style is targeted at. + The language that this format style targets. + + .. note:: + + You can specify the language (``C``, ``Cpp``, or ``ObjC``) for ``.h`` + files by adding a ``// clang-format Language:`` line before the first + non-comment (and non-empty) line, e.g. ``// clang-format Language: Cpp``. Possible values: * ``LK_None`` (in configuration: ``None``) Do not use. + * ``LK_C`` (in configuration: ``C``) + Should be used for C. + * ``LK_Cpp`` (in configuration: ``Cpp``) - Should be used for C, C++. + Should be used for C++. * ``LK_CSharp`` (in configuration: ``CSharp``) Should be used for C#. diff --git a/clang/docs/ReleaseNotes.rst b/clang/docs/ReleaseNotes.rst index 153afdb3d59e3..57a567509a068 100644 --- a/clang/docs/ReleaseNotes.rst +++ b/clang/docs/ReleaseNotes.rst @@ -1358,6 +1358,10 @@ clang-format - Adds ``WrapNamespaceBodyWithEmptyLines`` option. - Adds the ``IndentExportBlock`` option. - Adds ``PenaltyBreakBeforeMemberAccess`` option. +- Add the C language instead of treating it like C++. +- Allow specifying the language (C, C++, or Objective-C) for a ``.h`` file by + adding a special comment (e.g. ``// clang-format Language: ObjC``) near the + top of the file. libclang -------- diff --git a/clang/include/clang/Format/Format.h b/clang/include/clang/Format/Format.h index 6f432d1d50315..abab543518222 100644 --- a/clang/include/clang/Format/Format.h +++ b/clang/include/clang/Format/Format.h @@ -3275,7 +3275,9 @@ struct FormatStyle { enum LanguageKind : int8_t { /// Do not use. LK_None, - /// Should be used for C, C++. + /// Should be used for C. + LK_C, + /// Should be used for C++. LK_Cpp, /// Should be used for C#. LK_CSharp, @@ -3300,7 +3302,9 @@ struct FormatStyle { /// https://sci-hub.st/10.1109/IEEESTD.2018.8299595 LK_Verilog }; - bool isCpp() const { return Language == LK_Cpp || Language == LK_ObjC; } + bool isCpp() const { + return Language == LK_Cpp || Language == LK_C || Language == LK_ObjC; + } bool isCSharp() const { return Language == LK_CSharp; } bool isJson() const { return Language == LK_Json; } bool isJavaScript() const { return Language == LK_JavaScript; } @@ -3310,7 +3314,12 @@ struct FormatStyle { } bool isTableGen() const { return Language == LK_TableGen; } - /// Language, this format style is targeted at. + /// The language that this format style targets. + /// \note + /// You can specify the language (``C``, ``Cpp``, or ``ObjC``) for ``.h`` + /// files by adding a ``// clang-format Language:`` line before the first + /// non-comment (and non-empty) line, e.g. ``// clang-format Language: Cpp``. + /// \endnote /// \version 3.5 LanguageKind Language; @@ -5665,6 +5674,8 @@ FormatStyle::LanguageKind guessLanguage(StringRef FileName, StringRef Code); // Returns a string representation of ``Language``. inline StringRef getLanguageName(FormatStyle::LanguageKind Language) { switch (Language) { + case FormatStyle::LK_C: + return "C"; case FormatStyle::LK_Cpp: return "C++"; case FormatStyle::LK_CSharp: diff --git a/clang/lib/Format/Format.cpp b/clang/lib/Format/Format.cpp index f02bf95cfeed7..0bb8545884442 100644 --- a/clang/lib/Format/Format.cpp +++ b/clang/lib/Format/Format.cpp @@ -401,6 +401,7 @@ template <> struct MappingTraits { template <> struct ScalarEnumerationTraits { static void enumeration(IO &IO, FormatStyle::LanguageKind &Value) { + IO.enumCase(Value, "C", FormatStyle::LK_C); IO.enumCase(Value, "Cpp", FormatStyle::LK_Cpp); IO.enumCase(Value, "Java", FormatStyle::LK_Java); IO.enumCase(Value, "JavaScript", FormatStyle::LK_JavaScript); @@ -3952,7 +3953,12 @@ LangOptions getFormattingLangOpts(const FormatStyle &Style) { LangOpts.Digraphs = LexingStd >= FormatStyle::LS_Cpp11; LangOpts.LineComment = 1; - LangOpts.CXXOperatorNames = Style.isCpp(); + + const auto Language = Style.Language; + LangOpts.C17 = Language == FormatStyle::LK_C; + LangOpts.CXXOperatorNames = + Language == FormatStyle::LK_Cpp || Language == FormatStyle::LK_ObjC; + LangOpts.Bool = 1; LangOpts.ObjC = 1; LangOpts.MicrosoftExt = 1; // To get kw___try, kw___finally. @@ -3977,6 +3983,8 @@ const char *StyleOptionHelpDescription = " --style=\"{BasedOnStyle: llvm, IndentWidth: 8}\""; static FormatStyle::LanguageKind getLanguageByFileName(StringRef FileName) { + if (FileName.ends_with(".c")) + return FormatStyle::LK_C; if (FileName.ends_with(".java")) return FormatStyle::LK_Java; if (FileName.ends_with_insensitive(".js") || @@ -4016,6 +4024,35 @@ static FormatStyle::LanguageKind getLanguageByFileName(StringRef FileName) { return FormatStyle::LK_Cpp; } +static FormatStyle::LanguageKind getLanguageByComment(const Environment &Env) { + const auto ID = Env.getFileID(); + const auto &SourceMgr = Env.getSourceManager(); + + LangOptions LangOpts; + LangOpts.CPlusPlus = 1; + LangOpts.LineComment = 1; + + Lexer Lex(ID, SourceMgr.getBufferOrFake(ID), SourceMgr, LangOpts); + Lex.SetCommentRetentionState(true); + + for (Token Tok; !Lex.LexFromRawLexer(Tok) && Tok.is(tok::comment);) { + auto Text = StringRef(SourceMgr.getCharacterData(Tok.getLocation()), + Tok.getLength()); + if (!Text.consume_front("// clang-format Language:")) + continue; + + Text = Text.trim(); + if (Text == "C") + return FormatStyle::LK_C; + if (Text == "Cpp") + return FormatStyle::LK_Cpp; + if (Text == "ObjC") + return FormatStyle::LK_ObjC; + } + + return FormatStyle::LK_None; +} + FormatStyle::LanguageKind guessLanguage(StringRef FileName, StringRef Code) { const auto GuessedLanguage = getLanguageByFileName(FileName); if (GuessedLanguage == FormatStyle::LK_Cpp) { @@ -4025,6 +4062,10 @@ FormatStyle::LanguageKind guessLanguage(StringRef FileName, StringRef Code) { if (!Code.empty() && (Extension.empty() || Extension == ".h")) { auto NonEmptyFileName = FileName.empty() ? "guess.h" : FileName; Environment Env(Code, NonEmptyFileName, /*Ranges=*/{}); + if (const auto Language = getLanguageByComment(Env); + Language != FormatStyle::LK_None) { + return Language; + } ObjCHeaderStyleGuesser Guesser(Env, getLLVMStyle()); Guesser.process(); if (Guesser.isObjC()) diff --git a/clang/lib/Format/FormatToken.cpp b/clang/lib/Format/FormatToken.cpp index 963e8f87793fa..60e428123d26d 100644 --- a/clang/lib/Format/FormatToken.cpp +++ b/clang/lib/Format/FormatToken.cpp @@ -42,11 +42,11 @@ static SmallVector CppNonKeywordTypes = { }; bool FormatToken::isTypeName(const LangOptions &LangOpts) const { - const bool IsCpp = LangOpts.CXXOperatorNames; - return is(TT_TypeName) || Tok.isSimpleTypeSpecifier(LangOpts) || - (IsCpp && is(tok::identifier) && - std::binary_search(CppNonKeywordTypes.begin(), - CppNonKeywordTypes.end(), TokenText)); + if (is(TT_TypeName) || Tok.isSimpleTypeSpecifier(LangOpts)) + return true; + return (LangOpts.CXXOperatorNames || LangOpts.C17) && is(tok::identifier) && + std::binary_search(CppNonKeywordTypes.begin(), + CppNonKeywordTypes.end(), TokenText); } bool FormatToken::isTypeOrIdentifier(const LangOptions &LangOpts) const { diff --git a/clang/lib/Format/FormatToken.h b/clang/lib/Format/FormatToken.h index 29aba281ae103..02429970599c0 100644 --- a/clang/lib/Format/FormatToken.h +++ b/clang/lib/Format/FormatToken.h @@ -743,29 +743,6 @@ struct FormatToken { return isOneOf(tok::star, tok::amp, tok::ampamp); } - bool isCppAlternativeOperatorKeyword() const { - assert(!TokenText.empty()); - if (!isalpha(TokenText[0])) - return false; - - switch (Tok.getKind()) { - case tok::ampamp: - case tok::ampequal: - case tok::amp: - case tok::pipe: - case tok::tilde: - case tok::exclaim: - case tok::exclaimequal: - case tok::pipepipe: - case tok::pipeequal: - case tok::caret: - case tok::caretequal: - return true; - default: - return false; - } - } - bool isUnaryOperator() const { switch (Tok.getKind()) { case tok::plus: diff --git a/clang/lib/Format/TokenAnnotator.cpp b/clang/lib/Format/TokenAnnotator.cpp index ac5b25d52ce84..976c4d888e1fd 100644 --- a/clang/lib/Format/TokenAnnotator.cpp +++ b/clang/lib/Format/TokenAnnotator.cpp @@ -129,7 +129,7 @@ class AnnotatingParser { : Style(Style), Line(Line), CurrentToken(Line.First), AutoFound(false), IsCpp(Style.isCpp()), LangOpts(getFormattingLangOpts(Style)), Keywords(Keywords), Scopes(Scopes), TemplateDeclarationDepth(0) { - assert(IsCpp == LangOpts.CXXOperatorNames); + assert(IsCpp == (LangOpts.CXXOperatorNames || LangOpts.C17)); Contexts.push_back(Context(tok::unknown, 1, /*IsExpression=*/false)); resetTokenMetadata(); } @@ -3820,7 +3820,7 @@ static bool isFunctionDeclarationName(const LangOptions &LangOpts, }; const auto *Next = Current.Next; - const bool IsCpp = LangOpts.CXXOperatorNames; + const bool IsCpp = LangOpts.CXXOperatorNames || LangOpts.C17; // Find parentheses of parameter list. if (Current.is(tok::kw_operator)) { diff --git a/clang/lib/Format/TokenAnnotator.h b/clang/lib/Format/TokenAnnotator.h index 6aea310a56d69..c0c13941ef4f7 100644 --- a/clang/lib/Format/TokenAnnotator.h +++ b/clang/lib/Format/TokenAnnotator.h @@ -225,7 +225,7 @@ class TokenAnnotator { TokenAnnotator(const FormatStyle &Style, const AdditionalKeywords &Keywords) : Style(Style), IsCpp(Style.isCpp()), LangOpts(getFormattingLangOpts(Style)), Keywords(Keywords) { - assert(IsCpp == LangOpts.CXXOperatorNames); + assert(IsCpp == (LangOpts.CXXOperatorNames || LangOpts.C17)); } /// Adapts the indent levels of comment lines to the indent of the diff --git a/clang/lib/Format/UnwrappedLineParser.cpp b/clang/lib/Format/UnwrappedLineParser.cpp index 1411197e32554..9b4257fdd8c8f 100644 --- a/clang/lib/Format/UnwrappedLineParser.cpp +++ b/clang/lib/Format/UnwrappedLineParser.cpp @@ -168,7 +168,7 @@ UnwrappedLineParser::UnwrappedLineParser( : IG_Inited), IncludeGuardToken(nullptr), FirstStartColumn(FirstStartColumn), Macros(Style.Macros, SourceMgr, Style, Allocator, IdentTable) { - assert(IsCpp == LangOpts.CXXOperatorNames); + assert(IsCpp == (LangOpts.CXXOperatorNames || LangOpts.C17)); } void UnwrappedLineParser::reset() { @@ -1712,12 +1712,6 @@ void UnwrappedLineParser::parseStructuralElement( OpeningBrace && OpeningBrace->isOneOf(TT_RequiresExpressionLBrace, TT_CompoundRequirementLBrace); !eof();) { - if (IsCpp && FormatTok->isCppAlternativeOperatorKeyword()) { - if (auto *Next = Tokens->peekNextToken(/*SkipComment=*/true); - Next && Next->isBinaryOperator()) { - FormatTok->Tok.setKind(tok::identifier); - } - } const FormatToken *Previous = FormatTok->Previous; switch (FormatTok->Tok.getKind()) { case tok::at: diff --git a/clang/unittests/Format/FormatTest.cpp b/clang/unittests/Format/FormatTest.cpp index 3b7856d6ee150..d1e96e0fa544a 100644 --- a/clang/unittests/Format/FormatTest.cpp +++ b/clang/unittests/Format/FormatTest.cpp @@ -17784,9 +17784,11 @@ TEST_F(FormatTest, ConfigurableSpaceBeforeAssignmentOperators) { verifyFormat("int a = 5;"); verifyFormat("a += 42;"); verifyFormat("a or_eq 8;"); - verifyFormat("xor = foo;"); - FormatStyle Spaces = getLLVMStyle(); + auto Spaces = getLLVMStyle(FormatStyle::LK_C); + verifyFormat("xor = foo;", Spaces); + + Spaces.Language = FormatStyle::LK_Cpp; Spaces.SpaceBeforeAssignmentOperators = false; verifyFormat("int a= 5;", Spaces); verifyFormat("a+= 42;", Spaces); @@ -24683,6 +24685,7 @@ TEST_F(FormatTest, StructuredBindings) { } TEST_F(FormatTest, FileAndCode) { + EXPECT_EQ(FormatStyle::LK_C, guessLanguage("foo.c", "")); EXPECT_EQ(FormatStyle::LK_Cpp, guessLanguage("foo.cc", "")); EXPECT_EQ(FormatStyle::LK_ObjC, guessLanguage("foo.m", "")); EXPECT_EQ(FormatStyle::LK_ObjC, guessLanguage("foo.mm", "")); @@ -24848,6 +24851,18 @@ TEST_F(FormatTest, GuessLanguageWithChildLines) { guessLanguage("foo.h", "#define FOO ({ foo(); ({ NSString *s; }) })")); } +TEST_F(FormatTest, GetLanguageByComment) { + EXPECT_EQ(FormatStyle::LK_C, + guessLanguage("foo.h", "// clang-format Language: C\n" + "int i;")); + EXPECT_EQ(FormatStyle::LK_Cpp, + guessLanguage("foo.h", "// clang-format Language: Cpp\n" + "int DoStuff(CGRect rect);")); + EXPECT_EQ(FormatStyle::LK_ObjC, + guessLanguage("foo.h", "// clang-format Language: ObjC\n" + "int i;")); +} + TEST_F(FormatTest, TypenameMacros) { std::vector TypenameMacros = {"STACK_OF", "LIST", "TAILQ_ENTRY"}; diff --git a/clang/unittests/Format/TokenAnnotatorTest.cpp b/clang/unittests/Format/TokenAnnotatorTest.cpp index dffb07c89bacc..f1a6999cfdfb8 100644 --- a/clang/unittests/Format/TokenAnnotatorTest.cpp +++ b/clang/unittests/Format/TokenAnnotatorTest.cpp @@ -3646,6 +3646,11 @@ TEST_F(TokenAnnotatorTest, CppAltOperatorKeywords) { ASSERT_EQ(Tokens.size(), 7u) << Tokens; EXPECT_TOKEN(Tokens[3], tok::pipepipe, TT_BinaryOperator); + Tokens = annotate("return segment < *this or *this < segment;"); + ASSERT_EQ(Tokens.size(), 12u) << Tokens; + EXPECT_TOKEN(Tokens[5], tok::pipepipe, TT_BinaryOperator); + EXPECT_TOKEN(Tokens[6], tok::star, TT_UnaryOperator); + Tokens = annotate("a = b or_eq c;"); ASSERT_EQ(Tokens.size(), 7u) << Tokens; EXPECT_TOKEN(Tokens[3], tok::pipeequal, TT_BinaryOperator); @@ -3658,11 +3663,13 @@ TEST_F(TokenAnnotatorTest, CppAltOperatorKeywords) { ASSERT_EQ(Tokens.size(), 7u) << Tokens; EXPECT_TOKEN(Tokens[3], tok::caretequal, TT_BinaryOperator); - Tokens = annotate("xor = foo;"); + const auto StyleC = getLLVMStyle(FormatStyle::LK_C); + + Tokens = annotate("xor = foo;", StyleC); ASSERT_EQ(Tokens.size(), 5u) << Tokens; EXPECT_TOKEN(Tokens[0], tok::identifier, TT_Unknown); - Tokens = annotate("int xor = foo;"); + Tokens = annotate("int xor = foo;", StyleC); ASSERT_EQ(Tokens.size(), 6u) << Tokens; EXPECT_TOKEN(Tokens[1], tok::identifier, TT_StartOfName); } diff --git a/cmake/Modules/LLVMVersion.cmake b/cmake/Modules/LLVMVersion.cmake index b537808437e98..0eac2aa2e93d6 100644 --- a/cmake/Modules/LLVMVersion.cmake +++ b/cmake/Modules/LLVMVersion.cmake @@ -10,6 +10,6 @@ if(NOT DEFINED LLVM_VERSION_PATCH) set(LLVM_VERSION_PATCH 0) endif() if(NOT DEFINED LLVM_VERSION_SUFFIX) - set(LLVM_VERSION_SUFFIX -rc3-systems) + set(LLVM_VERSION_SUFFIX -systems) endif() diff --git a/llvm/lib/Target/SystemS/CMakeLists.txt b/llvm/lib/Target/SystemS/CMakeLists.txt index 359b3c918e0e7..7749b31564f55 100644 --- a/llvm/lib/Target/SystemS/CMakeLists.txt +++ b/llvm/lib/Target/SystemS/CMakeLists.txt @@ -1,18 +1,38 @@ add_llvm_component_group(SystemS) +set(LLVM_TARGET_DEFINITIONS SystemS.td) +tablegen(LLVM SystemSGenRegisterInfo.inc -gen-register-info) +tablegen(LLVM SystemSGenInstrInfo.inc -gen-instr-info) +tablegen(LLVM SystemSGenSubtargetInfo.inc -gen-subtarget) +tablegen(LLVM SystemSGenMCPseudoLowering.inc -gen-pseudo-lowering) +tablegen(LLVM SystemSGenDAGISel.inc -gen-dag-isel) +tablegen(LLVM SystemSGenCallingConv.inc -gen-callingconv) +tablegen(LLVM SystemSGenAsmWriter.inc -gen-asm-writer) +add_public_tablegen_target(SystemSCommonTableGen) + add_llvm_target(SystemSCodeGen SystemSTargetMachine.cpp - + SystemSRegisterInfo.cpp + SystemSInstrInfo.cpp + SystemSSubtarget.cpp + SystemSAsmPrinter.cpp + SystemSISelDagToDag.cpp + SystemSISelLowering.cpp + SystemSMCInstLower.cpp + LINK_COMPONENTS CodeGen Core Support Target SystemSInfo + AsmPrinter + SelectionDAG ADD_TO_COMPONENT SystemS ) + add_subdirectory(MCTargetDesc) add_subdirectory(TargetInfo) \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/MCTargetDesc/CMakeLists.txt b/llvm/lib/Target/SystemS/MCTargetDesc/CMakeLists.txt index 5d6ddcb99e863..da8b94eb649a8 100644 --- a/llvm/lib/Target/SystemS/MCTargetDesc/CMakeLists.txt +++ b/llvm/lib/Target/SystemS/MCTargetDesc/CMakeLists.txt @@ -1,5 +1,7 @@ add_llvm_component_library(LLVMSystemSDesc SystemSMCTargetDesc.cpp + SystemSMCAsmInfo.cpp + SystemSInstPrinter.cpp LINK_COMPONENTS MC diff --git a/llvm/lib/Target/SystemS/MCTargetDesc/SystemSInfo.h b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSInfo.h new file mode 100644 index 0000000000000..3bcbf8b266f14 --- /dev/null +++ b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSInfo.h @@ -0,0 +1,18 @@ +#ifndef LLVM_LIB_TARGET_SYSTEMS_MCTARGETDESC_SYSTEMSINFO_H +#define LLVM_LIB_TARGET_SYSTEMS_MCTARGETDESC_SYSTEMSINFO_H + +#include "llvm/MC/MCInstrDesc.h" + +namespace llvm { + +namespace SystemSOp { + +enum OperandType : unsigned { + OPERAND_SYSTEMSM16 = MCOI::OPERAND_FIRST_TARGET, +}; + +} // namespace SystemSOp + +} // end namespace llvm + +#endif \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/MCTargetDesc/SystemSInstPrinter.cpp b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSInstPrinter.cpp new file mode 100644 index 0000000000000..7e6857d0d5a84 --- /dev/null +++ b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSInstPrinter.cpp @@ -0,0 +1,44 @@ +#include "SystemSInstPrinter.h" + +#include "llvm/ADT/StringExtras.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCSymbol.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" + +using namespace llvm; + +#define DEBUG_TYPE "SystemS-asm-printer" +#include "SystemSGenAsmWriter.inc" + +void SystemSInstPrinter::printRegName(raw_ostream &O, MCRegister Reg) { + O << getRegisterName(Reg); +} + +void SystemSInstPrinter::printInst(const MCInst *MI, uint64_t Address, + StringRef Annot, const MCSubtargetInfo &STI, + raw_ostream &O) { + printInstruction(MI, Address, O); + printAnnotation(O, Annot); +} + +void SystemSInstPrinter::printOperand(const MCInst *MI, int OpNo, + raw_ostream &O) { + const MCOperand &MO = MI->getOperand(OpNo); + + if (MO.isReg()) { + printRegName(O, MO.getReg()); + return; + } + + if (MO.isImm()) { + O << MO.getImm(); + return; + } + + assert(MO.isExpr() && "Unknown operand kind in printOperand"); + MO.getExpr()->print(O, &MAI); +} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/MCTargetDesc/SystemSInstPrinter.h b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSInstPrinter.h new file mode 100644 index 0000000000000..70f420f6d86cd --- /dev/null +++ b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSInstPrinter.h @@ -0,0 +1,31 @@ +#ifndef LLVM_LIB_TARGET_SYSTEMS_INSTPRINTER_SYSTEMSINSTPRINTER_H +#define LLVM_LIB_TARGET_SYSTEMS_INSTPRINTER_SYSTEMSINSTPRINTER_H + +#include "llvm/MC/MCInstPrinter.h" +#include "llvm/MC/MCRegister.h" + +namespace llvm { + +class SystemSInstPrinter : public MCInstPrinter { +public: /* Constructors and destructures */ + SystemSInstPrinter(const MCAsmInfo &MAI, const MCInstrInfo &MII, + const MCRegisterInfo &MRI) + : MCInstPrinter(MAI, MII, MRI) {} + +public: /* Public interface */ + std::pair + getMnemonic(const MCInst &MI) const override; + static const char *getRegisterName(MCRegister Reg); + + void printRegName(raw_ostream &O, MCRegister Reg) override; + void printInst(const MCInst *MI, uint64_t Address, StringRef Annot, + const MCSubtargetInfo &STI, raw_ostream &O) override; + + void printInstruction(const MCInst *MI, uint64_t Address, raw_ostream &O); + void printOperand(const MCInst *MI, int OpNo, raw_ostream &OS); + static void printOperand(const MCOperand &MO, raw_ostream &O); +}; + +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_SYSTEMS_INSTPRINTER_SYSTEMSINSTPRINTER_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCAsmInfo.cpp b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCAsmInfo.cpp new file mode 100644 index 0000000000000..f8e2fb751282e --- /dev/null +++ b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCAsmInfo.cpp @@ -0,0 +1,22 @@ +#include "SystemS.h" +#include "SystemSMCAsmInfo.h" + +using namespace llvm; + +SystemSELFMCAsmInfo::SystemSELFMCAsmInfo(const Triple &TT) { + SupportsDebugInformation = false; + + Data16bitsDirective = "\t.short\t"; + Data32bitsDirective = "\t.word\t"; + Data64bitsDirective = nullptr; + + ZeroDirective = "\t.space\t"; + + CommentString = ";"; + UsesELFSectionDirectiveForBSS = false; + AllowAtInName = true; + HiddenVisibilityAttr = MCSA_Invalid; + HiddenDeclarationVisibilityAttr = MCSA_Invalid; + ProtectedVisibilityAttr = MCSA_Invalid; + ExceptionsType = ExceptionHandling::None; +} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCAsmInfo.h b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCAsmInfo.h new file mode 100644 index 0000000000000..d951a4c462a5b --- /dev/null +++ b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCAsmInfo.h @@ -0,0 +1,17 @@ +#ifndef LLVM_LIB_TARGET_SYSTEMS_MCTARGETDESC_SYSTEMSMCASMINFO_H +#define LLVM_LIB_TARGET_SYSTEMS_MCTARGETDESC_SYSTEMSMCASMINFO_H + +#include "llvm/MC/MCAsmInfoELF.h" + +namespace llvm { + +class Triple; + +class SystemSELFMCAsmInfo : public MCAsmInfoELF { +public: /* Constructors and destructures */ + explicit SystemSELFMCAsmInfo(const Triple &TheTriple); +}; + +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_SYSTEMS_MCTARGETDESC_SYSTEMSMCASMINFO_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCTargetDesc.cpp b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCTargetDesc.cpp index 8ba4bf486d48e..2286ab764249d 100644 --- a/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCTargetDesc.cpp +++ b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCTargetDesc.cpp @@ -1,3 +1,83 @@ #include "SystemSMCTargetDesc.h" +#include "SystemSInfo.h" +#include "SystemSInstPrinter.h" +#include "SystemSMCAsmInfo.h" +#include "SystemSMCTargetDesc.h" + +#include "TargetInfo/SystemSTargetInfo.h" + +#include "llvm/MC/MCDwarf.h" +#include "llvm/MC/MCInstrInfo.h" +#include "llvm/MC/MCRegisterInfo.h" +#include "llvm/MC/MCSubtargetInfo.h" +#include "llvm/MC/TargetRegistry.h" + +using namespace llvm; + +#define GET_REGINFO_MC_DESC +#include "SystemSGenRegisterInfo.inc" + +#define GET_INSTRINFO_MC_DESC +#include "SystemSGenInstrInfo.inc" + +#define GET_SUBTARGETINFO_MC_DESC +#include "SystemSGenSubtargetInfo.inc" + +namespace { + +MCRegisterInfo *createSystemSMCRegisterInfo(const Triple &TT) { + MCRegisterInfo *X = new MCRegisterInfo(); + + InitSystemSMCRegisterInfo(X, SystemS::R0); + + return X; +} + +MCInstrInfo *createSystemSMCInstrInfo() { + MCInstrInfo *X = new MCInstrInfo(); + + InitSystemSMCInstrInfo(X); + + return X; +} + +MCSubtargetInfo *createSystemSMCSubtargetInfo(const Triple &TT, StringRef CPU, + StringRef FS) { + return createSystemSMCSubtargetInfoImpl(TT, CPU, /*TuneCPU*/ CPU, FS); +} + +MCAsmInfo *createSystemSMCAsmInfo(const MCRegisterInfo &MRI, const Triple &TT, + const MCTargetOptions &Options) { + + MCAsmInfo *MAI = new SystemSELFMCAsmInfo(TT); + unsigned SP = MRI.getDwarfRegNum(SystemS::R1, true); + MCCFIInstruction Inst = MCCFIInstruction::cfiDefCfa(nullptr, SP, 0); + MAI->addInitialFrameState(Inst); + + return MAI; +} + +MCInstPrinter *createSystemSMCInstPrinter(const Triple &T, + unsigned SyntaxVariant, + const MCAsmInfo &MAI, + const MCInstrInfo &MII, + const MCRegisterInfo &MRI) { + return new SystemSInstPrinter(MAI, MII, MRI); +} + +} // namespace + +extern "C" void LLVMInitializeSystemSTargetMC() { + Target &TheSystemSTarget = getTheSystemSTarget(); + + RegisterMCAsmInfoFn X(TheSystemSTarget, createSystemSMCAsmInfo); -extern "C" void LLVMInitializeSystemSTargetMC() {} \ No newline at end of file + TargetRegistry::RegisterMCRegInfo(TheSystemSTarget, + createSystemSMCRegisterInfo); + TargetRegistry::RegisterMCInstrInfo(TheSystemSTarget, + createSystemSMCInstrInfo); + TargetRegistry::RegisterMCSubtargetInfo(TheSystemSTarget, + createSystemSMCSubtargetInfo); + TargetRegistry::RegisterMCInstPrinter(TheSystemSTarget, + createSystemSMCInstPrinter); +} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCTargetDesc.h b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCTargetDesc.h index fb1617317c72e..be9179e7ff7f3 100644 --- a/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCTargetDesc.h +++ b/llvm/lib/Target/SystemS/MCTargetDesc/SystemSMCTargetDesc.h @@ -1,4 +1,10 @@ #ifndef LLVM_LIB_TARGET_SYSTEMS_MCTARGETDESC_SYSTEMSMCTARGETDESC_H #define LLVM_LIB_TARGET_SYSTEMS_MCTARGETDESC_SYSTEMSMCTARGETDESC_H +#define GET_REGINFO_ENUM +#include "SystemSGenRegisterInfo.inc" + +#define GET_INSTRINFO_ENUM +#include "SystemSGenInstrInfo.inc" + #endif // LLVM_LIB_TARGET_SYSTEMS_MCTARGETDESC_SYSTEMSMCTARGETDESC_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemS.h b/llvm/lib/Target/SystemS/SystemS.h new file mode 100644 index 0000000000000..0f3aaef572d0e --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemS.h @@ -0,0 +1,32 @@ +#ifndef LLVM_LIB_TARGET_SYSTEMS_SYSTEMS_H +#define LLVM_LIB_TARGET_SYSTEMS_SYSTEMS_H + +#include "MCTargetDesc/SystemSMCTargetDesc.h" + +#include "llvm/Target/TargetMachine.h" + +namespace llvm { + +class SystemSTargetMachine; +class FunctionPass; +class SystemSSubtarget; +class AsmPrinter; +class InstructionSelector; +class MCInst; +class MCOperand; +class MachineInstr; +class MachineOperand; +class PassRegistry; + +bool lowerSystemSMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI, + AsmPrinter &AP); +bool LowerSystemSMachineOperandToMCOperand(const MachineOperand &MO, + MCOperand &MCOp, + const AsmPrinter &AP); + +FunctionPass *createSystemSISelDag(SystemSTargetMachine &TM, + CodeGenOptLevel OptLevel); + +} // namespace llvm + +#endif // LLVM_LIB_TARGET_SYSTEMS_SYSTEMS_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemS.td b/llvm/lib/Target/SystemS/SystemS.td new file mode 100644 index 0000000000000..cdc212713c80c --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemS.td @@ -0,0 +1,15 @@ +include "llvm/Target/Target.td" + +include "SystemSRegisterInfo.td" +include "SystemSInstrInfo.td" +include "SystemSCallingConv.td" + +class Proc Features> + : Processor; + +def : Proc<"generic", []>; + +def SystemSInstrInfo : InstrInfo; +def SystemS : Target { + let InstructionSet = SystemSInstrInfo; +} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSAsmPrinter.cpp b/llvm/lib/Target/SystemS/SystemSAsmPrinter.cpp new file mode 100644 index 0000000000000..542735f5a522f --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSAsmPrinter.cpp @@ -0,0 +1,58 @@ +#include "SystemS.h" +#include "TargetInfo/SystemSTargetInfo.h" + +#include "llvm/ADT/Statistic.h" +#include "llvm/CodeGen/AsmPrinter.h" +#include "llvm/CodeGen/MachineInstr.h" +#include "llvm/CodeGen/MachineModuleInfo.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCInst.h" +#include "llvm/MC/MCStreamer.h" +#include "llvm/MC/TargetRegistry.h" +#include "llvm/Support/ErrorHandling.h" + +using namespace llvm; + +#define DEBUG_TYPE "SystemS-asm-printer" + +namespace { + +class SystemSAsmPrinter : public AsmPrinter { + const MCSubtargetInfo *STI; + +public: + explicit SystemSAsmPrinter(TargetMachine &TM, + std::unique_ptr Streamer) + : AsmPrinter(TM, std::move(Streamer)), STI(TM.getMCSubtargetInfo()) {} + + StringRef getPassName() const override { return "SystemS Assembly Printer"; } + + void emitInstruction(const MachineInstr *MI) override; + bool lowerPseudoInstExpansion(const MachineInstr *MI, MCInst &Inst); + bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const; +}; + +} // end anonymous namespace + +#include "SystemSGenMCPseudoLowering.inc" + +void SystemSAsmPrinter::emitInstruction(const MachineInstr *MI) { + if (MCInst OutInst; lowerPseudoInstExpansion(MI, OutInst)) { + EmitToStreamer(*OutStreamer, OutInst); + return; + } + + MCInst TmpInst; + if (!lowerSystemSMachineInstrToMCInst(MI, TmpInst, *this)) { + EmitToStreamer(*OutStreamer, TmpInst); + } +} + +bool SystemSAsmPrinter::lowerOperand(const MachineOperand &MO, + MCOperand &MCOp) const { + return LowerSystemSMachineOperandToMCOperand(MO, MCOp, *this); +} + +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemSAsmPrinter() { + RegisterAsmPrinter X(getTheSystemSTarget()); +} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSCallingConv.td b/llvm/lib/Target/SystemS/SystemSCallingConv.td new file mode 100644 index 0000000000000..2d82bbc636e2c --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSCallingConv.td @@ -0,0 +1,30 @@ +//===----------------------------------------------------------------------===// +// SystemS Return Value Calling Convention +//===----------------------------------------------------------------------===// +def RetCC_SystemS : CallingConv<[ + // i32 return values + CCIfType<[i32, i64], CCAssignToReg<[R9, R10, R11, R12]>>, + + // Integer values get stored in stack slots that are 4 bytes in + // size and 4-byte aligned. + CCIfType<[i64], CCAssignToStack<8, 4>>, + CCIfType<[i32], CCAssignToStack<4, 4>> +]>; + +//===----------------------------------------------------------------------===// +// SystemS Argument Calling Conventions +//===----------------------------------------------------------------------===// +def CC_SystemS : CallingConv<[ + // Promote i8/i16 arguments to i32. + CCIfType<[i8, i16], CCPromoteToType>, + + // The first 4 integer arguments are passed in integer registers. + CCIfType<[i32, i64], CCAssignToReg<[R9, R10, R11, R12]>>, + + // Integer values get stored in stack slots that are 4 bytes in + // size and 4-byte aligned. + CCIfType<[i64], CCAssignToStack<8, 4>>, + CCIfType<[i32], CCAssignToStack<4, 4>> +]>; + +def CSR_SystemS : CalleeSavedRegs<(add R0, R1, R3, R5, R6, R7, R8)>; \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSFrameLowering.h b/llvm/lib/Target/SystemS/SystemSFrameLowering.h new file mode 100644 index 0000000000000..1c69c02235371 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSFrameLowering.h @@ -0,0 +1,33 @@ + +#ifndef LLVM_LIB_TARGET_SYSTEMS_SYSTEMSFRAMELOWERING_H +#define LLVM_LIB_TARGET_SYSTEMS_SYSTEMSFRAMELOWERING_H + +#include "llvm/CodeGen/TargetFrameLowering.h" + +namespace llvm { + +class SystemSSubtarget; + +class SystemSFrameLowering : public TargetFrameLowering { +public: /* Constructors and destructors */ + explicit SystemSFrameLowering(const SystemSSubtarget &STI) + : TargetFrameLowering(TargetFrameLowering::StackGrowsDown, Align(4), 0), + STI(STI) {} + +public: /* Public interface */ + void emitPrologue(MachineFunction &MF, + MachineBasicBlock &MBB) const override {} + + void emitEpilogue(MachineFunction &MF, + MachineBasicBlock &MBB) const override {} + + bool hasFPImpl(const MachineFunction &MF) const override { return false; } + +private: /* Private data */ + [[maybe_unused]] + const SystemSSubtarget &STI; +}; + +} // namespace llvm + +#endif // LLVM_LIB_TARGET_SYSTEMS_SYSTEMSFRAMELOWERING_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSISelDagToDag.cpp b/llvm/lib/Target/SystemS/SystemSISelDagToDag.cpp new file mode 100644 index 0000000000000..beda7ac2d710a --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSISelDagToDag.cpp @@ -0,0 +1,77 @@ +#include "MCTargetDesc/SystemSMCTargetDesc.h" +#include "SystemS.h" +#include "SystemSISelLowering.h" +#include "SystemSTargetMachine.h" + +#include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/SelectionDAGISel.h" +#include "llvm/CodeGen/TargetLowering.h" +#include "llvm/IR/CallingConv.h" +#include "llvm/IR/Constants.h" +#include "llvm/IR/DerivedTypes.h" +#include "llvm/IR/Function.h" +#include "llvm/IR/Intrinsics.h" +#include "llvm/IR/LLVMContext.h" +#include "llvm/Support/Compiler.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" + +using namespace llvm; + +#define DEBUG_TYPE "SystemS-isel" + +namespace { + +class SystemSDAGToDAGISel : public SelectionDAGISel { +public: + [[maybe_unused]] + static char ID; + + SystemSDAGToDAGISel() = delete; + explicit SystemSDAGToDAGISel(SystemSTargetMachine &TM, + CodeGenOptLevel OptLevel) + : SelectionDAGISel(TM, OptLevel) {} + + bool runOnMachineFunction(MachineFunction &MF) override { + return SelectionDAGISel::runOnMachineFunction(MF); + } + + void Select(SDNode *N) override; + +#include "SystemSGenDAGISel.inc" +}; + +class SystemSDAGToDAGISelLegacy : public SelectionDAGISelLegacy { +public: + static char ID; + + SystemSDAGToDAGISelLegacy(SystemSTargetMachine &TM, CodeGenOptLevel OptLevel) + : SelectionDAGISelLegacy( + ID, std::make_unique(TM, OptLevel)) {} + + StringRef getPassName() const override { + return "SystemS DAG->DAG Pattern Instruction Selection"; + } +}; +} // end anonymous namespace + +char SystemSDAGToDAGISelLegacy::ID = 0; + +FunctionPass *llvm::createSystemSISelDag(SystemSTargetMachine &TM, + CodeGenOptLevel OptLevel) { + return new SystemSDAGToDAGISelLegacy(TM, OptLevel); +} + +void SystemSDAGToDAGISel::Select(SDNode *Node) { + if (Node->isMachineOpcode()) { + Node->setNodeId(-1); + return; + } + SDLoc DL(Node); + SelectCode(Node); +} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSISelLowering.cpp b/llvm/lib/Target/SystemS/SystemSISelLowering.cpp new file mode 100644 index 0000000000000..2421613cf214d --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSISelLowering.cpp @@ -0,0 +1,622 @@ +#include "SystemSISelLowering.h" +#include "MCTargetDesc/SystemSInfo.h" +#include "SystemS.h" +#include "SystemSMachineFunctionInfo.h" +#include "SystemSRegisterInfo.h" +#include "SystemSSubtarget.h" +#include "SystemSTargetMachine.h" + +#include "llvm/CodeGen/CallingConvLower.h" +#include "llvm/CodeGen/ISDOpcodes.h" +#include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineFunction.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineJumpTableInfo.h" +#include "llvm/CodeGen/MachineOperand.h" +#include "llvm/CodeGen/MachineRegisterInfo.h" +#include "llvm/CodeGen/Register.h" +#include "llvm/CodeGen/SelectionDAGNodes.h" +#include "llvm/CodeGen/ValueTypes.h" +#include "llvm/IR/CallingConv.h" +#include "llvm/IR/Intrinsics.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" +#include + +#define DEBUG_TYPE "SystemS-lower" + +using namespace llvm; + +static const MCPhysReg ArgGPRs[] = {SystemS::R9, SystemS::R10, SystemS::R11, + SystemS::R12}; + +void SystemSTargetLowering::ReplaceNodeResults( + SDNode *N, SmallVectorImpl &Results, SelectionDAG &DAG) const { + llvm_unreachable(""); +} + +SystemSTargetLowering::SystemSTargetLowering(const TargetMachine &TM, + const SystemSSubtarget &STI) + : TargetLowering(TM), STI(STI) { + addRegisterClass(MVT::i32, &SystemS::GPRRegClass); + computeRegisterProperties(STI.getRegisterInfo()); + + setStackPointerRegisterToSaveRestore(SystemS::R1); + + for (unsigned Opc = 0; Opc < ISD::BUILTIN_OP_END; ++Opc) { + setOperationAction(Opc, MVT::i32, Expand); + } + + setOperationAction(ISD::ADD, MVT::i32, Legal); + setOperationAction(ISD::MUL, MVT::i32, Legal); + setOperationAction(ISD::LOAD, MVT::i32, Legal); + setOperationAction(ISD::STORE, MVT::i32, Legal); + + setOperationAction(ISD::Constant, MVT::i32, Legal); + setOperationAction(ISD::UNDEF, MVT::i32, Legal); + + setOperationAction(ISD::BR_CC, MVT::i32, Custom); + + setOperationAction(ISD::FRAMEADDR, MVT::i32, Legal); +} + +const char *SystemSTargetLowering::getTargetNodeName(unsigned Opcode) const { + switch (Opcode) { + case SystemSISD::CALL: + return "SystemSISD::CALL"; + case SystemSISD::RET: + return "SystemSISD::RET"; + } + return nullptr; +} + +llvm::SystemSSubtarget const & +llvm::SystemSTargetLowering::getSubtarget() const { + return STI; +} + +//===----------------------------------------------------------------------===// +// Addressing mode description hooks +//===----------------------------------------------------------------------===// + +/// Return true if the addressing mode represented by AM is legal for this +/// target, for a load/store of the specified type. +bool SystemSTargetLowering::isLegalAddressingMode(const DataLayout &DL, + const AddrMode &AM, Type *Ty, + unsigned AS, + Instruction *I) const { + // No global is ever allowed as a base. + if (AM.BaseGV) { + return false; + } + + if (!isInt<16>(AM.BaseOffs)) { + return false; + } + + switch (AM.Scale) { + case 0: // "r+i" or just "i", depending on HasBaseReg. + break; + + case 1: + if (!AM.HasBaseReg) { // allow "r+i". + break; + } + return false; // disallow "r+r" or "r+r+i". + + default: + return false; + } + + return true; +} + +//===----------------------------------------------------------------------===// +// Misc Lower Operation implementation +//===----------------------------------------------------------------------===// + +#include "SystemSGenCallingConv.inc" + +//===----------------------------------------------------------------------===// +// Call Calling Convention Implementation +//===----------------------------------------------------------------------===// + +static Align getPrefTypeAlign(EVT VT, SelectionDAG &DAG) { + return DAG.getDataLayout().getPrefTypeAlign( + VT.getTypeForEVT(*DAG.getContext())); +} + +SDValue +SystemSTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI, + SmallVectorImpl &InVals) const { + SelectionDAG &DAG = CLI.DAG; + SDLoc &DL = CLI.DL; + SmallVectorImpl &Outs = CLI.Outs; + SmallVectorImpl &OutVals = CLI.OutVals; + SmallVectorImpl &Ins = CLI.Ins; + SDValue Chain = CLI.Chain; + SDValue Callee = CLI.Callee; + assert(!CLI.IsTailCall); + CallingConv::ID CallConv = CLI.CallConv; + bool IsVarArg = CLI.IsVarArg; + EVT PtrVT = getPointerTy(DAG.getDataLayout()); + + MachineFunction &MF = DAG.getMachineFunction(); + + // Analyze the operands of the call, assigning locations to each operand. + SmallVector ArgLocs; + CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); + CCInfo.AnalyzeCallOperands(Outs, CC_SystemS); + + // Get a count of how many bytes are to be pushed on the stack. + unsigned NumBytes = CCInfo.getStackSize(); + + // Create local copies for byval args + SmallVector ByValArgs; + for (unsigned i = 0, e = Outs.size(); i != e; ++i) { + ISD::ArgFlagsTy Flags = Outs[i].Flags; + if (!Flags.isByVal()) + continue; + + SDValue Arg = OutVals[i]; + unsigned Size = Flags.getByValSize(); + Align Alignment = Flags.getNonZeroByValAlign(); + + int FI = + MF.getFrameInfo().CreateStackObject(Size, Alignment, /*isSS=*/false); + SDValue FIPtr = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())); + SDValue SizeNode = DAG.getConstant(Size, DL, MVT::i32); + + Chain = DAG.getMemcpy(Chain, DL, FIPtr, Arg, SizeNode, Alignment, + /*IsVolatile=*/false, + /*AlwaysInline=*/false, + /*CI=*/nullptr, std::nullopt, MachinePointerInfo(), + MachinePointerInfo()); + ByValArgs.push_back(FIPtr); + } + + Chain = DAG.getCALLSEQ_START(Chain, NumBytes, 0, CLI.DL); + + // Copy argument values to their designated locations. + SmallVector, 8> RegsToPass; + SmallVector MemOpChains; + SDValue StackPtr; + for (unsigned i = 0, j = 0, e = ArgLocs.size(); i != e; ++i) { + CCValAssign &VA = ArgLocs[i]; + SDValue ArgValue = OutVals[i]; + ISD::ArgFlagsTy Flags = Outs[i].Flags; + // Promote the value if needed. + // For now, only handle fully promoted and indirect arguments. + if (VA.getLocInfo() == CCValAssign::Indirect) { + // Store the argument in a stack slot and pass its address. + Align StackAlign = + std::max(getPrefTypeAlign(Outs[i].ArgVT, DAG), + getPrefTypeAlign(ArgValue.getValueType(), DAG)); + TypeSize StoredSize = ArgValue.getValueType().getStoreSize(); + unsigned ArgIndex = Outs[i].OrigArgIndex; + unsigned ArgPartOffset = Outs[i].PartOffset; + assert(ArgPartOffset == 0); + // Calculate the total size to store. We don't have access to what we're + // actually storing other than performing the loop and collecting the + // info. + SmallVector> Parts; + while (i + 1 != e && Outs[i + 1].OrigArgIndex == ArgIndex) { + SDValue PartValue = OutVals[i + 1]; + unsigned PartOffset = Outs[i + 1].PartOffset - ArgPartOffset; + SDValue Offset = DAG.getIntPtrConstant(PartOffset, DL); + EVT PartVT = PartValue.getValueType(); + StoredSize += PartVT.getStoreSize(); + StackAlign = std::max(StackAlign, getPrefTypeAlign(PartVT, DAG)); + Parts.push_back(std::make_pair(PartValue, Offset)); + ++i; + } + SDValue SpillSlot = DAG.CreateStackTemporary(StoredSize, StackAlign); + int FI = cast(SpillSlot)->getIndex(); + MemOpChains.push_back( + DAG.getStore(Chain, DL, ArgValue, SpillSlot, + MachinePointerInfo::getFixedStack(MF, FI))); + for (const auto &Part : Parts) { + SDValue PartValue = Part.first; + SDValue PartOffset = Part.second; + SDValue Address = + DAG.getNode(ISD::ADD, DL, PtrVT, SpillSlot, PartOffset); + MemOpChains.push_back( + DAG.getStore(Chain, DL, PartValue, Address, + MachinePointerInfo::getFixedStack(MF, FI))); + } + ArgValue = SpillSlot; + } else { + assert(VA.getLocInfo() == CCValAssign::Full); + } + + // Use local copy if it is a byval arg. + if (Flags.isByVal()) + ArgValue = ByValArgs[j++]; + + if (VA.isRegLoc()) { + // Queue up the argument copies and emit them at the end. + RegsToPass.push_back(std::make_pair(VA.getLocReg(), ArgValue)); + } else { + assert(VA.isMemLoc() && "Argument not register or memory"); + + // Work out the address of the stack slot. + if (!StackPtr.getNode()) + StackPtr = DAG.getCopyFromReg(Chain, DL, SystemS::R1, PtrVT); + SDValue Address = + DAG.getNode(ISD::ADD, DL, PtrVT, StackPtr, + DAG.getIntPtrConstant(VA.getLocMemOffset(), DL)); + + // Emit the store. + MemOpChains.push_back( + DAG.getStore(Chain, DL, ArgValue, Address, MachinePointerInfo())); + } + } + + // Join the stores, which are independent of one another. + if (!MemOpChains.empty()) + Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, MemOpChains); + + SDValue Glue; + + // Build a sequence of copy-to-reg nodes, chained and glued together. + for (auto &Reg : RegsToPass) { + Chain = DAG.getCopyToReg(Chain, DL, Reg.first, Reg.second, Glue); + Glue = Chain.getValue(1); + } + + // No external symbols support + if (GlobalAddressSDNode *S = dyn_cast(Callee)) { + // llvm_unreachable("How do i suppose to lower this?"); + const GlobalValue *GV = S->getGlobal(); + assert(getTargetMachine().shouldAssumeDSOLocal(GV)); + Callee = DAG.getTargetGlobalAddress(GV, DL, PtrVT, 0, 0); + } + + // The first call operand is the chain and the second is the target address. + SmallVector Ops; + Ops.push_back(Chain); + Ops.push_back(Callee); + + // Add argument registers to the end of the list so that they are + // known live into the call. + for (auto &Reg : RegsToPass) + Ops.push_back(DAG.getRegister(Reg.first, Reg.second.getValueType())); + + // Add a register mask operand representing the call-preserved registers. + const TargetRegisterInfo *TRI = STI.getRegisterInfo(); + const uint32_t *Mask = TRI->getCallPreservedMask(MF, CallConv); + Ops.push_back(DAG.getRegisterMask(Mask)); + + // Glue the call to the argument copies, if any. + if (Glue.getNode()) + Ops.push_back(Glue); + + // Emit the call. + SDVTList NodeTys = DAG.getVTList(MVT::Other, MVT::Glue); + + Chain = DAG.getNode(SystemSISD::CALL, DL, NodeTys, Ops); + DAG.addNoMergeSiteInfo(Chain.getNode(), CLI.NoMerge); + Glue = Chain.getValue(1); + + // Mark the end of the call, which is glued to the call itself. + Chain = DAG.getCALLSEQ_END(Chain, DAG.getConstant(NumBytes, DL, PtrVT, true), + DAG.getConstant(0, DL, PtrVT, true), Glue, DL); + Glue = Chain.getValue(1); + + // Assign locations to each value returned by this call. + SmallVector RVLocs; + CCState RetCCInfo(CallConv, IsVarArg, MF, RVLocs, *DAG.getContext()); + RetCCInfo.AnalyzeCallResult(Ins, RetCC_SystemS); + + // Copy all of the result registers out of their specified physreg. + for (auto &VA : RVLocs) { + // Copy the value out + SDValue RetValue = + DAG.getCopyFromReg(Chain, DL, VA.getLocReg(), VA.getLocVT(), Glue); + // Glue the RetValue to the end of the call sequence + Chain = RetValue.getValue(1); + Glue = RetValue.getValue(2); + + assert(VA.getLocInfo() == CCValAssign::Full); + InVals.push_back(RetValue); + } + + return Chain; +} + +//===----------------------------------------------------------------------===// +// Formal Arguments Calling Convention Implementation +//===----------------------------------------------------------------------===// + +namespace { + +struct ArgDataPair { + SDValue SDV; + ISD::ArgFlagsTy Flags; +}; + +} // end anonymous namespace + +static SDValue convertValVTToLocVT(SelectionDAG &DAG, SDValue Val, + const CCValAssign &VA, const SDLoc &DL, + const SystemSSubtarget &Subtarget) { + EVT LocVT = VA.getLocVT(); + + if (VA.getValVT() == MVT::f32) { + llvm_unreachable("fp is not supported"); + } + + switch (VA.getLocInfo()) { + default: + llvm_unreachable("Unexpected CCValAssign::LocInfo"); + + case CCValAssign::Full: + break; + + case CCValAssign::BCvt: + llvm_unreachable(""); + Val = DAG.getNode(ISD::BITCAST, DL, LocVT, Val); + break; + } + return Val; +} + +// Convert Val to a ValVT. Should not be called for CCValAssign::Indirect +// values. +static SDValue convertLocVTToValVT(SelectionDAG &DAG, SDValue Val, + const CCValAssign &VA, const SDLoc &DL, + const SystemSSubtarget &Subtarget) { + if (VA.getValVT() == MVT::f32) { + llvm_unreachable("fp is not supported"); + } + + switch (VA.getLocInfo()) { + default: + llvm_unreachable("Unexpected CCValAssign::LocInfo"); + + case CCValAssign::Full: + break; + + case CCValAssign::BCvt: + llvm_unreachable(""); + Val = DAG.getNode(ISD::BITCAST, DL, VA.getValVT(), Val); + } + return Val; +} + +static SDValue unpackFromRegLoc(SelectionDAG &DAG, SDValue Chain, + const CCValAssign &VA, const SDLoc &DL, + const SystemSTargetLowering &TLI) { + MachineFunction &MF = DAG.getMachineFunction(); + MachineRegisterInfo &RegInfo = MF.getRegInfo(); + EVT LocVT = VA.getLocVT(); + SDValue Val; + const TargetRegisterClass *RC = TLI.getRegClassFor(LocVT.getSimpleVT()); + Register VReg = RegInfo.createVirtualRegister(RC); + RegInfo.addLiveIn(VA.getLocReg(), VReg); + Val = DAG.getCopyFromReg(Chain, DL, VReg, LocVT); + + if (VA.getLocInfo() == CCValAssign::Indirect) { + return Val; + } + + return convertLocVTToValVT(DAG, Val, VA, DL, TLI.getSubtarget()); +} + +// The caller is responsible for loading the full value if the argument is +// passed with CCValAssign::Indirect. +static SDValue unpackFromMemLoc(SelectionDAG &DAG, SDValue Chain, + const CCValAssign &VA, const SDLoc &DL) { + MachineFunction &MF = DAG.getMachineFunction(); + MachineFrameInfo &MFI = MF.getFrameInfo(); + EVT LocVT = VA.getLocVT(); + EVT ValVT = VA.getValVT(); + EVT PtrVT = MVT::getIntegerVT(DAG.getDataLayout().getPointerSizeInBits(0)); + int FI = MFI.CreateFixedObject(ValVT.getStoreSize(), VA.getLocMemOffset(), + /*IsImmutable=*/true); + SDValue FIN = DAG.getFrameIndex(FI, PtrVT); + SDValue Val; + + ISD::LoadExtType ExtType; + switch (VA.getLocInfo()) { + default: + llvm_unreachable("Unexpected CCValAssign::LocInfo"); + case CCValAssign::Full: + case CCValAssign::Indirect: + case CCValAssign::BCvt: + ExtType = ISD::NON_EXTLOAD; + break; + } + Val = DAG.getExtLoad( + ExtType, DL, LocVT, Chain, FIN, + MachinePointerInfo::getFixedStack(DAG.getMachineFunction(), FI), ValVT); + return Val; +} + +/// SystemS formal arguments implementation +SDValue SystemSTargetLowering::LowerFormalArguments( + SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, + const SmallVectorImpl &Ins, const SDLoc &DL, + SelectionDAG &DAG, SmallVectorImpl &InVals) const { + switch (CallConv) { + default: + report_fatal_error("Unsupported calling convention"); + case CallingConv::C: + case CallingConv::Fast: + break; + } + + MachineFunction &MF = DAG.getMachineFunction(); + EVT PtrVT = getPointerTy(DAG.getDataLayout()); + unsigned StackSlotSize = MVT(MVT::i32).getSizeInBits() / 8; + // Used with vargs to acumulate store chains. + std::vector OutChains; + + // Assign locations to all of the incoming arguments. + SmallVector ArgLocs; + CCState CCInfo(CallConv, IsVarArg, MF, ArgLocs, *DAG.getContext()); + CCInfo.AnalyzeFormalArguments(Ins, CC_SystemS); + + for (unsigned i = 0, e = ArgLocs.size(); i != e; ++i) { + CCValAssign &VA = ArgLocs[i]; + SDValue ArgValue; + if (VA.isRegLoc()) + ArgValue = unpackFromRegLoc(DAG, Chain, VA, DL, *this); + else + ArgValue = unpackFromMemLoc(DAG, Chain, VA, DL); + + if (VA.getLocInfo() == CCValAssign::Indirect) { + InVals.push_back(DAG.getLoad(VA.getValVT(), DL, Chain, ArgValue, + MachinePointerInfo())); + unsigned ArgIndex = Ins[i].OrigArgIndex; + unsigned ArgPartOffset = Ins[i].PartOffset; + assert(ArgPartOffset == 0); + while (i + 1 != e && Ins[i + 1].OrigArgIndex == ArgIndex) { + CCValAssign &PartVA = ArgLocs[i + 1]; + unsigned PartOffset = Ins[i + 1].PartOffset - ArgPartOffset; + SDValue Offset = DAG.getIntPtrConstant(PartOffset, DL); + SDValue Address = DAG.getNode(ISD::ADD, DL, PtrVT, ArgValue, Offset); + InVals.push_back(DAG.getLoad(PartVA.getValVT(), DL, Chain, Address, + MachinePointerInfo())); + ++i; + } + continue; + } + InVals.push_back(ArgValue); + } + + if (IsVarArg) { + ArrayRef ArgRegs = ArrayRef(ArgGPRs); + unsigned Idx = CCInfo.getFirstUnallocated(ArgRegs); + const TargetRegisterClass *RC = &SystemS::GPRRegClass; + MachineFrameInfo &MFI = MF.getFrameInfo(); + MachineRegisterInfo &RegInfo = MF.getRegInfo(); + SystemSFunctionInfo *UFI = MF.getInfo(); + + int VaArgOffset, VarArgsSaveSize; + + // If all registers are allocated, then all varargs must be passed on the + // stack and we don't need to save any argregs. + if (ArgRegs.size() == Idx) { + VaArgOffset = CCInfo.getStackSize(); + VarArgsSaveSize = 0; + } else { + VarArgsSaveSize = StackSlotSize * (ArgRegs.size() - Idx); + VaArgOffset = -VarArgsSaveSize; + } + + // Record the frame index of the first variable argument + // which is a value necessary to VASTART. + int FI = MFI.CreateFixedObject(StackSlotSize, VaArgOffset, true); + UFI->setVarArgsFrameIndex(FI); + + // If saving an odd number of registers then create an extra stack slot to + // ensure that the frame pointer is 2*XLEN-aligned, which in turn ensures + // offsets to even-numbered registered remain 2*XLEN-aligned. + if (Idx % 2) { + MFI.CreateFixedObject(StackSlotSize, VaArgOffset - (int)StackSlotSize, + true); + VarArgsSaveSize += StackSlotSize; + } + + // Copy the integer registers that may have been used for passing varargs + // to the vararg save area. + for (unsigned I = Idx; I < ArgRegs.size(); + ++I, VaArgOffset += StackSlotSize) { + const Register Reg = RegInfo.createVirtualRegister(RC); + RegInfo.addLiveIn(ArgRegs[I], Reg); + SDValue ArgValue = DAG.getCopyFromReg(Chain, DL, Reg, MVT::i32); + FI = MFI.CreateFixedObject(StackSlotSize, VaArgOffset, true); + SDValue PtrOff = DAG.getFrameIndex(FI, getPointerTy(DAG.getDataLayout())); + SDValue Store = DAG.getStore(Chain, DL, ArgValue, PtrOff, + MachinePointerInfo::getFixedStack(MF, FI)); + cast(Store.getNode()) + ->getMemOperand() + ->setValue((Value *)nullptr); + OutChains.push_back(Store); + } + UFI->setVarArgsSaveSize(VarArgsSaveSize); + } + + // All stores are grouped in one node to allow the matching between + // the size of Ins and InVals. This only happens for vararg functions. + if (!OutChains.empty()) { + OutChains.push_back(Chain); + Chain = DAG.getNode(ISD::TokenFactor, DL, MVT::Other, OutChains); + } + + return Chain; +} + +//===----------------------------------------------------------------------===// +// Return Value Calling Convention Implementation +//===----------------------------------------------------------------------===// + +bool SystemSTargetLowering::CanLowerReturn( + CallingConv::ID CallConv, MachineFunction &MF, bool IsVarArg, + const SmallVectorImpl &Outs, LLVMContext &Context, + const Type *RetTy) const { + SmallVector RVLocs; + CCState CCInfo(CallConv, IsVarArg, MF, RVLocs, Context); + + if (!CCInfo.CheckReturn(Outs, RetCC_SystemS)) { + return false; + } + if (CCInfo.getStackSize() != 0 && IsVarArg) { + llvm_unreachable(""); + } + + return true; +} + +SDValue +SystemSTargetLowering::LowerReturn(SDValue Chain, CallingConv::ID CallConv, + bool IsVarArg, + const SmallVectorImpl &Outs, + const SmallVectorImpl &OutVals, + const SDLoc &DL, SelectionDAG &DAG) const { + const MachineFunction &MF = DAG.getMachineFunction(); + const SystemSSubtarget &STI = MF.getSubtarget(); + + // Stores the assignment of the return value to a location. + SmallVector RVLocs; + + // Info about the registers and stack slot. + CCState CCInfo(CallConv, IsVarArg, DAG.getMachineFunction(), RVLocs, + *DAG.getContext()); + + CCInfo.AnalyzeReturn(Outs, RetCC_SystemS); + + SDValue Glue; + SmallVector RetOps(1, Chain); + + // Copy the result values into the output registers. + for (unsigned i = 0, e = RVLocs.size(); i < e; ++i) { + SDValue Val = OutVals[i]; + CCValAssign &VA = RVLocs[i]; + assert(VA.isRegLoc() && "Can only return in registers!"); + + Val = convertValVTToLocVT(DAG, Val, VA, DL, STI); + Chain = DAG.getCopyToReg(Chain, DL, VA.getLocReg(), Val, Glue); + + // Guarantee that all emitted copies are stuck together. + Glue = Chain.getValue(1); + RetOps.push_back(DAG.getRegister(VA.getLocReg(), VA.getLocVT())); + } + + RetOps[0] = Chain; // Update chain. + // Add the glue node if we have it. + if (Glue.getNode()) { + RetOps.push_back(Glue); + } + return DAG.getNode(SystemSISD::RET, DL, MVT::Other, RetOps); +} + +//===----------------------------------------------------------------------===// +// Target Optimization Hooks +//===----------------------------------------------------------------------===// + +SDValue SystemSTargetLowering::PerformDAGCombine(SDNode *N, + DAGCombinerInfo &DCI) const { + return {}; +} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSISelLowering.h b/llvm/lib/Target/SystemS/SystemSISelLowering.h new file mode 100644 index 0000000000000..9955b3d8de924 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSISelLowering.h @@ -0,0 +1,69 @@ +#ifndef LLVM_LIB_TARGET_SYSTEMS_SIMISELLOWERING_H +#define LLVM_LIB_TARGET_SYSTEMS_SIMISELLOWERING_H + +#include "SystemS.h" + +#include "llvm/CodeGen/SelectionDAG.h" +#include "llvm/CodeGen/TargetLowering.h" + +namespace llvm { + +class SystemSSubtarget; +class SystemSTargetMachine; + +namespace SystemSISD { + +enum NodeType : unsigned { + FIRST_NUMBER = ISD::BUILTIN_OP_END, + RET, + CALL, + BR_CC, +}; + +} // namespace SystemSISD + +class SystemSTargetLowering : public TargetLowering { +public: /* Constructors and destructors */ + explicit SystemSTargetLowering(const TargetMachine &TM, + const SystemSSubtarget &STI); + +public: /* Public interface */ + const char *getTargetNodeName(unsigned Opcode) const override; + SystemSSubtarget const &getSubtarget() const; + + bool isLegalAddressingMode(const DataLayout &DL, const AddrMode &AM, Type *Ty, + unsigned AS, + Instruction *I = nullptr) const override; + +private: /* Private interface */ + void ReplaceNodeResults(SDNode *N, SmallVectorImpl &Results, + SelectionDAG &DAG) const override; + + SDValue PerformDAGCombine(SDNode *N, DAGCombinerInfo &DCI) const override; + + SDValue LowerFormalArguments(SDValue Chain, CallingConv::ID CallConv, + bool IsVarArg, + const SmallVectorImpl &Ins, + const SDLoc &DL, SelectionDAG &DAG, + SmallVectorImpl &InVals) const override; + + SDValue LowerCall(TargetLowering::CallLoweringInfo &CLI, + SmallVectorImpl &InVals) const override; + + SDValue LowerReturn(SDValue Chain, CallingConv::ID CallConv, bool IsVarArg, + const SmallVectorImpl &Outs, + const SmallVectorImpl &OutVals, const SDLoc &DL, + SelectionDAG &DAG) const override; + + bool CanLowerReturn(CallingConv::ID CallConv, MachineFunction &MF, + bool IsVarArg, + const SmallVectorImpl &ArgsFlags, + LLVMContext &Context, const Type *RetTy) const override; + +private: /* Private data */ + const SystemSSubtarget &STI; +}; + +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_SYSTEMS_SIMISELLOWERING_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSInstrFormats.td b/llvm/lib/Target/SystemS/SystemSInstrFormats.td new file mode 100644 index 0000000000000..5fa80667db970 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSInstrFormats.td @@ -0,0 +1,47 @@ +//===----------------------------------------------------------------------===// +// Describe SystemS instructions format +// +// CPU INSTRUCTION FORMATS +// +// FF FF FF FF +// ^^ ^^ - r3_imm - third reg or imm +// ^ - r2 - second reg +// ^ - r1 - first reg +// ^^ - opcode - operation code +// +//===----------------------------------------------------------------------===// + +// Generic SystemS Format +class SystemSInst op, dag outs, dag ins, string asmstr, list pattern>: Instruction +{ + // Inst and Size: for tablegen(... -gen-emitter) and + // tablegen(... -gen-disassembler) in CMakeLists.txt + let Namespace = "SystemS"; + let DecoderNamespace = "SystemS"; + let Size = 4; + + field bits<32> Inst; + + bits<8> Opcode = op; + bits<4> r1 = 0; + bits<4> r2 = 0; + bits<16> r3_imm = 0; + + let Inst{31-24} = Opcode; + let Inst{23-20} = r1; + let Inst{19-16} = r2; + let Inst{15-0} = r3_imm; + + let OutOperandList = outs; + let InOperandList = ins; + let AsmString = asmstr; + let Pattern = pattern; + +} + +// Pseudo instructions format +class SystemSPseudoInst pattern> + : SystemSInst<0, outs, ins, asmstr, pattern> { + let isPseudo = 1; + let isCodeGenOnly = 1; +} diff --git a/llvm/lib/Target/SystemS/SystemSInstrInfo.cpp b/llvm/lib/Target/SystemS/SystemSInstrInfo.cpp new file mode 100644 index 0000000000000..ad1f0963585ae --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSInstrInfo.cpp @@ -0,0 +1,18 @@ +#include "SystemSInstrInfo.h" +#include "SystemS.h" + +#include "llvm/CodeGen/MachineFrameInfo.h" +#include "llvm/CodeGen/MachineInstrBuilder.h" +#include "llvm/CodeGen/MachineMemOperand.h" +#include "llvm/MC/TargetRegistry.h" +#include "llvm/Support/Debug.h" +#include "llvm/Support/ErrorHandling.h" + +using namespace llvm; + +#define GET_INSTRINFO_CTOR_DTOR +#include "SystemSGenInstrInfo.inc" + +#define DEBUG_TYPE "SystemS-inst-info" + +SystemSInstrInfo::SystemSInstrInfo() : SystemSGenInstrInfo() {} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSInstrInfo.h b/llvm/lib/Target/SystemS/SystemSInstrInfo.h new file mode 100644 index 0000000000000..000db00eeef82 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSInstrInfo.h @@ -0,0 +1,23 @@ +#ifndef LLVM_LIB_TARGET_SYSTEMS_SYSTEMSINSTRINFO_H +#define LLVM_LIB_TARGET_SYSTEMS_SYSTEMSINSTRINFO_H + +#include "MCTargetDesc/SystemSInfo.h" +#include "SystemSRegisterInfo.h" + +#include "llvm/CodeGen/TargetInstrInfo.h" + +#define GET_INSTRINFO_HEADER +#include "SystemSGenInstrInfo.inc" + +namespace llvm { + +class SystemSSubtarget; + +class SystemSInstrInfo : public SystemSGenInstrInfo { +public: /* Constructors and destructors */ + SystemSInstrInfo(); +}; + +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_SYSTEMS_SYSTEMSINSTRINFO_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSInstrInfo.td b/llvm/lib/Target/SystemS/SystemSInstrInfo.td new file mode 100644 index 0000000000000..a61a82089cefd --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSInstrInfo.td @@ -0,0 +1,55 @@ +//===----------------------------------------------------------------------===// +// SystemS profiles and nodes +//===----------------------------------------------------------------------===// + +def systems_ret : SDNode<"SystemSISD::RET", SDTNone, + [SDNPHasChain, SDNPOptInGlue, SDNPVariadic]>; + +//===----------------------------------------------------------------------===// +// Instruction format superclass +//===----------------------------------------------------------------------===// + +include "SystemSInstrFormats.td" + +//===----------------------------------------------------------------------===// +// SystemS Operand, Complex Patterns and Transformations Definitions. +//===----------------------------------------------------------------------===// + +class SImmAsmOperand : AsmOperandClass { + let Name = "SImm" # width; + let RenderMethod = "addImmOperands"; + let DiagnosticType = !strconcat("Invalid", Name); +} + +def systemsm16 : Operand, ImmLeaf(Imm);}]> { + let ParserMatchClass = SImmAsmOperand<16>; + let EncoderMethod = "getImmOpValue"; + let DecoderMethod = "decodeSImmOperand<16>"; + let MCOperandPredicate = [{ + int64_t Imm; + if (MCOp.evaluateAsConstantImm(Imm)) + return isInt<16>(Imm); + return MCOp.isBareSymbolRef(); + }]; + let OperandType = "OPERAND_SYSTEMSM16"; + let OperandNamespace = "SystemSOp"; +} + +//===----------------------------------------------------------------------===// +// SystemS Instructions +//===----------------------------------------------------------------------===// + +let hasSideEffects = 0, mayLoad = 0, mayStore = 0, isCall = 1, isBranch = 1, isTerminator = 1 in +def BR : SystemSInst<0x0, (outs), (ins GPR:$rs1), "BR $rs1", + [(brind GPR:$rs1)]>; + +let isBarrier = 1, isReturn = 1, isTerminator = 1 in +def PseudoRET : SystemSPseudoInst<(outs), (ins), "# PseudoRET", + [(systems_ret)]>, + PseudoInstExpansion<(BR R0)>; + +// movli +let isAsCheapAsAMove = 1, isCodeGenOnly = 1, isReMaterializable = 1 in +def MOVLI : SystemSInst<0x0, (outs GPR:$rd), (ins systemsm16:$imm), + "MOVli $rd $imm", + [(set GPR:$rd, systemsm16:$imm)]>; diff --git a/llvm/lib/Target/SystemS/SystemSMCInstLower.cpp b/llvm/lib/Target/SystemS/SystemSMCInstLower.cpp new file mode 100644 index 0000000000000..8f4e3373936c7 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSMCInstLower.cpp @@ -0,0 +1,97 @@ +#include "SystemS.h" +#include "SystemSSubtarget.h" + +#include "llvm/CodeGen/AsmPrinter.h" +#include "llvm/CodeGen/MachineBasicBlock.h" +#include "llvm/CodeGen/MachineInstr.h" +#include "llvm/MC/MCAsmInfo.h" +#include "llvm/MC/MCContext.h" +#include "llvm/MC/MCExpr.h" +#include "llvm/MC/MCInst.h" +#include "llvm/Support/ErrorHandling.h" +#include "llvm/Support/raw_ostream.h" + +using namespace llvm; + +static MCOperand lowerSymbolOperand(const MachineOperand &MO, MCSymbol *Sym, + const AsmPrinter &AP) { + MCContext &Ctx = AP.OutContext; + + const MCExpr *ME = + MCSymbolRefExpr::create(Sym, MCSymbolRefExpr::VK_None, Ctx); + + if (!MO.isJTI() && !MO.isMBB() && MO.getOffset()) { + ME = MCBinaryExpr::createAdd( + ME, MCConstantExpr::create(MO.getOffset(), Ctx), Ctx); + } + + return MCOperand::createExpr(ME); +} + +bool llvm::LowerSystemSMachineOperandToMCOperand(const MachineOperand &MO, + MCOperand &MCOp, + const AsmPrinter &AP) { + + switch (MO.getType()) { + default: + report_fatal_error( + "LowerSystemSMachineInstrToMCInst: unknown operand type"); + + case MachineOperand::MO_Register: + if (MO.isImplicit()) { + return false; + } + + MCOp = MCOperand::createReg(MO.getReg()); + break; + + case MachineOperand::MO_RegisterMask: + return false; + + case MachineOperand::MO_Immediate: + MCOp = MCOperand::createImm(MO.getImm()); + break; + + case MachineOperand::MO_MachineBasicBlock: + MCOp = lowerSymbolOperand(MO, MO.getMBB()->getSymbol(), AP); + break; + + case MachineOperand::MO_GlobalAddress: + MCOp = lowerSymbolOperand(MO, AP.getSymbolPreferLocal(*MO.getGlobal()), AP); + break; + + case MachineOperand::MO_BlockAddress: + MCOp = lowerSymbolOperand( + MO, AP.GetBlockAddressSymbol(MO.getBlockAddress()), AP); + break; + + case MachineOperand::MO_ExternalSymbol: + MCOp = lowerSymbolOperand( + MO, AP.GetExternalSymbolSymbol(MO.getSymbolName()), AP); + break; + + case MachineOperand::MO_ConstantPoolIndex: + MCOp = lowerSymbolOperand(MO, AP.GetCPISymbol(MO.getIndex()), AP); + break; + + case MachineOperand::MO_JumpTableIndex: + MCOp = lowerSymbolOperand(MO, AP.GetJTISymbol(MO.getIndex()), AP); + break; + } + + return true; +} + +bool llvm::lowerSystemSMachineInstrToMCInst(const MachineInstr *MI, + MCInst &OutMI, AsmPrinter &AP) { + OutMI.setOpcode(MI->getOpcode()); + + for (const MachineOperand &MO : MI->operands()) { + MCOperand MCOp; + if (LowerSystemSMachineOperandToMCOperand(MO, MCOp, AP)) { + OutMI.addOperand(MCOp); + } + } + + return false; +} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSMachineFunctionInfo.h b/llvm/lib/Target/SystemS/SystemSMachineFunctionInfo.h new file mode 100644 index 0000000000000..533d65c8b7dd5 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSMachineFunctionInfo.h @@ -0,0 +1,48 @@ +#ifndef LLVM_LIB_TARGET_SIM_SIMMACHINEFUNCTIONINFO_H +#define LLVM_LIB_TARGET_SIM_SIMMACHINEFUNCTIONINFO_H + +#include "llvm/CodeGen/MachineFunction.h" + +namespace llvm { + +class SystemSFunctionInfo : public MachineFunctionInfo { +public: /* Constructors and destructor */ + SystemSFunctionInfo() {} + explicit SystemSFunctionInfo(MachineFunction &MF) {} + + ~SystemSFunctionInfo() {} + +public: /* Public interface */ + int getVarArgsFrameIndex() const { return VarArgsFrameIndex; } + void setVarArgsFrameIndex(int Off) { VarArgsFrameIndex = Off; } + + int getVarArgsSaveSize() const { return VarArgsSaveSize; } + void setVarArgsSaveSize(int Size) { VarArgsSaveSize = Size; } + + unsigned getCalleeSavedStackSize() const { return CalleeSavedStackSize; } + void setCalleeSavedStackSize(unsigned Size) { CalleeSavedStackSize = Size; } + + unsigned getReturnStackOffset() const { + assert(ReturnStackOffsetSet && "Return stack offset not set"); + return ReturnStackOffset; + } + void setReturnStackOffset(unsigned Off) { + assert(!ReturnStackOffsetSet && "Return stack offset set twice"); + ReturnStackOffset = Off; + ReturnStackOffsetSet = true; + } + +private: /* Private interface */ + virtual void anchor(); + +private: /* Private data */ + bool ReturnStackOffsetSet = false; + unsigned ReturnStackOffset = -1U; + int VarArgsFrameIndex = 0; + int VarArgsSaveSize = 0; + unsigned CalleeSavedStackSize = 0; +}; + +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_SIM_SIMMACHINEFUNCTIONINFO_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSRegisterInfo.cpp b/llvm/lib/Target/SystemS/SystemSRegisterInfo.cpp new file mode 100644 index 0000000000000..eb844544353e3 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSRegisterInfo.cpp @@ -0,0 +1,73 @@ +#include "SystemSRegisterInfo.h" +#include "MCTargetDesc/SystemSMCTargetDesc.h" +#include "SystemSFrameLowering.h" + +#include "llvm/CodeGen/TargetInstrInfo.h" + +using namespace llvm; + +#define GET_REGINFO_TARGET_DESC +#include "SystemSGenRegisterInfo.inc" + +SystemSRegisterInfo::SystemSRegisterInfo() + : SystemSGenRegisterInfo(SystemS::R0) {} + +const MCPhysReg * +SystemSRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF) const { + return CSR_SystemS_SaveList; +} + +BitVector +SystemSRegisterInfo::getReservedRegs(const MachineFunction &MF) const { + SystemSFrameLowering const *TFI = getFrameLowering(MF); + BitVector Reserved(getNumRegs()); + + Reserved.set(SystemS::R1); + if (TFI->hasFP(MF)) { + Reserved.set(SystemS::R2); + } + + return Reserved; +} + +bool SystemSRegisterInfo::requiresRegisterScavenging( + const MachineFunction &MF) const { + return false; +} + +bool SystemSRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II, + int SPAdj, unsigned FIOperandNum, + RegScavenger *RS) const { + assert(SPAdj == 0 && "Unexpected non-zero SPAdj value"); + + MachineInstr &MI = *II; + MachineFunction &MF = *MI.getParent()->getParent(); + DebugLoc DL = MI.getDebugLoc(); + int FrameIndex = MI.getOperand(FIOperandNum).getIndex(); + Register FrameReg; + + int Offset = getFrameLowering(MF) + ->getFrameIndexReference(MF, FrameIndex, FrameReg) + .getFixed(); + + Offset += MI.getOperand(FIOperandNum + 1).getImm(); + if (!isInt<16>(Offset)) { + llvm_unreachable("incorrect offset"); + } + MI.getOperand(FIOperandNum).ChangeToRegister(FrameReg, false, false, false); + MI.getOperand(FIOperandNum + 1).ChangeToImmediate(Offset); + + return false; +} + +Register +SystemSRegisterInfo::getFrameRegister(const MachineFunction &MF) const { + const TargetFrameLowering *TFI = getFrameLowering(MF); + return TFI->hasFP(MF) ? SystemS::R2 : SystemS::R1; +} + +const uint32_t * +SystemSRegisterInfo::getCallPreservedMask(const MachineFunction &MF, + CallingConv::ID CC) const { + return CSR_SystemS_RegMask; +} \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSRegisterInfo.h b/llvm/lib/Target/SystemS/SystemSRegisterInfo.h new file mode 100644 index 0000000000000..c364b64552462 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSRegisterInfo.h @@ -0,0 +1,28 @@ +#ifndef LLVM_LIB_TARGET_SYSTEMS_SYSTEMSREGISTERINFO_H +#define LLVM_LIB_TARGET_SYSTEMS_SYSTEMSREGISTERINFO_H + +#define GET_REGINFO_HEADER +#include "SystemSGenRegisterInfo.inc" + +namespace llvm { + +struct SystemSRegisterInfo : public SystemSGenRegisterInfo { +public: /* Constructors and destructors */ + SystemSRegisterInfo(); + +public: /* Public interface */ + const MCPhysReg *getCalleeSavedRegs(const MachineFunction *MF) const override; + const uint32_t *getCallPreservedMask(const MachineFunction &MF, + CallingConv::ID CC) const override; + BitVector getReservedRegs(const MachineFunction &MF) const override; + Register getFrameRegister(const MachineFunction &MF) const override; + + bool requiresRegisterScavenging(const MachineFunction &MF) const override; + bool eliminateFrameIndex(MachineBasicBlock::iterator II, int SPAdj, + unsigned FIOperandNum, + RegScavenger *RS = nullptr) const override; +}; + +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_SYSTEMS_SYSTEMSREGISTERINFO_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSRegisterInfo.td b/llvm/lib/Target/SystemS/SystemSRegisterInfo.td new file mode 100644 index 0000000000000..4ef9c9c2b7ab8 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSRegisterInfo.td @@ -0,0 +1,24 @@ +// Register file declaration +class SystemSReg Enc, string n> : Register{ + let HWEncoding = Enc; + let Namespace = "SystemS"; +} + +//===----------------------------------------------------------------------===// +// General-purpose registers +//===----------------------------------------------------------------------===// + +foreach I = 0-15 in { + def R#I : SystemSReg; +} + +//===----------------------------------------------------------------------===// +// Class definitions. +//===----------------------------------------------------------------------===// + +def GPR : RegisterClass< + "SystemS", + [i32], + 32, + (add R0, R1, R2, R3, R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15) +>; \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSSubtarget.cpp b/llvm/lib/Target/SystemS/SystemSSubtarget.cpp new file mode 100644 index 0000000000000..7d91afbce6579 --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSSubtarget.cpp @@ -0,0 +1,42 @@ +#include "SystemSSubtarget.h" +#include "SystemS.h" + +#include "llvm/Target/TargetMachine.h" + +using namespace llvm; + +#define DEBUG_TYPE "SystemS-subtarget" + +#define GET_SUBTARGETINFO_TARGET_DESC +#define GET_SUBTARGETINFO_CTOR +#include "SystemSGenSubtargetInfo.inc" + +SystemSSubtarget::SystemSSubtarget(const Triple &TT, const std::string &CPU, + const std::string &FS, + const TargetMachine &TM) + : SystemSGenSubtargetInfo(TT, CPU, CPU, FS), TLInfo(TM, *this), + FrameLowering(*this), InstrInfo() {} + +const llvm::SystemSTargetLowering * +llvm::SystemSSubtarget::getTargetLowering() const { + return &TLInfo; +} + +const llvm::SystemSFrameLowering * +llvm::SystemSSubtarget::getFrameLowering() const { + return &FrameLowering; +} + +const llvm::SystemSRegisterInfo * +llvm::SystemSSubtarget::getRegisterInfo() const { + return &RegInfo; +} + +const llvm::SystemSInstrInfo *llvm::SystemSSubtarget::getInstrInfo() const { + return &InstrInfo; +} + +const llvm::SelectionDAGTargetInfo * +llvm::SystemSSubtarget::getSelectionDAGInfo() const { + return &TSInfo; +} diff --git a/llvm/lib/Target/SystemS/SystemSSubtarget.h b/llvm/lib/Target/SystemS/SystemSSubtarget.h new file mode 100644 index 0000000000000..bf705f1cdb2ff --- /dev/null +++ b/llvm/lib/Target/SystemS/SystemSSubtarget.h @@ -0,0 +1,44 @@ +#ifndef LLVM_LIB_TARGET_SYSTEMS_SYSTEMSSUBTARGET_H +#define LLVM_LIB_TARGET_SYSTEMS_SYSTEMSSUBTARGET_H + +#include "SystemS.h" +#include "SystemSFrameLowering.h" +#include "SystemSISelLowering.h" +#include "SystemSInstrInfo.h" +#include "SystemSRegisterInfo.h" + +#include "llvm/CodeGen/SelectionDAGTargetInfo.h" +#include "llvm/CodeGen/TargetSubtargetInfo.h" + +#define GET_SUBTARGETINFO_HEADER +#include "SystemSGenSubtargetInfo.inc" + +namespace llvm { + +class SystemSSubtarget : public SystemSGenSubtargetInfo { +public: /* Contrustors and destructors */ + SystemSSubtarget(const Triple &TT, const std::string &CPU, + const std::string &FS, const TargetMachine &TM); + +public: /* Public interface */ + /// ParseSubtargetFeatures - Parses features string setting specified + /// subtarget options. Definition of function is auto generated by tblgen. + void ParseSubtargetFeatures(StringRef CPU, StringRef TuneCPU, StringRef FS); + + const SystemSTargetLowering *getTargetLowering() const override; + const SystemSFrameLowering *getFrameLowering() const override; + const SystemSRegisterInfo *getRegisterInfo() const override; + const SystemSInstrInfo *getInstrInfo() const override; + const SelectionDAGTargetInfo *getSelectionDAGInfo() const override; + +private: /* Private data */ + SystemSTargetLowering TLInfo; + SystemSFrameLowering FrameLowering; + SystemSRegisterInfo RegInfo; + SystemSInstrInfo InstrInfo; + SelectionDAGTargetInfo TSInfo; +}; + +} // end namespace llvm + +#endif // LLVM_LIB_TARGET_SYSTEMS_SYSTEMSSUBTARGET_H \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSTargetMachine.cpp b/llvm/lib/Target/SystemS/SystemSTargetMachine.cpp index f959626c81921..99dbe0a06df42 100644 --- a/llvm/lib/Target/SystemS/SystemSTargetMachine.cpp +++ b/llvm/lib/Target/SystemS/SystemSTargetMachine.cpp @@ -6,30 +6,41 @@ #include "llvm/CodeGen/TargetPassConfig.h" #include "llvm/MC/TargetRegistry.h" +#include "SystemS.h" #include "SystemSTargetMachine.h" #include "TargetInfo/SystemSTargetInfo.h" using namespace llvm; -extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemSTarget() { - RegisterTargetMachine A(getTheSystemSTarget()); -} +namespace { -static std::string computeDataLayout(const Triple &TT, StringRef CPU, - const TargetOptions &Options, - bool IsLittle) { +std::string computeDataLayout(const Triple &TT, StringRef CPU, + const TargetOptions &Options, bool IsLittle) { std::string Ret = "e-m:e-p:32:32-i8:8:32-i16:16:32-i64:64-n32"; return Ret; } -static Reloc::Model getEffectiveRelocModel(bool JIT, - std::optional RM) { - if (!RM || JIT) { - return Reloc::Static; - } - return *RM; +Reloc::Model getEffectiveRelocModel(bool JIT, std::optional RM) { + return Reloc::Static; } +class SystemSPassConfig : public TargetPassConfig { +public: + SystemSPassConfig(SystemSTargetMachine &TM, PassManagerBase &PM) + : TargetPassConfig(TM, PM) {} + + SystemSTargetMachine &getSystemSTargetMachine() const { + return getTM(); + } + + bool addInstSelector() override { + addPass(createSystemSISelDag(getSystemSTargetMachine(), getOptLevel())); + return false; + } +}; + +} // namespace + SystemSTargetMachine::SystemSTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -41,7 +52,8 @@ SystemSTargetMachine::SystemSTargetMachine(const Target &T, const Triple &TT, TT, CPU, FS, Options, getEffectiveRelocModel(JIT, RM), getEffectiveCodeModel(CM, CodeModel::Small), OL), - TLOF(std::make_unique()) { + TLOF(std::make_unique()), + Subtarget(TT, std::string(CPU), std::string(FS), *this) { initAsmInfo(); } @@ -54,5 +66,18 @@ SystemSTargetMachine::SystemSTargetMachine(const Target &T, const Triple &TT, : SystemSTargetMachine(T, TT, CPU, FS, Options, RM, CM, OL, JIT, true) {} TargetPassConfig *SystemSTargetMachine::createPassConfig(PassManagerBase &PM) { - return new TargetPassConfig(*this, PM); + return new SystemSPassConfig(*this, PM); +} + +TargetLoweringObjectFile *SystemSTargetMachine::getObjFileLowering() const { + return TLOF.get(); +} + +const llvm::SystemSSubtarget * +llvm::SystemSTargetMachine::getSubtargetImpl(const Function &) const { + return &Subtarget; +} + +extern "C" LLVM_EXTERNAL_VISIBILITY void LLVMInitializeSystemSTarget() { + RegisterTargetMachine A(getTheSystemSTarget()); } \ No newline at end of file diff --git a/llvm/lib/Target/SystemS/SystemSTargetMachine.h b/llvm/lib/Target/SystemS/SystemSTargetMachine.h index 24ab558e5b41a..ca1af9e6ebeaf 100644 --- a/llvm/lib/Target/SystemS/SystemSTargetMachine.h +++ b/llvm/lib/Target/SystemS/SystemSTargetMachine.h @@ -1,24 +1,23 @@ - #ifndef LLVM_LIB_TARGET_SYSTEMS_SYSTEMSTARGETMACHINE_H #define LLVM_LIB_TARGET_SYSTEMS_SYSTEMSTARGETMACHINE_H -#include +#include "SystemSSubtarget.h" #include "llvm/CodeGen/CodeGenTargetMachineImpl.h" +#include + namespace llvm { extern Target TheSystemSTarget; class SystemSTargetMachine : public CodeGenTargetMachineImpl { - std::unique_ptr TLOF; - -public: +public: /* Constructos and destructors */ SystemSTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, std::optional RM, std::optional CM, CodeGenOptLevel OL, - bool JIT, bool isLittle); + bool JIT, bool IsLittle); SystemSTargetMachine(const Target &T, const Triple &TT, StringRef CPU, StringRef FS, const TargetOptions &Options, @@ -26,10 +25,15 @@ class SystemSTargetMachine : public CodeGenTargetMachineImpl { std::optional CM, CodeGenOptLevel OL, bool JIT); +public: /* Public interface */ TargetPassConfig *createPassConfig(PassManagerBase &PM) override; - TargetLoweringObjectFile *getObjFileLowering() const override { - return TLOF.get(); - } + + TargetLoweringObjectFile *getObjFileLowering() const override; + const SystemSSubtarget *getSubtargetImpl(const Function &) const override; + +private: /* Private data */ + std::unique_ptr TLOF; + SystemSSubtarget Subtarget; }; } // end namespace llvm diff --git a/llvm/test/CodeGen/SystemS/barebone-check-asm.ll b/llvm/test/CodeGen/SystemS/barebone-check-asm.ll new file mode 100644 index 0000000000000..1c93d204350b0 --- /dev/null +++ b/llvm/test/CodeGen/SystemS/barebone-check-asm.ll @@ -0,0 +1,5 @@ +; RUN: llc -march=systems -filetype=asm < %s | FileCheck %s +define void @test-asm() { + ret void +} +; CHECK: "test-asm" diff --git a/llvm/test/CodeGen/SystemS/barebone-check-bin.ll b/llvm/test/CodeGen/SystemS/barebone-check-bin.ll new file mode 100644 index 0000000000000..6d43e8742b887 --- /dev/null +++ b/llvm/test/CodeGen/SystemS/barebone-check-bin.ll @@ -0,0 +1,5 @@ +; RUN: llc -march=systems < %s | FileCheck %s +define void @test-asm() { + ret void +} +; CHECK: "test-asm" diff --git a/llvm/test/CodeGen/SystemS/barebone-check.ll b/llvm/test/CodeGen/SystemS/barebone-check.ll new file mode 100644 index 0000000000000..c1f38c654b049 --- /dev/null +++ b/llvm/test/CodeGen/SystemS/barebone-check.ll @@ -0,0 +1 @@ +; RUN: llc -march=systems -verify-machineinstrs < %s \ No newline at end of file diff --git a/llvm/test/CodeGen/SystemS/lit.local.cfg b/llvm/test/CodeGen/SystemS/lit.local.cfg new file mode 100644 index 0000000000000..a76e135aced1f --- /dev/null +++ b/llvm/test/CodeGen/SystemS/lit.local.cfg @@ -0,0 +1,2 @@ +if not "SystemS" in config.root.targets: + config.unsupported = True diff --git a/tablegen_compile_commands.yml b/tablegen_compile_commands.yml new file mode 100644 index 0000000000000..d4e58101bdb07 --- /dev/null +++ b/tablegen_compile_commands.yml @@ -0,0 +1,510 @@ +--- !FileInfo: + filepath: "/home/sabitov-kirill/Code/itmo-courses/llvm-project/llvm/include/llvm/CodeGen/ValueTypes.td" + includes: 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