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tonymac32: rk3328: sdmmc0 drive level change to 8mA (torvalds#38)
SD Instability has been a commonly reported issue on RK3328 boards, the Rockchip default drive level of 4mA is unable to reliably drive any significant capacitive load (even within SD card specification) at 50MHz high speed, especially with 3.3V signalling. Further testing may indicate a need for 12mA, but for now this patch has been shown to resolve SD boot and stability issues on several boards, including Rock64 and a Renegade. The issue spanning multiple boards is why I didn't simply override the settings in the board specific DTS. It may also be important to note the ASUS Tinker Board (RK3288) uses 8mA drive levels. This may be worth evaluating for RK3399 as well. ayufan d7ab0c3
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arch/arm64/boot/dts/rockchip/rk3328.dtsi

Lines changed: 11 additions & 11 deletions
Original file line numberDiff line numberDiff line change
@@ -1261,10 +1261,10 @@
12611261
emmc: dwmmc@ff520000 {
12621262
compatible = "rockchip,rk3328-dw-mshc", "rockchip,rk3288-dw-mshc";
12631263
reg = <0x0 0xff520000 0x0 0x4000>;
1264-
clock-freq-min-max = <400000 150000000>;
1264+
max-frequency = <150000000>;
12651265
clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
12661266
<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
1267-
clock-names = "biu", "ciu", "ciu-drv", "ciu-sample";
1267+
clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
12681268
fifo-depth = <0x100>;
12691269
interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
12701270
status = "disabled";
@@ -2147,35 +2147,35 @@
21472147
sdmmc0 {
21482148
sdmmc0_clk: sdmmc0-clk {
21492149
rockchip,pins =
2150-
<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none_4ma>;
2150+
<1 RK_PA6 RK_FUNC_1 &pcfg_pull_none_8ma>;
21512151
};
21522152

21532153
sdmmc0_cmd: sdmmc0-cmd {
21542154
rockchip,pins =
2155-
<1 RK_PA4 RK_FUNC_1 &pcfg_pull_up_4ma>;
2155+
<1 RK_PA4 RK_FUNC_1 &pcfg_pull_up_8ma>;
21562156
};
21572157

21582158
sdmmc0_dectn: sdmmc0-dectn {
21592159
rockchip,pins =
2160-
<1 RK_PA5 RK_FUNC_1 &pcfg_pull_up_4ma>;
2160+
<1 RK_PA5 RK_FUNC_1 &pcfg_pull_up_8ma>;
21612161
};
21622162

21632163
sdmmc0_wrprt: sdmmc0-wrprt {
21642164
rockchip,pins =
2165-
<1 RK_PA7 RK_FUNC_1 &pcfg_pull_up_4ma>;
2165+
<1 RK_PA7 RK_FUNC_1 &pcfg_pull_up_8ma>;
21662166
};
21672167

21682168
sdmmc0_bus1: sdmmc0-bus1 {
21692169
rockchip,pins =
2170-
<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_4ma>;
2170+
<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_8ma>;
21712171
};
21722172

21732173
sdmmc0_bus4: sdmmc0-bus4 {
21742174
rockchip,pins =
2175-
<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_4ma>,
2176-
<1 RK_PA1 RK_FUNC_1 &pcfg_pull_up_4ma>,
2177-
<1 RK_PA2 RK_FUNC_1 &pcfg_pull_up_4ma>,
2178-
<1 RK_PA3 RK_FUNC_1 &pcfg_pull_up_4ma>;
2175+
<1 RK_PA0 RK_FUNC_1 &pcfg_pull_up_8ma>,
2176+
<1 RK_PA1 RK_FUNC_1 &pcfg_pull_up_8ma>,
2177+
<1 RK_PA2 RK_FUNC_1 &pcfg_pull_up_8ma>,
2178+
<1 RK_PA3 RK_FUNC_1 &pcfg_pull_up_8ma>;
21792179
};
21802180

21812181
sdmmc0_gpio: sdmmc0-gpio {

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