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Albion Fung
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[PowerPC][Power10] Fix XXSPLI32DX not correctly exploiting specific cases
Some cases may be transformed into 32 bit splats before hitting the boolean statement, which may cause incorrect behaviour and provide XXSPLTI32DX with the incorrect values of splat. The condition was reversed so that the shortcut prevents this problem. Differential Revision: https://reviews.llvm.org/D95634
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-18
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2 files changed

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-18
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llvm/lib/Target/PowerPC/PPCISelLowering.cpp

Lines changed: 7 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -8604,16 +8604,19 @@ SDValue PPCTargetLowering::LowerBUILD_VECTOR(SDValue Op,
86048604

86058605
// If it is a splat of a double, check if we can shrink it to a 32 bit
86068606
// non-denormal float which when converted back to double gives us the same
8607-
// double. This is to exploit the XXSPLTIDP instruction.+ // If we lose precision, we use XXSPLTI32DX.
8607+
// double. This is to exploit the XXSPLTIDP instruction.
8608+
// If we lose precision, we use XXSPLTI32DX.
86088609
if (BVNIsConstantSplat && (SplatBitSize == 64) &&
86098610
Subtarget.hasPrefixInstrs()) {
8610-
if (convertToNonDenormSingle(APSplatBits) &&
8611-
(Op->getValueType(0) == MVT::v2f64)) {
8611+
// Check the type first to short-circuit so we don't modify APSplatBits if
8612+
// this block isn't executed.
8613+
if ((Op->getValueType(0) == MVT::v2f64) &&
8614+
convertToNonDenormSingle(APSplatBits)) {
86128615
SDValue SplatNode = DAG.getNode(
86138616
PPCISD::XXSPLTI_SP_TO_DP, dl, MVT::v2f64,
86148617
DAG.getTargetConstant(APSplatBits.getZExtValue(), dl, MVT::i32));
86158618
return DAG.getBitcast(Op.getValueType(), SplatNode);
8616-
} else if (APSplatBits.getBitWidth() == 64) {
8619+
} else {
86178620
// We may lose precision, so we have to use XXSPLTI32DX.
86188621

86198622
uint32_t Hi =

llvm/test/CodeGen/PowerPC/p10-splatImm32.ll

Lines changed: 2 additions & 14 deletions
Original file line numberDiff line numberDiff line change
@@ -101,23 +101,11 @@ entry:
101101
ret <8 x i16> <i16 291, i16 undef, i16 undef, i16 364, i16 undef, i16 1, i16 173, i16 undef>
102102
}
103103

104-
define dso_local <16 x i8> @test_xxsplti32dx_10() {
105-
; CHECK-LABEL: test_xxsplti32dx_10:
106-
; CHECK: # %bb.0: # %entry
107-
; CHECK-NEXT: xxlxor vs34, vs34, vs34
108-
; CHECK-NEXT: xxsplti32dx vs34, 0, 1207959552
109-
; CHECK-NEXT: blr
110-
entry:
111-
ret <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 72, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 72>
112-
}
113-
114-
; FIXME: It appears that there is something wrong with the computation
115-
; of the 64-bit constant to splat so we cannot emit xxsplti32dx for
116-
; this test case for now.
117104
define dso_local <16 x i8> @constSplatBug() {
118105
; CHECK-LABEL: constSplatBug:
119106
; CHECK: # %bb.0: # %entry
120-
; CHECK-NEXT: plxv vs34, .LCPI10_0@PCREL(0), 1
107+
; CHECK-NEXT: xxlxor vs34, vs34, vs34
108+
; CHECK-NEXT: xxsplti32dx vs34, 0, 1191182336
121109
; CHECK-NEXT: blr
122110
entry:
123111
ret <16 x i8> <i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 71, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 0, i8 71>

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