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document & cite Intel 4004
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Makefile

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@@ -10,6 +10,7 @@ PDF_ARGS=-sDEVICE=pdfwrite\
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# these will be optimized for "screen"
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PDFS=ref/Intel\ Chips\ timeline.pdf\
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ref/Intel\ 4004.pdf\
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ref/Intel\ 8085.pdf\
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ref/MOS\ 6510.pdf
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@@ -41,6 +42,7 @@ ref/Hitachi\ HD64180\ Hardware\ Manual\ 4th\ Edition.pdf: ref/originals/HD64180Z
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rm /tmp/HD64180-?.pdf
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ref/Intel\ Chips\ timeline.pdf: ref/originals/Intel\ Chips\ timeline.pdf
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ref/Intel\ 4004.pdf: ref/originals/Intel\ 4004.pdf
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ref/Intel\ 8085.pdf: ref/originals/Intel\ 8085.pdf
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ref/MOS\ 6510.pdf: ref/originals/MOS\ 6510.pdf
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ref/Intel 4004.pdf

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src/cpu-bitness.tex

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@@ -118,7 +118,8 @@ \section{Introduction}
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numbers are supported as 2 word data type, all other data are 1 word, erasable memory
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addresses need 8 bits, fixed memory addresses require 16} \cite{agc} & 1961 & 15/30 & 15/30 & 8/16 & N/A & Apollo Spacecraft \\
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\hline
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Intel 4004 & 1971 & & & & & \\
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Intel 4004\tablefootnote{bus has one pin to select ROM and 4 pins to select the RAM bank,
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4 pins are used bi-directional for both address selection and data transfers} \cite{intel4004} & 1971 & 8/16 & 4 & 12 & 9 & Busicom 141-PF \\
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\hline
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Intel 8008\tablefootnote{bus is used bi-directional for both address selection and data
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transfers} \cite{intel8008} & 1972 & 8/16/22 & 8 & 14 & 8 & MCS-8, Mark-8 \\
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\textit{Intel Chips timeline}.
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Intel Corporation, 2012.
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\bibitem{intel4004}
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\textit{Intel 4004 SINGLE CHIP 4-BIT P-CHANNEL MICROPROCESSOR}.
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Address \& Bus: Page 2, Instructions \& Data: Page 3.
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Intel Corporation, March 1987.
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\bibitem{intel8008}
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\textit{Intel 8008/8008-1 EIGHT-BIT MICROPROCESSOR}.
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Address: Page 1, Bus: Page 2, Instructions \& Data: Page 3.

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