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system: F4: update STM32F4xx CMSIS Drivers to v2.6.7
Included in STM32CubeF4 FW v1.26.2 Signed-off-by: Frederic Pillon <[email protected]>
1 parent 7c2c0f7 commit 0ac2537

27 files changed

+4733
-552
lines changed

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xc.h

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@@ -815,6 +815,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -2371,6 +2379,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
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#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
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#define FLASH_CR_ERRIE_Pos (25U)
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#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
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#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
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#define FLASH_CR_LOCK_Pos (31U)
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#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
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#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f401xe.h

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@@ -815,6 +815,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -2371,6 +2379,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
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#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
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#define FLASH_CR_ERRIE_Pos (25U)
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#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
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#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
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#define FLASH_CR_LOCK_Pos (31U)
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#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
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#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f405xx.h

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@@ -1045,6 +1045,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -6460,6 +6468,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
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#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
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#define FLASH_CR_ERRIE_Pos (25U)
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#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
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#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
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#define FLASH_CR_LOCK_Pos (31U)
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#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
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#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f407xx.h

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@@ -1149,6 +1149,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -6760,6 +6768,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
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#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
6771+
#define FLASH_CR_ERRIE_Pos (25U)
6772+
#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
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#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
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#define FLASH_CR_LOCK_Pos (31U)
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#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
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#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f410cx.h

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@@ -713,6 +713,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -2450,6 +2458,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
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#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
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#define FLASH_CR_ERRIE_Pos (25U)
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#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
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#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
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#define FLASH_CR_LOCK_Pos (31U)
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#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
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#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f410rx.h

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@@ -713,6 +713,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -2450,6 +2458,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
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#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
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#define FLASH_CR_ERRIE_Pos (25U)
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#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
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#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
24532464
#define FLASH_CR_LOCK_Pos (31U)
24542465
#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
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#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f410tx.h

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@@ -703,6 +703,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -2440,6 +2448,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
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#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
2451+
#define FLASH_CR_ERRIE_Pos (25U)
2452+
#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
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#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
24432454
#define FLASH_CR_LOCK_Pos (31U)
24442455
#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
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#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f411xe.h

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@@ -818,6 +818,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -2374,6 +2382,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
23762384
#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
2385+
#define FLASH_CR_ERRIE_Pos (25U)
2386+
#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
2387+
#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
23772388
#define FLASH_CR_LOCK_Pos (31U)
23782389
#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
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#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f412cx.h

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@@ -1008,6 +1008,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
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* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -6524,6 +6532,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
65266534
#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
6535+
#define FLASH_CR_ERRIE_Pos (25U)
6536+
#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
6537+
#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
65276538
#define FLASH_CR_LOCK_Pos (31U)
65286539
#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
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#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

‎system/Drivers/CMSIS/Device/ST/STM32F4xx/Include/stm32f412rx.h

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@@ -1062,6 +1062,14 @@ typedef struct
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* @{
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*/
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/** @addtogroup Hardware_Constant_Definition
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* @{
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*/
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#define LSI_STARTUP_TIME 40U /*!< LSI Maximum startup time in us */
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/**
1070+
* @}
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*/
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/** @addtogroup Peripheral_Registers_Bits_Definition
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* @{
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*/
@@ -6578,6 +6586,9 @@ typedef struct
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#define FLASH_CR_EOPIE_Pos (24U)
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#define FLASH_CR_EOPIE_Msk (0x1UL << FLASH_CR_EOPIE_Pos) /*!< 0x01000000 */
65806588
#define FLASH_CR_EOPIE FLASH_CR_EOPIE_Msk
6589+
#define FLASH_CR_ERRIE_Pos (25U)
6590+
#define FLASH_CR_ERRIE_Msk (0x1UL << FLASH_CR_ERRIE_Pos)
6591+
#define FLASH_CR_ERRIE FLASH_CR_ERRIE_Msk
65816592
#define FLASH_CR_LOCK_Pos (31U)
65826593
#define FLASH_CR_LOCK_Msk (0x1UL << FLASH_CR_LOCK_Pos) /*!< 0x80000000 */
65836594
#define FLASH_CR_LOCK FLASH_CR_LOCK_Msk

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