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[G4] Add Nucleo-G431RB support
Signed-off-by: Frederic.Pillon <[email protected]>
1 parent 8ebe376 commit 451a6b2

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‎README.md

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@@ -62,6 +62,7 @@ User can add a STM32 based board following this [wiki](https://github.com/stm32d
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| :green_heart: | [Nucleo F411RE](http://www.st.com/en/evaluation-tools/nucleo-f411re.html) | *0.2.1* | |
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| :green_heart: | [Nucleo F446RE](http://www.st.com/en/evaluation-tools/nucleo-f446re.html) | *1.1.1* | |
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| :green_heart: | [Nucleo-G071RB](https://www.st.com/en/evaluation-tools/nucleo-g071rb.html) | *1.6.0* | |
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| :yellow_heart: | [Nucleo-G431RB](https://www.st.com/en/evaluation-tools/nucleo-g431rb.html) | **1.7.0** | |
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| :yellow_heart: | [Nucleo-G474RE](https://www.st.com/en/evaluation-tools/nucleo-g474re.html) | **1.7.0** | |
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| :green_heart: | [Nucleo L053R8](http://www.st.com/en/evaluation-tools/nucleo-l053r8.html) | *0.1.0* | |
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| :green_heart: | [Nucleo L073RZ](http://www.st.com/en/evaluation-tools/nucleo-l073rz.html) | *1.4.0* | |

‎boards.txt

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@@ -268,6 +268,18 @@ Nucleo_64.menu.pnum.NUCLEO_G071RB.build.variant=NUCLEO_G071RB
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Nucleo_64.menu.pnum.NUCLEO_G071RB.build.cmsis_lib_gcc=arm_cortexM0l_math
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Nucleo_64.menu.pnum.NUCLEO_G071RB.build.extra_flags=-D{build.product_line} {build.enable_usb} {build.xSerial} -D__CORTEX_SC=0
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# NUCLEO_G431RB board
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Nucleo_64.menu.pnum.NUCLEO_G431RB=Nucleo G431RB
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Nucleo_64.menu.pnum.NUCLEO_G431RB.node=NODE_G431RB
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Nucleo_64.menu.pnum.NUCLEO_G431RB.upload.maximum_size=131072
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Nucleo_64.menu.pnum.NUCLEO_G431RB.upload.maximum_data_size=32768
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Nucleo_64.menu.pnum.NUCLEO_G431RB.build.mcu=cortex-m4 -mfpu=fpv4-sp-d16 -mfloat-abi=hard
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Nucleo_64.menu.pnum.NUCLEO_G431RB.build.board=NUCLEO_G431RB
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Nucleo_64.menu.pnum.NUCLEO_G431RB.build.series=STM32G4xx
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Nucleo_64.menu.pnum.NUCLEO_G431RB.build.product_line=STM32G431xx
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Nucleo_64.menu.pnum.NUCLEO_G431RB.build.variant=NUCLEO_G431RB
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Nucleo_64.menu.pnum.NUCLEO_G431RB.build.cmsis_lib_gcc=arm_cortexM4l_math
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# NUCLEO_G474RE board
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Nucleo_64.menu.pnum.NUCLEO_G474RE=Nucleo G474RE
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Nucleo_64.menu.pnum.NUCLEO_G474RE.node=NODE_G474RE

‎variants/NUCLEO_G431RB/PeripheralPins.c

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‎variants/NUCLEO_G431RB/PinNamesVar.h

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/* SYS_WKUP */
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#ifdef PWR_WAKEUP_PIN1
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SYS_WKUP1 = PA_0,
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#endif
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#ifdef PWR_WAKEUP_PIN2
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SYS_WKUP2 = PC_13,
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#endif
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#ifdef PWR_WAKEUP_PIN3
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SYS_WKUP3 = PE_6,
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#endif
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#ifdef PWR_WAKEUP_PIN4
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SYS_WKUP4 = PA_2,
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#endif
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#ifdef PWR_WAKEUP_PIN5
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SYS_WKUP5 = PC_5,
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#endif
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#ifdef PWR_WAKEUP_PIN6
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SYS_WKUP6 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN7
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SYS_WKUP7 = NC,
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#endif
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#ifdef PWR_WAKEUP_PIN8
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SYS_WKUP8 = NC,
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#endif
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/* USB */
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#ifdef USBCON
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USB_DM = PA_11,
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USB_DP = PA_12,
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#endif

‎variants/NUCLEO_G431RB/ldscript.ld

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/*
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******************************************************************************
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**
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** File : LinkerScript.ld
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**
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** Author : Auto-generated by Ac6 System Workbench
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**
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** Abstract : Linker script for STM32G431RBTx series
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** 128Kbytes FLASH and 32Kbytes RAM
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**
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** Set heap size, stack size and stack location according
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** to application requirements.
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**
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** Set memory bank area and size if external memory is used.
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**
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** Target : STMicroelectronics STM32
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**
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** Distribution: The file is distributed “as is,” without any warranty
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** of any kind.
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**
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*****************************************************************************
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** @attention
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**
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** <h2><center>&copy; COPYRIGHT(c) 2014 Ac6</center></h2>
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**
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** Redistribution and use in source and binary forms, with or without modification,
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** are permitted provided that the following conditions are met:
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** 1. Redistributions of source code must retain the above copyright notice,
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** this list of conditions and the following disclaimer.
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** 2. Redistributions in binary form must reproduce the above copyright notice,
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** this list of conditions and the following disclaimer in the documentation
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** and/or other materials provided with the distribution.
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** 3. Neither the name of Ac6 nor the names of its contributors
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** may be used to endorse or promote products derived from this software
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** without specific prior written permission.
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**
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** THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
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** AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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** IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
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** DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
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** FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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** DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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** SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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** CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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** OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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** OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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**
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*****************************************************************************
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*/
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/* Entry Point */
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ENTRY(Reset_Handler)
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/* Highest address of the user mode stack */
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_estack = 0x20008000; /* end of RAM */
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/* Generate a link error if heap and stack don't fit into RAM */
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_Min_Heap_Size = 0x200; /* required amount of heap */
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_Min_Stack_Size = 0x400; /* required amount of stack */
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/* Specify the memory areas */
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MEMORY
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{
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RAM (xrw) : ORIGIN = 0x20000000, LENGTH = 32K
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FLASH (rx) : ORIGIN = 0x8000000, LENGTH = 128K
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}
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/* Define output sections */
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SECTIONS
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{
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/* The startup code goes first into FLASH */
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.isr_vector :
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{
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. = ALIGN(4);
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KEEP(*(.isr_vector)) /* Startup code */
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. = ALIGN(4);
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} >FLASH
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/* The program code and other data goes into FLASH */
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.text :
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{
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. = ALIGN(4);
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*(.text) /* .text sections (code) */
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*(.text*) /* .text* sections (code) */
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*(.glue_7) /* glue arm to thumb code */
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*(.glue_7t) /* glue thumb to arm code */
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*(.eh_frame)
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KEEP (*(.init))
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KEEP (*(.fini))
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. = ALIGN(4);
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_etext = .; /* define a global symbols at end of code */
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} >FLASH
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/* Constant data goes into FLASH */
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.rodata :
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{
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. = ALIGN(4);
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*(.rodata) /* .rodata sections (constants, strings, etc.) */
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*(.rodata*) /* .rodata* sections (constants, strings, etc.) */
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. = ALIGN(4);
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} >FLASH
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.ARM.extab : { *(.ARM.extab* .gnu.linkonce.armextab.*) } >FLASH
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.ARM : {
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__exidx_start = .;
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*(.ARM.exidx*)
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__exidx_end = .;
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} >FLASH
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.preinit_array :
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{
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PROVIDE_HIDDEN (__preinit_array_start = .);
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KEEP (*(.preinit_array*))
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PROVIDE_HIDDEN (__preinit_array_end = .);
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} >FLASH
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.init_array :
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{
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PROVIDE_HIDDEN (__init_array_start = .);
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KEEP (*(SORT(.init_array.*)))
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KEEP (*(.init_array*))
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PROVIDE_HIDDEN (__init_array_end = .);
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} >FLASH
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.fini_array :
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{
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PROVIDE_HIDDEN (__fini_array_start = .);
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KEEP (*(SORT(.fini_array.*)))
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KEEP (*(.fini_array*))
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PROVIDE_HIDDEN (__fini_array_end = .);
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} >FLASH
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/* used by the startup to initialize data */
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_sidata = LOADADDR(.data);
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/* Initialized data sections goes into RAM, load LMA copy after code */
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.data :
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{
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. = ALIGN(4);
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_sdata = .; /* create a global symbol at data start */
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*(.data) /* .data sections */
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*(.data*) /* .data* sections */
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. = ALIGN(4);
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_edata = .; /* define a global symbol at data end */
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} >RAM AT> FLASH
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/* Uninitialized data section */
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. = ALIGN(4);
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.bss :
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{
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/* This is used by the startup in order to initialize the .bss secion */
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_sbss = .; /* define a global symbol at bss start */
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__bss_start__ = _sbss;
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*(.bss)
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*(.bss*)
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*(COMMON)
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. = ALIGN(4);
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_ebss = .; /* define a global symbol at bss end */
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__bss_end__ = _ebss;
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} >RAM
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/* User_heap_stack section, used to check that there is enough RAM left */
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._user_heap_stack :
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{
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. = ALIGN(8);
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PROVIDE ( end = . );
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PROVIDE ( _end = . );
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. = . + _Min_Heap_Size;
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. = . + _Min_Stack_Size;
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. = ALIGN(8);
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} >RAM
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/* Remove information from the standard libraries */
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/DISCARD/ :
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{
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libc.a ( * )
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libm.a ( * )
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libgcc.a ( * )
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}
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.ARM.attributes 0 : { *(.ARM.attributes) }
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}
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‎variants/NUCLEO_G431RB/variant.cpp

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/*
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*******************************************************************************
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* Copyright (c) 2019, STMicroelectronics
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* All rights reserved.
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*
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* This software component is licensed by ST under BSD 3-Clause license,
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* the "License"; You may not use this file except in compliance with the
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* License. You may obtain a copy of the License at:
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* opensource.org/licenses/BSD-3-Clause
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*
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*******************************************************************************
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*/
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#include "pins_arduino.h"
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#ifdef __cplusplus
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extern "C" {
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#endif
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// Pin number
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const PinName digitalPin[] = {
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// CN9
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PC_5, //D0
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PC_4, //D1
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PA_10, //D2
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PB_3, //D3
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PB_5, //D4
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PB_4, //D5
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PB_10, //D6
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PA_8, //D7
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// CN5
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PA_9, //D8
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PC_7, //D9
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PB_6, //D10
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PA_7, //D11
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PA_6, //D12
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PA_5, //D13/LED
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PB_9, //D14
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PB_8, //D15
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// CN7 Left Side
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PC_10, //D16
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PC_12, //D17
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PA_13, //D18/SWDIO
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PA_14, //D19/SWCLK
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PA_15, //D20
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PB_7, //D21
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PC_13, //D22
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PC_14, //D23
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PC_15, //D24
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PF_0, //D25
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PF_1, //D26
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PC_2, //D27
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PC_3, //D28
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// CN7 Right Side
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PD_2, //D29
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PC_11, //D30
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// CN10 Left Side
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PC_9, //D31
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// CN8
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PA_0, //D32/A0
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PA_1, //D33/A1
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PA_4, //D34/A2
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PB_0, //D35/A3
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PC_1, //D36/A4
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PC_0, //D37/A5
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// CN10 Right side
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PB_14, //D38/A6
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PB_15, //D39/A7
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PB_1, //D40/A8
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PB_2, //D41/A9
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PB_11, //D42/A10
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PB_12, //D43/A11
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PB_13, //D44
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PA_11, //D45
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PA_12, //D46
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PC_6, //D47
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PC_8, //D48
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PA_2, //D49
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PA_3 //D50
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};
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#ifdef __cplusplus
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}
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#endif
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// ----------------------------------------------------------------------------
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**
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* @brief System Clock Configuration
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*/
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WEAK void SystemClock_Config(void)
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{
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RCC_OscInitTypeDef RCC_OscInitStruct = {};
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RCC_ClkInitTypeDef RCC_ClkInitStruct = {};
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#ifdef USBCON
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RCC_PeriphCLKInitTypeDef PeriphClkInit = {};
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#endif
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/* Configure the main internal regulator output voltage */
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HAL_PWREx_ControlVoltageScaling(PWR_REGULATOR_VOLTAGE_SCALE1_BOOST);
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/* Initializes the CPU, AHB and APB busses clocks */
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RCC_OscInitStruct.OscillatorType = RCC_OSCILLATORTYPE_HSI | RCC_OSCILLATORTYPE_HSI48;
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RCC_OscInitStruct.HSIState = RCC_HSI_ON;
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RCC_OscInitStruct.HSICalibrationValue = RCC_HSICALIBRATION_DEFAULT;
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RCC_OscInitStruct.HSI48State = RCC_HSI48_ON;
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RCC_OscInitStruct.PLL.PLLState = RCC_PLL_ON;
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RCC_OscInitStruct.PLL.PLLSource = RCC_PLLSOURCE_HSI;
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RCC_OscInitStruct.PLL.PLLM = RCC_PLLM_DIV4;
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RCC_OscInitStruct.PLL.PLLN = 85;
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RCC_OscInitStruct.PLL.PLLP = RCC_PLLP_DIV2;
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RCC_OscInitStruct.PLL.PLLQ = RCC_PLLQ_DIV2;
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RCC_OscInitStruct.PLL.PLLR = RCC_PLLR_DIV2;
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if (HAL_RCC_OscConfig(&RCC_OscInitStruct) != HAL_OK) {
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Error_Handler();
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}
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/* Initializes the CPU, AHB and APB busses clocks */
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RCC_ClkInitStruct.ClockType = RCC_CLOCKTYPE_HCLK | RCC_CLOCKTYPE_SYSCLK
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| RCC_CLOCKTYPE_PCLK1 | RCC_CLOCKTYPE_PCLK2;
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RCC_ClkInitStruct.SYSCLKSource = RCC_SYSCLKSOURCE_PLLCLK;
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RCC_ClkInitStruct.AHBCLKDivider = RCC_SYSCLK_DIV1;
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RCC_ClkInitStruct.APB1CLKDivider = RCC_HCLK_DIV1;
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RCC_ClkInitStruct.APB2CLKDivider = RCC_HCLK_DIV1;
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if (HAL_RCC_ClockConfig(&RCC_ClkInitStruct, FLASH_LATENCY_8) != HAL_OK) {
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Error_Handler();
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}
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#ifdef USBCON
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/* Initializes the peripherals clocks */
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PeriphClkInit.PeriphClockSelection = RCC_PERIPHCLK_USB;
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PeriphClkInit.UsbClockSelection = RCC_USBCLKSOURCE_HSI48;
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if (HAL_RCCEx_PeriphCLKConfig(&PeriphClkInit) != HAL_OK) {
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Error_Handler();
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}
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#endif
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}
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#ifdef __cplusplus
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}
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#endif

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