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[msan] Add handleIntrinsicByApplyingToShadow and support NEON tbl intrinsics
This adds a general function that handles intrinsics by applying the intrinsic to the shadows, and applies it to the specific case of Arm NEON TBL intrinsics. This also updates the tests from llvm#114462
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3 files changed

+1333
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llvm/lib/Transforms/Instrumentation/MemorySanitizer.cpp

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@@ -3944,6 +3944,30 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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}
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}
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/// Handle intrinsics by applying the intrinsic to the shadows.
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/// The origin is approximated using setOriginForNaryOp.
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///
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/// For example, this can be applied to the Arm NEON vector table intrinsics
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/// (tbl{1,2,3,4}).
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void handleIntrinsicByApplyingToShadow(IntrinsicInst &I, unsigned int numArgOperands) {
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IRBuilder<> IRB(&I);
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// Don't use getNumOperands() because it includes the callee
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assert (numArgOperands == I.arg_size());
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SmallVector<Value *, 8> ShadowArgs;
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for (unsigned int i = 0; i < numArgOperands; i++) {
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Value *Shadow = getShadow(&I, i);
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ShadowArgs.append(1, Shadow);
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}
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CallInst *CI =
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IRB.CreateIntrinsic(I.getType(), I.getIntrinsicID(), ShadowArgs);
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setShadow(&I, CI);
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setOriginForNaryOp(I);
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}
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void visitIntrinsicInst(IntrinsicInst &I) {
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switch (I.getIntrinsicID()) {
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case Intrinsic::uadd_with_overflow:
@@ -4319,6 +4343,25 @@ struct MemorySanitizerVisitor : public InstVisitor<MemorySanitizerVisitor> {
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break;
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}
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// Arm NEON vector table intrinsics have the source/table register(s),
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// followed by the index register. They return the output.
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case Intrinsic::aarch64_neon_tbl1: {
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handleIntrinsicByApplyingToShadow(I, 2);
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break;
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}
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case Intrinsic::aarch64_neon_tbl2: {
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handleIntrinsicByApplyingToShadow(I, 3);
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break;
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}
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case Intrinsic::aarch64_neon_tbl3: {
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handleIntrinsicByApplyingToShadow(I, 4);
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break;
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}
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case Intrinsic::aarch64_neon_tbl4: {
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handleIntrinsicByApplyingToShadow(I, 5);
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break;
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}
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default:
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if (!handleUnknownIntrinsic(I))
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visitInstruction(I);

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