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gwenzekgwenzek
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minimal compiler changes so that you can compile to nvptx
sample command: /home/guw/github/zig/stage2/bin/zig build-obj cuda_kernel.zig -target nvptx64-cuda -O ReleaseSafe this will create a kernel.ptx expose PtxKernel call convention from LLVM kernels are `export fn f() callconv(.PtxKernel)`
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12 files changed

+178
-9
lines changed

12 files changed

+178
-9
lines changed

‎lib/std/builtin.zig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -147,6 +147,7 @@ pub const CallingConvention = enum {
147147
AAPCS,
148148
AAPCSVFP,
149149
SysV,
150+
PtxKernel,
150151
};
151152

152153
/// This data structure is used by the Zig language code generation and

‎lib/std/target.zig

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -579,6 +579,8 @@ pub const Target = struct {
579579
raw,
580580
/// Plan 9 from Bell Labs
581581
plan9,
582+
/// Nvidia PTX format
583+
nvptx,
582584

583585
pub fn fileExt(of: ObjectFormat, cpu_arch: Cpu.Arch) [:0]const u8 {
584586
return switch (of) {
@@ -589,6 +591,7 @@ pub const Target = struct {
589591
.hex => ".ihex",
590592
.raw => ".bin",
591593
.plan9 => plan9Ext(cpu_arch),
594+
.nvptx => ".ptx",
592595
};
593596
}
594597
};
@@ -1391,6 +1394,7 @@ pub const Target = struct {
13911394
else => return switch (cpu_arch) {
13921395
.wasm32, .wasm64 => .wasm,
13931396
.spirv32, .spirv64 => .spirv,
1397+
.nvptx, .nvptx64 => .nvptx,
13941398
else => .elf,
13951399
},
13961400
};

‎lib/std/zig.zig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -181,6 +181,7 @@ pub fn binNameAlloc(allocator: std.mem.Allocator, options: BinNameOptions) error
181181
.Obj => return std.fmt.allocPrint(allocator, "{s}{s}", .{ root_name, ofmt.fileExt(target.cpu.arch) }),
182182
.Lib => return std.fmt.allocPrint(allocator, "{s}{s}.a", .{ target.libPrefix(), root_name }),
183183
},
184+
.nvptx => return std.fmt.allocPrint(allocator, "{s}", .{root_name}),
184185
}
185186
}
186187

‎src/Module.zig

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4146,7 +4146,7 @@ fn scanDecl(iter: *ScanDeclIter, decl_sub_index: usize, flags: u4) SemaError!voi
41464146
// in `Decl` to notice that the line number did not change.
41474147
mod.comp.work_queue.writeItemAssumeCapacity(.{ .update_line_number = decl });
41484148
},
4149-
.c, .wasm, .spirv => {},
4149+
.c, .wasm, .spirv, .nvptx => {},
41504150
}
41514151
}
41524152
}
@@ -4220,6 +4220,7 @@ pub fn clearDecl(
42204220
.c => .{ .c = {} },
42214221
.wasm => .{ .wasm = link.File.Wasm.DeclBlock.empty },
42224222
.spirv => .{ .spirv = {} },
4223+
.nvptx => .{ .nvptx = {} },
42234224
};
42244225
decl.fn_link = switch (mod.comp.bin_file.tag) {
42254226
.coff => .{ .coff = {} },
@@ -4229,6 +4230,7 @@ pub fn clearDecl(
42294230
.c => .{ .c = {} },
42304231
.wasm => .{ .wasm = link.File.Wasm.FnData.empty },
42314232
.spirv => .{ .spirv = .{} },
4233+
.nvptx => .{ .nvptx = .{} },
42324234
};
42334235
}
42344236
if (decl.getInnerNamespace()) |namespace| {
@@ -4554,6 +4556,7 @@ pub fn allocateNewDecl(
45544556
.c => .{ .c = {} },
45554557
.wasm => .{ .wasm = link.File.Wasm.DeclBlock.empty },
45564558
.spirv => .{ .spirv = {} },
4559+
.nvptx => .{ .nvptx = {} },
45574560
},
45584561
.fn_link = switch (mod.comp.bin_file.tag) {
45594562
.coff => .{ .coff = {} },
@@ -4563,6 +4566,7 @@ pub fn allocateNewDecl(
45634566
.c => .{ .c = {} },
45644567
.wasm => .{ .wasm = link.File.Wasm.FnData.empty },
45654568
.spirv => .{ .spirv = .{} },
4569+
.nvptx => .{ .nvptx = .{} },
45664570
},
45674571
.generation = 0,
45684572
.is_pub = false,

‎src/Sema.zig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3546,6 +3546,7 @@ pub fn analyzeExport(
35463546
.c => .{ .c = {} },
35473547
.wasm => .{ .wasm = {} },
35483548
.spirv => .{ .spirv = {} },
3549+
.nvptx => .{ .nvptx = {} },
35493550
},
35503551
.owner_decl = owner_decl,
35513552
.src_decl = src_decl,

‎src/codegen/llvm.zig

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -378,7 +378,7 @@ pub const Object = struct {
378378
const mod = comp.bin_file.options.module.?;
379379
const cache_dir = mod.zig_cache_artifact_directory;
380380

381-
const emit_bin_path: ?[*:0]const u8 = if (comp.bin_file.options.emit) |emit|
381+
var emit_bin_path: ?[*:0]const u8 = if (comp.bin_file.options.emit) |emit|
382382
try emit.basenamePath(arena, try arena.dupeZ(u8, comp.bin_file.intermediary_basename.?))
383383
else
384384
null;
@@ -4849,6 +4849,10 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) llvm.Ca
48494849
},
48504850
.Signal => .AVR_SIGNAL,
48514851
.SysV => .X86_64_SysV,
4852+
.PtxKernel => return switch (target.cpu.arch) {
4853+
.nvptx, .nvptx64 => .PTX_Kernel,
4854+
else => unreachable,
4855+
},
48524856
};
48534857
}
48544858

‎src/link.zig

Lines changed: 25 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -211,6 +211,7 @@ pub const File = struct {
211211
c: void,
212212
wasm: Wasm.DeclBlock,
213213
spirv: void,
214+
nvptx: void,
214215
};
215216

216217
pub const LinkFn = union {
@@ -221,6 +222,7 @@ pub const File = struct {
221222
c: void,
222223
wasm: Wasm.FnData,
223224
spirv: SpirV.FnData,
225+
nvptx: void,
224226
};
225227

226228
pub const Export = union {
@@ -231,6 +233,7 @@ pub const File = struct {
231233
c: void,
232234
wasm: void,
233235
spirv: void,
236+
nvptx: void,
234237
};
235238

236239
/// For DWARF .debug_info.
@@ -265,6 +268,7 @@ pub const File = struct {
265268
.plan9 => return &(try Plan9.createEmpty(allocator, options)).base,
266269
.c => unreachable, // Reported error earlier.
267270
.spirv => &(try SpirV.createEmpty(allocator, options)).base,
271+
.nvptx => &(try NvPtx.createEmpty(allocator, options)).base,
268272
.hex => return error.HexObjectFormatUnimplemented,
269273
.raw => return error.RawObjectFormatUnimplemented,
270274
};
@@ -283,6 +287,7 @@ pub const File = struct {
283287
.wasm => &(try Wasm.createEmpty(allocator, options)).base,
284288
.c => unreachable, // Reported error earlier.
285289
.spirv => &(try SpirV.createEmpty(allocator, options)).base,
290+
.nvptx => &(try NvPtx.createEmpty(allocator, options)).base,
286291
.hex => return error.HexObjectFormatUnimplemented,
287292
.raw => return error.RawObjectFormatUnimplemented,
288293
};
@@ -303,6 +308,7 @@ pub const File = struct {
303308
.wasm => &(try Wasm.openPath(allocator, sub_path, options)).base,
304309
.c => &(try C.openPath(allocator, sub_path, options)).base,
305310
.spirv => &(try SpirV.openPath(allocator, sub_path, options)).base,
311+
.nvptx => &(try NvPtx.openPath(allocator, sub_path, options)).base,
306312
.hex => return error.HexObjectFormatUnimplemented,
307313
.raw => return error.RawObjectFormatUnimplemented,
308314
};
@@ -335,7 +341,7 @@ pub const File = struct {
335341
.mode = determineMode(base.options),
336342
});
337343
},
338-
.c, .wasm, .spirv => {},
344+
.c, .wasm, .spirv, .nvptx => {},
339345
}
340346
}
341347

@@ -380,7 +386,7 @@ pub const File = struct {
380386
f.close();
381387
base.file = null;
382388
},
383-
.c, .wasm, .spirv => {},
389+
.c, .wasm, .spirv, .nvptx => {},
384390
}
385391
}
386392

@@ -428,6 +434,7 @@ pub const File = struct {
428434
.wasm => return @fieldParentPtr(Wasm, "base", base).updateDecl(module, decl),
429435
.spirv => return @fieldParentPtr(SpirV, "base", base).updateDecl(module, decl),
430436
.plan9 => return @fieldParentPtr(Plan9, "base", base).updateDecl(module, decl),
437+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).updateDecl(module, decl),
431438
// zig fmt: on
432439
}
433440
}
@@ -447,6 +454,7 @@ pub const File = struct {
447454
.wasm => return @fieldParentPtr(Wasm, "base", base).updateFunc(module, func, air, liveness),
448455
.spirv => return @fieldParentPtr(SpirV, "base", base).updateFunc(module, func, air, liveness),
449456
.plan9 => return @fieldParentPtr(Plan9, "base", base).updateFunc(module, func, air, liveness),
457+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).updateFunc(module, func, air, liveness),
450458
// zig fmt: on
451459
}
452460
}
@@ -462,7 +470,7 @@ pub const File = struct {
462470
.macho => return @fieldParentPtr(MachO, "base", base).updateDeclLineNumber(module, decl),
463471
.c => return @fieldParentPtr(C, "base", base).updateDeclLineNumber(module, decl),
464472
.plan9 => @panic("TODO: implement updateDeclLineNumber for plan9"),
465-
.wasm, .spirv => {},
473+
.wasm, .spirv, .nvptx => {},
466474
}
467475
}
468476

@@ -484,7 +492,7 @@ pub const File = struct {
484492
},
485493
.wasm => return @fieldParentPtr(Wasm, "base", base).allocateDeclIndexes(decl),
486494
.plan9 => return @fieldParentPtr(Plan9, "base", base).allocateDeclIndexes(decl),
487-
.c, .spirv => {},
495+
.c, .spirv, .nvptx => {},
488496
}
489497
}
490498

@@ -542,6 +550,11 @@ pub const File = struct {
542550
parent.deinit();
543551
base.allocator.destroy(parent);
544552
},
553+
.nvptx => {
554+
const parent = @fieldParentPtr(NvPtx, "base", base);
555+
parent.deinit();
556+
base.allocator.destroy(parent);
557+
},
545558
}
546559
}
547560

@@ -575,6 +588,7 @@ pub const File = struct {
575588
.wasm => return @fieldParentPtr(Wasm, "base", base).flush(comp),
576589
.spirv => return @fieldParentPtr(SpirV, "base", base).flush(comp),
577590
.plan9 => return @fieldParentPtr(Plan9, "base", base).flush(comp),
591+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).flush(comp),
578592
}
579593
}
580594

@@ -589,6 +603,7 @@ pub const File = struct {
589603
.wasm => return @fieldParentPtr(Wasm, "base", base).flushModule(comp),
590604
.spirv => return @fieldParentPtr(SpirV, "base", base).flushModule(comp),
591605
.plan9 => return @fieldParentPtr(Plan9, "base", base).flushModule(comp),
606+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).flushModule(comp),
592607
}
593608
}
594609

@@ -603,6 +618,7 @@ pub const File = struct {
603618
.wasm => @fieldParentPtr(Wasm, "base", base).freeDecl(decl),
604619
.spirv => @fieldParentPtr(SpirV, "base", base).freeDecl(decl),
605620
.plan9 => @fieldParentPtr(Plan9, "base", base).freeDecl(decl),
621+
.nvptx => @fieldParentPtr(NvPtx, "base", base).freeDecl(decl),
606622
}
607623
}
608624

@@ -613,7 +629,7 @@ pub const File = struct {
613629
.macho => return @fieldParentPtr(MachO, "base", base).error_flags,
614630
.plan9 => return @fieldParentPtr(Plan9, "base", base).error_flags,
615631
.c => return .{ .no_entry_point_found = false },
616-
.wasm, .spirv => return ErrorFlags{},
632+
.wasm, .spirv, .nvptx => return ErrorFlags{},
617633
}
618634
}
619635

@@ -635,6 +651,7 @@ pub const File = struct {
635651
.wasm => return @fieldParentPtr(Wasm, "base", base).updateDeclExports(module, decl, exports),
636652
.spirv => return @fieldParentPtr(SpirV, "base", base).updateDeclExports(module, decl, exports),
637653
.plan9 => return @fieldParentPtr(Plan9, "base", base).updateDeclExports(module, decl, exports),
654+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).updateDeclExports(module, decl, exports),
638655
}
639656
}
640657

@@ -647,6 +664,7 @@ pub const File = struct {
647664
.c => unreachable,
648665
.wasm => unreachable,
649666
.spirv => unreachable,
667+
.nvptx => unreachable,
650668
}
651669
}
652670

@@ -839,6 +857,7 @@ pub const File = struct {
839857
wasm,
840858
spirv,
841859
plan9,
860+
nvptx,
842861
};
843862

844863
pub const ErrorFlags = struct {
@@ -852,6 +871,7 @@ pub const File = struct {
852871
pub const MachO = @import("link/MachO.zig");
853872
pub const SpirV = @import("link/SpirV.zig");
854873
pub const Wasm = @import("link/Wasm.zig");
874+
pub const NvPtx = @import("link/NvPtx.zig");
855875
};
856876

857877
pub fn determineMode(options: Options) fs.File.Mode {

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