@@ -2837,7 +2837,19 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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mem .writeIntLittle (u32 , try self .code .addManyAsArray (4 ), Instruction .movk (reg , @intCast (u16 , x >> 48 ), 48 ).toU32 ());
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}
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},
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- .register = > return self .fail (src , "TODO implement genSetReg for aarch64 {}" , .{mcv }),
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+ .register = > | src_reg | {
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+ // If the registers are the same, nothing to do.
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+ if (src_reg .id () == reg .id ())
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+ return ;
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+
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+ // mov reg, src_reg
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+ writeInt (u32 , try self .code .addManyAsArray (4 ), Instruction .orr (
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+ reg ,
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+ .xzr ,
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+ src_reg ,
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+ Instruction .Shift .none ,
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+ ).toU32 ());
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+ },
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.memory = > | addr | {
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if (self .bin_file .options .pie ) {
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// For MachO, the binary, with the exception of object files, has to be a PIE.
@@ -3475,6 +3487,59 @@ fn Function(comptime arch: std.Target.Cpu.Arch) type {
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else = > return self .fail (src , "TODO implement function parameters for {} on arm" , .{cc }),
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}
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},
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+ .aarch64 = > {
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+ switch (cc ) {
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+ .Naked = > {
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+ assert (result .args .len == 0 );
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+ result .return_value = .{ .unreach = {} };
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+ result .stack_byte_count = 0 ;
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+ result .stack_align = 1 ;
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+ return result ;
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+ },
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+ .Unspecified , .C = > {
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+ // ARM64 Procedure Call Standard
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+ var ncrn : usize = 0 ; // Next Core Register Number
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+ var nsaa : u32 = 0 ; // Next stacked argument address
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+
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+ for (param_types ) | ty , i | {
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+ // We round up NCRN only for non-Apple platforms which allow the 16-byte aligned
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+ // values to spread across odd-numbered registers.
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+ if (ty .abiAlignment (self .target .* ) == 16 and ! self .target .isDarwin ()) {
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+ // Round up NCRN to the next even number
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+ ncrn += ncrn % 2 ;
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+ }
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+
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+ const param_size = @intCast (u32 , ty .abiSize (self .target .* ));
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+ if (std .math .divCeil (u32 , param_size , 8 ) catch unreachable <= 8 - ncrn ) {
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+ if (param_size <= 8 ) {
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+ result .args [i ] = .{ .register = c_abi_int_param_regs [ncrn ] };
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+ ncrn += 1 ;
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+ } else {
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+ return self .fail (src , "TODO MCValues with multiple registers" , .{});
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+ }
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+ } else if (ncrn < 8 and nsaa == 0 ) {
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+ return self .fail (src , "TODO MCValues split between registers and stack" , .{});
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+ } else {
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+ ncrn = 8 ;
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+ // TODO Apple allows the arguments on the stack to be non-8-byte aligned provided
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+ // that the entire stack space consumed by the arguments is 8-byte aligned.
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+ if (ty .abiAlignment (self .target .* ) == 8 ) {
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+ if (nsaa % 8 != 0 ) {
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+ nsaa += 8 - (nsaa % 8 );
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+ }
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+ }
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+
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+ result .args [i ] = .{ .stack_offset = nsaa };
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+ nsaa += param_size ;
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+ }
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+ }
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+
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+ result .stack_byte_count = nsaa ;
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+ result .stack_align = 16 ;
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+ },
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+ else = > return self .fail (src , "TODO implement function parameters for {} on aarch64" , .{cc }),
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+ }
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+ },
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else = > if (param_types .len != 0 )
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return self .fail (src , "TODO implement codegen parameters for {}" , .{self .target .cpu .arch }),
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}
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