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Revert "AstGen: preserve inferred ptr result loc for breaks"
This reverts commit 8bf3e1f, which introduced miscompilations for peer expressions any time they needed coercions to runtime types. I opened #11957 as a proposal to accomplish the goal of the reverted commit. Closes #11898
1 parent a058696 commit 7fb64e2

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6 files changed

+21
-36
lines changed

6 files changed

+21
-36
lines changed

src/AstGen.zig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -10007,7 +10007,7 @@ const GenZir = struct {
1000710007
.inferred_ptr => |ptr| {
1000810008
gz.rl_ty_inst = .none;
1000910009
gz.rl_ptr = ptr;
10010-
gz.break_result_loc = parent_rl;
10010+
gz.break_result_loc = .{ .block_ptr = gz };
1001110011
},
1001210012

1001310013
.block_ptr => |parent_block_scope| {

src/Sema.zig

Lines changed: 0 additions & 22 deletions
Original file line numberDiff line numberDiff line change
@@ -3079,28 +3079,6 @@ fn zirResolveInferredAlloc(sema: *Sema, block: *Block, inst: Zir.Inst.Index) Com
30793079

30803080
if (var_is_mut) {
30813081
try sema.validateVarType(block, ty_src, final_elem_ty, false);
3082-
3083-
// The value might have been bitcasted into a comptime only
3084-
// pointer type such as `*@Type(.EnumLiteral)` so we must now
3085-
// update all the stores to not give backends invalid AIR.
3086-
3087-
var air_tags = sema.air_instructions.items(.tag);
3088-
var air_data = sema.air_instructions.items(.data);
3089-
var peer_inst_index: usize = 0;
3090-
var i = ptr_inst;
3091-
while (i < air_tags.len and peer_inst_index < peer_inst_list.len) : (i += 1) {
3092-
if (air_tags[i] != .store) continue;
3093-
if (air_data[i].bin_op.rhs == peer_inst_list[peer_inst_index]) {
3094-
peer_inst_index += 1;
3095-
_ = (try sema.resolveMaybeUndefVal(block, .unneeded, air_data[i].bin_op.rhs)) orelse continue;
3096-
const coerced_val = try sema.coerce(block, final_elem_ty, air_data[i].bin_op.rhs, .unneeded);
3097-
air_tags = sema.air_instructions.items(.tag);
3098-
air_data = sema.air_instructions.items(.data);
3099-
3100-
air_data[i].bin_op.lhs = ptr;
3101-
air_data[i].bin_op.rhs = coerced_val;
3102-
}
3103-
}
31043082
} else ct: {
31053083
// Detect if the value is comptime known. In such case, the
31063084
// last 3 AIR instructions of the block will look like this:

test/behavior/basic.zig

Lines changed: 0 additions & 12 deletions
Original file line numberDiff line numberDiff line change
@@ -928,18 +928,6 @@ test "try in labeled block doesn't cast to wrong type" {
928928
_ = s;
929929
}
930930

931-
test "comptime int in switch in catch is casted to correct inferred type" {
932-
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
933-
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
934-
935-
var a: error{ A, B }!u64 = 0;
936-
var b = a catch |err| switch (err) {
937-
error.A => 0,
938-
else => unreachable,
939-
};
940-
_ = b;
941-
}
942-
943931
test "vector initialized with array init syntax has proper type" {
944932
comptime {
945933
const actual = -@Vector(4, i32){ 1, 2, 3, 4 };

test/behavior/cast.zig

Lines changed: 2 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -812,6 +812,7 @@ test "peer type resolution: error union after non-error" {
812812
}
813813

814814
test "peer cast *[0]T to E![]const T" {
815+
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
815816
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
816817
if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
817818
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO
@@ -826,6 +827,7 @@ test "peer cast *[0]T to E![]const T" {
826827
}
827828

828829
test "peer cast *[0]T to []const T" {
830+
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
829831
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
830832
if (builtin.zig_backend == .stage2_c) return error.SkipZigTest; // TODO
831833
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest; // TODO

test/behavior/error.zig

Lines changed: 1 addition & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -709,7 +709,7 @@ test "simple else prong allowed even when all errors handled" {
709709
}
710710
};
711711
var value = S.foo() catch |err| switch (err) {
712-
error.Foo => 255,
712+
error.Foo => @as(u8, 255),
713713
else => |e| return e,
714714
};
715715
try expect(value == 255);

test/behavior/if.zig

Lines changed: 17 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -111,3 +111,20 @@ test "if prongs cast to expected type instead of peer type resolution" {
111111
try S.doTheTest(false);
112112
comptime try S.doTheTest(false);
113113
}
114+
115+
test "if peer expressions inferred optional type" {
116+
if (builtin.zig_backend == .stage2_x86_64) return error.SkipZigTest;
117+
if (builtin.zig_backend == .stage2_arm) return error.SkipZigTest;
118+
if (builtin.zig_backend == .stage2_aarch64) return error.SkipZigTest;
119+
120+
var self: []const u8 = "abcdef";
121+
var index: usize = 0;
122+
var left_index = (index << 1) + 1;
123+
var right_index = left_index + 1;
124+
var left = if (left_index < self.len) self[left_index] else null;
125+
var right = if (right_index < self.len) self[right_index] else null;
126+
try expect(left_index < self.len);
127+
try expect(right_index < self.len);
128+
try expect(left.? == 98);
129+
try expect(right.? == 99);
130+
}

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