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gwenzekgwenzek
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minimal compiler changes so that you can compile to nvptx
sample command: /home/guw/github/zig/stage2/bin/zig build-obj cuda_kernel.zig -target nvptx64-cuda -O ReleaseSafe this will create a kernel.ptx expose PtxKernel call convention from LLVM kernels are `export fn f() callconv(.PtxKernel)`
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12 files changed

+178
-8
lines changed

12 files changed

+178
-8
lines changed

‎lib/std/builtin.zig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -147,6 +147,7 @@ pub const CallingConvention = enum {
147147
AAPCS,
148148
AAPCSVFP,
149149
SysV,
150+
PtxKernel,
150151
};
151152

152153
/// This data structure is used by the Zig language code generation and

‎lib/std/target.zig

Lines changed: 4 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -579,6 +579,8 @@ pub const Target = struct {
579579
raw,
580580
/// Plan 9 from Bell Labs
581581
plan9,
582+
/// Nvidia PTX format
583+
nvptx,
582584

583585
pub fn fileExt(of: ObjectFormat, cpu_arch: Cpu.Arch) [:0]const u8 {
584586
return switch (of) {
@@ -589,6 +591,7 @@ pub const Target = struct {
589591
.hex => ".ihex",
590592
.raw => ".bin",
591593
.plan9 => plan9Ext(cpu_arch),
594+
.nvptx => ".ptx",
592595
};
593596
}
594597
};
@@ -1391,6 +1394,7 @@ pub const Target = struct {
13911394
else => return switch (cpu_arch) {
13921395
.wasm32, .wasm64 => .wasm,
13931396
.spirv32, .spirv64 => .spirv,
1397+
.nvptx, .nvptx64 => .nvptx,
13941398
else => .elf,
13951399
},
13961400
};

‎lib/std/zig.zig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -181,6 +181,7 @@ pub fn binNameAlloc(allocator: std.mem.Allocator, options: BinNameOptions) error
181181
.Obj => return std.fmt.allocPrint(allocator, "{s}{s}", .{ root_name, ofmt.fileExt(target.cpu.arch) }),
182182
.Lib => return std.fmt.allocPrint(allocator, "{s}{s}.a", .{ target.libPrefix(), root_name }),
183183
},
184+
.nvptx => return std.fmt.allocPrint(allocator, "{s}", .{root_name}),
184185
}
185186
}
186187

‎src/Module.zig

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -4163,7 +4163,7 @@ fn scanDecl(iter: *ScanDeclIter, decl_sub_index: usize, flags: u4) SemaError!voi
41634163
// in `Decl` to notice that the line number did not change.
41644164
mod.comp.work_queue.writeItemAssumeCapacity(.{ .update_line_number = decl });
41654165
},
4166-
.c, .wasm, .spirv => {},
4166+
.c, .wasm, .spirv, .nvptx => {},
41674167
}
41684168
}
41694169
}
@@ -4237,6 +4237,7 @@ pub fn clearDecl(
42374237
.c => .{ .c = {} },
42384238
.wasm => .{ .wasm = link.File.Wasm.DeclBlock.empty },
42394239
.spirv => .{ .spirv = {} },
4240+
.nvptx => .{ .nvptx = {} },
42404241
};
42414242
decl.fn_link = switch (mod.comp.bin_file.tag) {
42424243
.coff => .{ .coff = {} },
@@ -4246,6 +4247,7 @@ pub fn clearDecl(
42464247
.c => .{ .c = {} },
42474248
.wasm => .{ .wasm = link.File.Wasm.FnData.empty },
42484249
.spirv => .{ .spirv = .{} },
4250+
.nvptx => .{ .nvptx = .{} },
42494251
};
42504252
}
42514253
if (decl.getInnerNamespace()) |namespace| {
@@ -4573,6 +4575,7 @@ pub fn allocateNewDecl(
45734575
.c => .{ .c = {} },
45744576
.wasm => .{ .wasm = link.File.Wasm.DeclBlock.empty },
45754577
.spirv => .{ .spirv = {} },
4578+
.nvptx => .{ .nvptx = {} },
45764579
},
45774580
.fn_link = switch (mod.comp.bin_file.tag) {
45784581
.coff => .{ .coff = {} },
@@ -4582,6 +4585,7 @@ pub fn allocateNewDecl(
45824585
.c => .{ .c = {} },
45834586
.wasm => .{ .wasm = link.File.Wasm.FnData.empty },
45844587
.spirv => .{ .spirv = .{} },
4588+
.nvptx => .{ .nvptx = .{} },
45854589
},
45864590
.generation = 0,
45874591
.is_pub = false,

‎src/Sema.zig

Lines changed: 1 addition & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -3704,6 +3704,7 @@ pub fn analyzeExport(
37043704
.c => .{ .c = {} },
37053705
.wasm => .{ .wasm = {} },
37063706
.spirv => .{ .spirv = {} },
3707+
.nvptx => .{ .nvptx = {} },
37073708
},
37083709
.owner_decl = owner_decl,
37093710
.src_decl = src_decl,

‎src/codegen/llvm.zig

Lines changed: 5 additions & 1 deletion
Original file line numberDiff line numberDiff line change
@@ -378,7 +378,7 @@ pub const Object = struct {
378378
const mod = comp.bin_file.options.module.?;
379379
const cache_dir = mod.zig_cache_artifact_directory;
380380

381-
const emit_bin_path: ?[*:0]const u8 = if (comp.bin_file.options.emit) |emit|
381+
var emit_bin_path: ?[*:0]const u8 = if (comp.bin_file.options.emit) |emit|
382382
try emit.basenamePath(arena, try arena.dupeZ(u8, comp.bin_file.intermediary_basename.?))
383383
else
384384
null;
@@ -5049,6 +5049,10 @@ fn toLlvmCallConv(cc: std.builtin.CallingConvention, target: std.Target) llvm.Ca
50495049
},
50505050
.Signal => .AVR_SIGNAL,
50515051
.SysV => .X86_64_SysV,
5052+
.PtxKernel => return switch (target.cpu.arch) {
5053+
.nvptx, .nvptx64 => .PTX_Kernel,
5054+
else => unreachable,
5055+
},
50525056
};
50535057
}
50545058

‎src/link.zig

Lines changed: 25 additions & 5 deletions
Original file line numberDiff line numberDiff line change
@@ -212,6 +212,7 @@ pub const File = struct {
212212
c: void,
213213
wasm: Wasm.DeclBlock,
214214
spirv: void,
215+
nvptx: void,
215216
};
216217

217218
pub const LinkFn = union {
@@ -222,6 +223,7 @@ pub const File = struct {
222223
c: void,
223224
wasm: Wasm.FnData,
224225
spirv: SpirV.FnData,
226+
nvptx: void,
225227
};
226228

227229
pub const Export = union {
@@ -232,6 +234,7 @@ pub const File = struct {
232234
c: void,
233235
wasm: void,
234236
spirv: void,
237+
nvptx: void,
235238
};
236239

237240
/// For DWARF .debug_info.
@@ -266,6 +269,7 @@ pub const File = struct {
266269
.plan9 => return &(try Plan9.createEmpty(allocator, options)).base,
267270
.c => unreachable, // Reported error earlier.
268271
.spirv => &(try SpirV.createEmpty(allocator, options)).base,
272+
.nvptx => &(try NvPtx.createEmpty(allocator, options)).base,
269273
.hex => return error.HexObjectFormatUnimplemented,
270274
.raw => return error.RawObjectFormatUnimplemented,
271275
};
@@ -284,6 +288,7 @@ pub const File = struct {
284288
.wasm => &(try Wasm.createEmpty(allocator, options)).base,
285289
.c => unreachable, // Reported error earlier.
286290
.spirv => &(try SpirV.createEmpty(allocator, options)).base,
291+
.nvptx => &(try NvPtx.createEmpty(allocator, options)).base,
287292
.hex => return error.HexObjectFormatUnimplemented,
288293
.raw => return error.RawObjectFormatUnimplemented,
289294
};
@@ -304,6 +309,7 @@ pub const File = struct {
304309
.wasm => &(try Wasm.openPath(allocator, sub_path, options)).base,
305310
.c => &(try C.openPath(allocator, sub_path, options)).base,
306311
.spirv => &(try SpirV.openPath(allocator, sub_path, options)).base,
312+
.nvptx => &(try NvPtx.openPath(allocator, sub_path, options)).base,
307313
.hex => return error.HexObjectFormatUnimplemented,
308314
.raw => return error.RawObjectFormatUnimplemented,
309315
};
@@ -336,7 +342,7 @@ pub const File = struct {
336342
.mode = determineMode(base.options),
337343
});
338344
},
339-
.c, .wasm, .spirv => {},
345+
.c, .wasm, .spirv, .nvptx => {},
340346
}
341347
}
342348

@@ -381,7 +387,7 @@ pub const File = struct {
381387
f.close();
382388
base.file = null;
383389
},
384-
.c, .wasm, .spirv => {},
390+
.c, .wasm, .spirv, .nvptx => {},
385391
}
386392
}
387393

@@ -429,6 +435,7 @@ pub const File = struct {
429435
.wasm => return @fieldParentPtr(Wasm, "base", base).updateDecl(module, decl),
430436
.spirv => return @fieldParentPtr(SpirV, "base", base).updateDecl(module, decl),
431437
.plan9 => return @fieldParentPtr(Plan9, "base", base).updateDecl(module, decl),
438+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).updateDecl(module, decl),
432439
// zig fmt: on
433440
}
434441
}
@@ -448,6 +455,7 @@ pub const File = struct {
448455
.wasm => return @fieldParentPtr(Wasm, "base", base).updateFunc(module, func, air, liveness),
449456
.spirv => return @fieldParentPtr(SpirV, "base", base).updateFunc(module, func, air, liveness),
450457
.plan9 => return @fieldParentPtr(Plan9, "base", base).updateFunc(module, func, air, liveness),
458+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).updateFunc(module, func, air, liveness),
451459
// zig fmt: on
452460
}
453461
}
@@ -463,7 +471,7 @@ pub const File = struct {
463471
.macho => return @fieldParentPtr(MachO, "base", base).updateDeclLineNumber(module, decl),
464472
.c => return @fieldParentPtr(C, "base", base).updateDeclLineNumber(module, decl),
465473
.plan9 => @panic("TODO: implement updateDeclLineNumber for plan9"),
466-
.wasm, .spirv => {},
474+
.wasm, .spirv, .nvptx => {},
467475
}
468476
}
469477

@@ -485,7 +493,7 @@ pub const File = struct {
485493
},
486494
.wasm => return @fieldParentPtr(Wasm, "base", base).allocateDeclIndexes(decl),
487495
.plan9 => return @fieldParentPtr(Plan9, "base", base).allocateDeclIndexes(decl),
488-
.c, .spirv => {},
496+
.c, .spirv, .nvptx => {},
489497
}
490498
}
491499

@@ -543,6 +551,11 @@ pub const File = struct {
543551
parent.deinit();
544552
base.allocator.destroy(parent);
545553
},
554+
.nvptx => {
555+
const parent = @fieldParentPtr(NvPtx, "base", base);
556+
parent.deinit();
557+
base.allocator.destroy(parent);
558+
},
546559
}
547560
}
548561

@@ -576,6 +589,7 @@ pub const File = struct {
576589
.wasm => return @fieldParentPtr(Wasm, "base", base).flush(comp),
577590
.spirv => return @fieldParentPtr(SpirV, "base", base).flush(comp),
578591
.plan9 => return @fieldParentPtr(Plan9, "base", base).flush(comp),
592+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).flush(comp),
579593
}
580594
}
581595

@@ -590,6 +604,7 @@ pub const File = struct {
590604
.wasm => return @fieldParentPtr(Wasm, "base", base).flushModule(comp),
591605
.spirv => return @fieldParentPtr(SpirV, "base", base).flushModule(comp),
592606
.plan9 => return @fieldParentPtr(Plan9, "base", base).flushModule(comp),
607+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).flushModule(comp),
593608
}
594609
}
595610

@@ -604,6 +619,7 @@ pub const File = struct {
604619
.wasm => @fieldParentPtr(Wasm, "base", base).freeDecl(decl),
605620
.spirv => @fieldParentPtr(SpirV, "base", base).freeDecl(decl),
606621
.plan9 => @fieldParentPtr(Plan9, "base", base).freeDecl(decl),
622+
.nvptx => @fieldParentPtr(NvPtx, "base", base).freeDecl(decl),
607623
}
608624
}
609625

@@ -614,7 +630,7 @@ pub const File = struct {
614630
.macho => return @fieldParentPtr(MachO, "base", base).error_flags,
615631
.plan9 => return @fieldParentPtr(Plan9, "base", base).error_flags,
616632
.c => return .{ .no_entry_point_found = false },
617-
.wasm, .spirv => return ErrorFlags{},
633+
.wasm, .spirv, .nvptx => return ErrorFlags{},
618634
}
619635
}
620636

@@ -636,6 +652,7 @@ pub const File = struct {
636652
.wasm => return @fieldParentPtr(Wasm, "base", base).updateDeclExports(module, decl, exports),
637653
.spirv => return @fieldParentPtr(SpirV, "base", base).updateDeclExports(module, decl, exports),
638654
.plan9 => return @fieldParentPtr(Plan9, "base", base).updateDeclExports(module, decl, exports),
655+
.nvptx => return @fieldParentPtr(NvPtx, "base", base).updateDeclExports(module, decl, exports),
639656
}
640657
}
641658

@@ -648,6 +665,7 @@ pub const File = struct {
648665
.c => unreachable,
649666
.wasm => unreachable,
650667
.spirv => unreachable,
668+
.nvptx => unreachable,
651669
}
652670
}
653671

@@ -843,6 +861,7 @@ pub const File = struct {
843861
wasm,
844862
spirv,
845863
plan9,
864+
nvptx,
846865
};
847866

848867
pub const ErrorFlags = struct {
@@ -856,6 +875,7 @@ pub const File = struct {
856875
pub const MachO = @import("link/MachO.zig");
857876
pub const SpirV = @import("link/SpirV.zig");
858877
pub const Wasm = @import("link/Wasm.zig");
878+
pub const NvPtx = @import("link/NvPtx.zig");
859879
};
860880

861881
pub fn determineMode(options: Options) fs.File.Mode {

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