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PSA: PSoc 6 configurable secure memory size #10034

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Merged
merged 6 commits into from
Mar 14, 2019
Merged

PSA: PSoc 6 configurable secure memory size #10034

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04c5803
make protected secure flash region configurable and change secure and…
Mar 11, 2019
c87d5d4
"Update secure binaries for CY8CKIT_062_WIFI_BT_M0_PSA"
Mar 12, 2019
4c9fe7d
Finish memory protection and add static assert
orenc17 Mar 13, 2019
b3f59da
Merge pull request #1 from orenc17/flash_protected_region_config
Mar 14, 2019
c0bc567
modify rpb base address for M0
Mar 14, 2019
5d1dae4
"Update secure binaries for CY8CKIT_062_WIFI_BT_M0_PSA"
Mar 14, 2019
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2 changes: 1 addition & 1 deletion features/storage/kvstore/conf/tdb_internal/mbed_lib.json
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@
},
"CY8CKIT_062_WIFI_BT_M0_PSA": {
"internal_size": "0x8000",
"internal_base_address": "0x10078000"
"internal_base_address": "0x10038000"
},
"LPC55S69_S": {
"internal_size": "0x10000",
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43 changes: 40 additions & 3 deletions targets/TARGET_Cypress/TARGET_PSOC6/TARGET_CY8CKIT_062_WIFI_BT_M0_PSA/cyprotection_config.h
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Original file line number Diff line number Diff line change
@@ -1,5 +1,5 @@
/* mbed Microcontroller Library
*
*
* \copyright

* (c) 2018, Cypress Semiconductor Corporation
Expand All @@ -25,6 +25,7 @@
#define _CYPROTECTION_CONFIG_H_

#include "cyprotection.h"
#include "mbed_assert.h"

/* Add to M0_PSA target in targets.json:
* - INITIAL_ROT_PROTECTION_AVAILABLE - to disable pc0 related protections
Expand All @@ -42,10 +43,46 @@ CY_PROT_PCMASK3 + CY_PROT_PCMASK4)

#define ALL_SUBREGIONS (0x0)


/* protected rom region size */

#if PSA_SECURE_ROM_SIZE == 0x10000
#define CY_PROT_ROM_REGION_SIZE CY_PROT_SIZE_64KB /* 0x10000 */
#elif PSA_SECURE_ROM_SIZE == 0x20000
#define CY_PROT_ROM_REGION_SIZE CY_PROT_SIZE_128KB /* 0x20000 */
#elif PSA_SECURE_ROM_SIZE == 0x40000
#define CY_PROT_ROM_REGION_SIZE CY_PROT_SIZE_256KB /* 0x40000 */
#elif PSA_SECURE_ROM_SIZE == 0x80000
#define CY_PROT_ROM_REGION_SIZE CY_PROT_SIZE_512KB /* 0x80000 */
#elif PSA_SECURE_ROM_SIZE == 0x100000
#define CY_PROT_ROM_REGION_SIZE CY_PROT_SIZE_1MB /* 0x100000 */
#else
#error unsupported protected rom region size - not aligned or out of range
#endif


/* protected ram region size */

#if PSA_SECURE_RAM_SIZE == 0x8000
#define CY_PROT_RAM_REGION_SIZE CY_PROT_SIZE_32KB /* 0x8000 */
#elif PSA_SECURE_RAM_SIZE == 0x10000
#define CY_PROT_RAM_REGION_SIZE CY_PROT_SIZE_64KB /* 0x10000 */
#elif PSA_SECURE_RAM_SIZE == 0x20000
#define CY_PROT_RAM_REGION_SIZE CY_PROT_SIZE_128KB /* 0x20000 */
#elif PSA_SECURE_RAM_SIZE == 0x40000
#define CY_PROT_RAM_REGION_SIZE CY_PROT_SIZE_256KB /* 0x40000 */
#else
#error unsupported protected ram region size - not aligned or out of range
#endif

MBED_STATIC_ASSERT((PSA_SECURE_ROM_START % PSA_SECURE_ROM_SIZE) == 0, "PSA_SECURE_ROM_START is not alligned with PSA_SECURE_ROM_SIZE");
MBED_STATIC_ASSERT((PSA_SECURE_RAM_START % PSA_SECURE_RAM_SIZE) == 0, "PSA_SECURE_RAM_START is not alligned with PSA_SECURE_RAM_SIZE");


const cy_smpu_region_config_t flash_spm_smpu_config[] = {
{ /* FLASH_PC1_SPM */
.address = (uint32_t *)PSA_SECURE_ROM_START, /* 0x10000000 */
.regionSize = CY_PROT_SIZE_512KB, /* 0x80000 */
.regionSize = CY_PROT_ROM_REGION_SIZE,
.subregions = ALL_SUBREGIONS,
.userPermission = CY_PROT_PERM_RWX,
.privPermission = CY_PROT_PERM_RWX,
Expand All @@ -62,7 +99,7 @@ const cy_smpu_region_config_t flash_spm_smpu_config[] = {
const cy_smpu_region_config_t sram_spm_smpu_config[] = {
{ /* SRAM_SPM_PRIV - must include SRAM_SPM_PUB area */
.address = (uint32_t *)PSA_SECURE_RAM_START, /* 0x08020000 */
.regionSize = CY_PROT_SIZE_64KB, /* 0x10000 */
.regionSize = CY_PROT_RAM_REGION_SIZE,
.subregions = ALL_SUBREGIONS, /* 0xC0, /*Size 0xC000 ALL_SUBREGIONS,*/
.userPermission = CY_PROT_PERM_DISABLED,
.privPermission = CY_PROT_PERM_RWX,
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