Add test header files and defined behavior for APIs tested using FPGA-Test-Shield

TESTS/mbed_hal_fpga_ci_test_shield/analogin/analogin_fpga_test.h

@@ -0,0 +1,60 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2019 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/** \addtogroup hal_analogin_tests */
+/** @{*/
+
+#ifndef MBED_FPGA_ANALOG_IN_TEST_H
+#define MBED_FPGA_ANALOG_IN_TEST_H
+
+#if DEVICE_ANALOGIN
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Test that the alalogin can be initialized using all possible analogin pins.
+ *
+ * Given board provides analogin support.
+ * When analogin is initialized using valid analogin pin.
+ * Then the operation is successfull.
+ *
+ */
+void fpga_analogin_init_test(PinName pin);
+
+/** Test that analogin correctly interprets given input voltage.
+ *
+ * Given board provides analogin support.
+ * When 0.0/3.3 V is provided to analogin pin.
+ * Then analogin_read returns 0.0/1.0,
+ *      analogin_read_u16 returns 0/65535.
+ *
+ */
+void fpga_analogin_test(PinName pin);
+
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+
+/**@}*/

TESTS/mbed_hal_fpga_ci_test_shield/analogin/main.cpp

@@ -26,11 +26,11 @@
 #include "utest/utest.h"
 #include "unity/unity.h"
 #include "greentea-client/test_env.h"
-
 #include "mbed.h"
 #include "pinmap.h"
 #include "test_utils.h"
 #include "MbedTester.h"
+#include "analogin_fpga_test.h"
 
 using namespace utest::v1;
 
@@ -44,14 +44,15 @@ const PinList *restricted = pinmap_restricted_pins();
 
 MbedTester tester(form_factor, restricted);
 
-void analogin_init(PinName pin)
+void fpga_analogin_init_test(PinName pin)
 {
     analogin_t analogin;
 
     analogin_init(&analogin, pin);
+    analogin_free(&analogin);
 }
 
-void analogin_test(PinName pin)
+void fpga_analogin_test(PinName pin)
 {
     tester.reset();
     tester.pin_map_set(pin, MbedTester::LogicalPinGPIO0);
@@ -72,13 +73,15 @@ void analogin_test(PinName pin)
 
     /* Set gpio back to Hi-Z */
     tester.gpio_write(MbedTester::LogicalPinGPIO0, 0, false);
+
+    analogin_free(&analogin);
 }
 
 Case cases[] = {
     // This will be run for all pins
-    Case("AnalogIn - init test", all_ports<AnaloginPort, DefaultFormFactor, analogin_init>),
+    Case("AnalogIn - init test", all_ports<AnaloginPort, DefaultFormFactor, fpga_analogin_init_test>),
     // This will be run for single pin
-    Case("AnalogIn - read test", all_ports<AnaloginPort, DefaultFormFactor, analogin_test>),
+    Case("AnalogIn - read test", all_ports<AnaloginPort, DefaultFormFactor, fpga_analogin_test>),
 };
 
 utest::v1::status_t greentea_test_setup(const size_t number_of_cases)

TESTS/mbed_hal_fpga_ci_test_shield/gpio/gpio_fpga_test.h

@@ -0,0 +1,61 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2019 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/** \addtogroup hal_gpio_tests */
+/** @{*/
+
+#ifndef MBED_FPGA_GPIO_TEST_H
+#define MBED_FPGA_GPIO_TEST_H
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/* Test basic input & output operations.
+ *
+ * Given a GPIO instance initialized with a generic gpio_init() function,
+ * when basic input and output operations are performed,
+ * then all operations succeed.
+ */
+void fpga_test_basic_input_output(PinName pin);
+
+/* Test explicit input initialization.
+ *
+ * Given a GPIO instance,
+ * when additional parameters are passed to the input init function,
+ * then the GPIO is correctly initialized as an input.
+ */
+void fpga_test_explicit_input(PinName pin);
+
+/* Test explicit output initialization.
+ *
+ * Given a GPIO instance,
+ * when additional parameters are passed to the output init function,
+ * then the GPIO is correctly initialized as an output.
+ */
+void fpga_test_explicit_output(PinName pin);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+
+/**@}*/

TESTS/mbed_hal_fpga_ci_test_shield/gpio/main.cpp

@@ -25,12 +25,12 @@
 #include "unity/unity.h"
 #include "greentea-client/test_env.h"
 #include "mbed.h"
-
-using namespace utest::v1;
-
 #include "MbedTester.h"
 #include "pinmap.h"
 #include "test_utils.h"
+#include "gpio_fpga_test.h"
+
+using namespace utest::v1;
 
 // This delay is used when reading a floating input that has an internal pull-up
 // or pull-down resistor. The voltage response is much slower when the input
@@ -45,7 +45,7 @@ MbedTester tester(DefaultFormFactor::pins(), DefaultFormFactor::restricted_pins(
  * when basic input and output operations are performed,
  * then all operations succeed.
  */
-void test_basic_input_output(PinName pin)
+void fpga_test_basic_input_output(PinName pin)
 {
     // Reset everything and set all tester pins to hi-Z.
     tester.reset();
@@ -61,6 +61,7 @@ void test_basic_input_output(PinName pin)
     // Test gpio_is_connected() returned value.
     gpio_init(&gpio, NC);
     TEST_ASSERT_EQUAL_INT(0, gpio_is_connected(&gpio));
+    gpio_free(&gpio);
     gpio_init(&gpio, pin);
     TEST_ASSERT_NOT_EQUAL(0, gpio_is_connected(&gpio));
 
@@ -120,6 +121,8 @@ void test_basic_input_output(PinName pin)
     TEST_ASSERT_EQUAL_INT(1, tester.gpio_read(MbedTester::LogicalPinGPIO0));
     gpio_write(&gpio, 0);
     TEST_ASSERT_EQUAL_INT(0, tester.gpio_read(MbedTester::LogicalPinGPIO0));
+
+    gpio_free(&gpio);
 }
 
 /* Test explicit input initialization.
@@ -128,7 +131,7 @@ void test_basic_input_output(PinName pin)
  * when additional parameters are passed to the input init function,
  * then the GPIO is correctly initialized as an input.
  */
-void test_explicit_input(PinName pin)
+void fpga_test_explicit_input(PinName pin)
 {
     // Reset everything and set all tester pins to hi-Z.
     tester.reset();
@@ -148,6 +151,7 @@ void test_explicit_input(PinName pin)
     tester.gpio_write(MbedTester::LogicalPinGPIO0, 0, false);
     wait_us(HI_Z_READ_DELAY_US);
     TEST_ASSERT_EQUAL_INT(1, gpio_read(&gpio)); // hi-Z, pulled up
+    gpio_free(&gpio);
 
     // Initialize GPIO pin as an input, pull-down mode.
     memset(&gpio, 0, sizeof gpio);
@@ -156,6 +160,7 @@ void test_explicit_input(PinName pin)
     tester.gpio_write(MbedTester::LogicalPinGPIO0, 0, false);
     wait_us(HI_Z_READ_DELAY_US);
     TEST_ASSERT_EQUAL_INT(0, gpio_read(&gpio)); // hi-Z, pulled down
+    gpio_free(&gpio);
 
     // Initialize GPIO pin as an input, pull-up mode.
     memset(&gpio, 0, sizeof gpio);
@@ -164,6 +169,7 @@ void test_explicit_input(PinName pin)
     tester.gpio_write(MbedTester::LogicalPinGPIO0, 0, false);
     wait_us(HI_Z_READ_DELAY_US);
     TEST_ASSERT_EQUAL_INT(1, gpio_read(&gpio)); // hi-Z, pulled up
+    gpio_free(&gpio);
 
     // Initialize GPIO pin as an input, pull-down mode.
     memset(&gpio, 0, sizeof gpio);
@@ -172,6 +178,7 @@ void test_explicit_input(PinName pin)
     tester.gpio_write(MbedTester::LogicalPinGPIO0, 0, false);
     wait_us(HI_Z_READ_DELAY_US);
     TEST_ASSERT_EQUAL_INT(0, gpio_read(&gpio)); // hi-Z, pulled down
+    gpio_free(&gpio);
 }
 
 /* Test explicit output initialization.
@@ -180,7 +187,7 @@ void test_explicit_input(PinName pin)
  * when additional parameters are passed to the output init function,
  * then the GPIO is correctly initialized as an output.
  */
-void test_explicit_output(PinName pin)
+void fpga_test_explicit_output(PinName pin)
 {
     // Reset everything and set all tester pins to hi-Z.
     tester.reset();
@@ -198,41 +205,46 @@ void test_explicit_output(PinName pin)
     gpio_init_out(&gpio, pin);
     TEST_ASSERT_NOT_EQUAL(0, gpio_is_connected(&gpio));
     TEST_ASSERT_EQUAL_INT(0, tester.gpio_read(MbedTester::LogicalPinGPIO0));
+    gpio_free(&gpio);
 
     // Initialize GPIO pin as an output, output value = 1.
     memset(&gpio, 0, sizeof gpio);
     gpio_init_out_ex(&gpio, pin, 1);
     TEST_ASSERT_NOT_EQUAL(0, gpio_is_connected(&gpio));
     TEST_ASSERT_EQUAL_INT(1, tester.gpio_read(MbedTester::LogicalPinGPIO0));
+    gpio_free(&gpio);
 
     // Initialize GPIO pin as an output, output value = 0.
     memset(&gpio, 0, sizeof gpio);
     gpio_init_out_ex(&gpio, pin, 0);
     TEST_ASSERT_NOT_EQUAL(0, gpio_is_connected(&gpio));
     TEST_ASSERT_EQUAL_INT(0, tester.gpio_read(MbedTester::LogicalPinGPIO0));
+    gpio_free(&gpio);
 
     // Initialize GPIO pin as an output, output value = 1.
     memset(&gpio, 0, sizeof gpio);
     gpio_init_inout(&gpio, pin, PIN_OUTPUT, PullNone, 1);
     TEST_ASSERT_NOT_EQUAL(0, gpio_is_connected(&gpio));
     TEST_ASSERT_EQUAL_INT(1, tester.gpio_read(MbedTester::LogicalPinGPIO0));
+    gpio_free(&gpio);
 
     // Initialize GPIO pin as an output, output value = 0.
     memset(&gpio, 0, sizeof gpio);
     gpio_init_inout(&gpio, pin, PIN_OUTPUT, PullNone, 0);
     TEST_ASSERT_NOT_EQUAL(0, gpio_is_connected(&gpio));
     TEST_ASSERT_EQUAL_INT(0, tester.gpio_read(MbedTester::LogicalPinGPIO0));
+    gpio_free(&gpio);
 }
 
 Case cases[] = {
-    Case("generic init, input & output", all_ports<GPIOPort, DefaultFormFactor, test_basic_input_output>),
+    Case("generic init, input & output", all_ports<GPIOPort, DefaultFormFactor, fpga_test_basic_input_output>),
     // Some targets don't support input pull mode.
 #if !defined(TARGET_NANO100) &&         \
     !defined(TARGET_NUC472) &&          \
     !defined(TARGET_M451)
-    Case("explicit init, input", all_ports<GPIOPort, DefaultFormFactor, test_explicit_input>),
+    Case("explicit init, input", all_ports<GPIOPort, DefaultFormFactor, fpga_test_explicit_input>),
 #endif
-    Case("explicit init, output", all_ports<GPIOPort, DefaultFormFactor, test_explicit_output>),
+    Case("explicit init, output", all_ports<GPIOPort, DefaultFormFactor, fpga_test_explicit_output>),
 };
 
 utest::v1::status_t greentea_test_setup(const size_t number_of_cases)

TESTS/mbed_hal_fpga_ci_test_shield/gpio_irq/gpio_irq_fpga_test.h

@@ -0,0 +1,58 @@
+/* mbed Microcontroller Library
+ * Copyright (c) 2019 ARM Limited
+ * SPDX-License-Identifier: Apache-2.0
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *     http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+/** \addtogroup hal_gpioirq_tests */
+/** @{*/
+
+#ifndef MBED_FPGA_GPIO_IRQ_TEST_H
+#define MBED_FPGA_GPIO_IRQ_TEST_H
+
+#if DEVICE_INTERRUPTIN
+
+#ifdef __cplusplus
+extern "C" {
+#endif
+
+/** Test that the GPIO IRQ can be initialized/de-initialized using all possible
+ *  GPIO IRQ pins.
+ *
+ * Given board provides GPIO IRQ support.
+ * When GPIO IRQ is initialized (and then de-initialized) using valid GPIO IRQ pin.
+ * Then the operation is successfull.
+ *
+ */
+void fpga_gpio_irq_test(PinName pin);
+
+/** Test that the gpio interrupt is generated correctly.
+ *
+ * Given board provides interrupt-in feature.
+ * When gpio interrupt is configured to fire on rasing/falling/both edge(s).
+ * Then on rasing/falling/any edge registered interrupt handler is called.
+ *
+ */
+void fpga_gpio_irq_init_free_test(PinName pin);
+
+/**@}*/
+
+#ifdef __cplusplus
+}
+#endif
+
+#endif
+
+#endif
+/**@}*/