[LPC15XX] Fixed µs_ticker implementation

[neilt6]

Re-wrote µs_ticker implementation to use SCT3 instead of RIT in order to fix a serious rollover bug at 1:11:34 (#1699).

[neilt6]

In regards to the Travis CI failure, it would seem that the GCC toolchain only implements void __disable_irq() and not int __disable_irq(). The integer version returns whether or not interrupts were already disabled, preventing nested critical section calls from re-enabling interrupts too soon. This is a problem that exists throughout the mbed library, and should really be investigated at some point.

[0xc0170]

In regards to the Travis CI failure, it would seem that the GCC toolchain only implements void __disable_irq() and not int __disable_irq(). The integer version returns whether or not interrupts were already disabled, preventing nested critical section calls from re-enabling interrupts too soon. This is a problem that exists throughout the mbed library, and should really be investigated at some point.

We added core_util_critical_section_enter/exit that shall be used

[neilt6]

@0xc0170 - I was not aware of this, PR has been updated.

[0xc0170]

LGTM

[0xc0170]

cc @toyowata

[toyowata]

@neilt6 Thank you very much for this PR. The code looks good to me.
I have tested this with few example projects using Ticker with PwmOut and could not see any problem at all.