[nRF52] - switch irq priorities of driver handlers to the lowest level

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/analogin_api.c

@@ -35,7 +35,7 @@ static const nrf_drv_saadc_config_t saadc_config =
 {
     .resolution         = NRF_SAADC_RESOLUTION_12BIT,
     .oversample         = NRF_SAADC_OVERSAMPLE_DISABLED,
-    .interrupt_priority = APP_IRQ_PRIORITY_LOW
+    .interrupt_priority = SAADC_CONFIG_IRQ_PRIORITY
 };
 
 void analogin_init(analogin_t *obj, PinName pin)

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/pwmout_api.c

@@ -346,7 +346,7 @@ static void internal_pwmout_exe(pwmout_t *obj, bool new_period, bool initializat
                     NRF_DRV_PWM_PIN_NOT_USED,            // channel 2
                     NRF_DRV_PWM_PIN_NOT_USED,            // channel 3
                 },
-                .irq_priority = APP_IRQ_PRIORITY_LOW,
+                .irq_priority = PWM0_CONFIG_IRQ_PRIORITY,
                 .base_clock   = pulsewidth_set.pwm_clk,
                 .count_mode   = NRF_PWM_MODE_UP,
                 .top_value    = pulsewidth_set.period_hwu,

targets/TARGET_NORDIC/TARGET_NRF5/TARGET_MCU_NRF52832/sdk/nrf_drv_config.h

@@ -59,15 +59,15 @@
 #if (CLOCK_ENABLED == 1)
 #define CLOCK_CONFIG_XTAL_FREQ          NRF_CLOCK_XTALFREQ_Default
 #define CLOCK_CONFIG_LF_SRC             NRF_CLOCK_LFCLK_Xtal
-#define CLOCK_CONFIG_IRQ_PRIORITY       APP_IRQ_PRIORITY_LOW
+#define CLOCK_CONFIG_IRQ_PRIORITY       APP_IRQ_PRIORITY_LOWEST
 #endif
 
 /* GPIOTE */
 #define GPIOTE_ENABLED 1
 
 #if (GPIOTE_ENABLED == 1)
 #define GPIOTE_CONFIG_USE_SWI_EGU false
-#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define GPIOTE_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 #define GPIOTE_CONFIG_NUM_OF_LOW_POWER_EVENTS 8
 #endif
 
@@ -82,7 +82,7 @@
 #define TIMER0_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
 #define TIMER0_CONFIG_MODE         TIMER_MODE_MODE_Timer
 #define TIMER0_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_32Bit
-#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define TIMER0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 
 #define TIMER0_INSTANCE_INDEX      0
 #endif
@@ -93,7 +93,7 @@
 #define TIMER1_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
 #define TIMER1_CONFIG_MODE         TIMER_MODE_MODE_Timer
 #define TIMER1_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define TIMER1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 
 #define TIMER1_INSTANCE_INDEX      (TIMER0_ENABLED)
 #endif
@@ -104,7 +104,7 @@
 #define TIMER2_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
 #define TIMER2_CONFIG_MODE         TIMER_MODE_MODE_Timer
 #define TIMER2_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define TIMER2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 
 #define TIMER2_INSTANCE_INDEX      (TIMER1_ENABLED+TIMER0_ENABLED)
 #endif
@@ -115,7 +115,7 @@
 #define TIMER3_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
 #define TIMER3_CONFIG_MODE         TIMER_MODE_MODE_Timer
 #define TIMER3_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define TIMER3_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 
 #define TIMER3_INSTANCE_INDEX      (TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
 #endif
@@ -126,7 +126,7 @@
 #define TIMER4_CONFIG_FREQUENCY    NRF_TIMER_FREQ_16MHz
 #define TIMER4_CONFIG_MODE         TIMER_MODE_MODE_Timer
 #define TIMER4_CONFIG_BIT_WIDTH    TIMER_BITMODE_BITMODE_16Bit
-#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define TIMER4_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 
 #define TIMER4_INSTANCE_INDEX      (TIMER3_ENABLED+TIMER2_ENABLED+TIMER1_ENABLED+TIMER0_ENABLED)
 #endif
@@ -139,7 +139,7 @@
 
 #if (RTC0_ENABLED == 1)
 #define RTC0_CONFIG_FREQUENCY    32678
-#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define RTC0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 #define RTC0_CONFIG_RELIABLE     false
 
 #define RTC0_INSTANCE_INDEX      0
@@ -149,7 +149,7 @@
 
 #if (RTC1_ENABLED == 1)
 #define RTC1_CONFIG_FREQUENCY    32768
-#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define RTC1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 #define RTC1_CONFIG_RELIABLE     false
 
 #define RTC1_INSTANCE_INDEX      (RTC0_ENABLED)
@@ -159,7 +159,7 @@
 
 #if (RTC2_ENABLED == 1)
 #define RTC2_CONFIG_FREQUENCY    32768
-#define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define RTC2_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 #define RTC2_CONFIG_RELIABLE     false
 
 #define RTC2_INSTANCE_INDEX      (RTC0_ENABLED+RTC1_ENABLED)
@@ -176,7 +176,7 @@
 #if (RNG_ENABLED == 1)
 #define RNG_CONFIG_ERROR_CORRECTION true
 #define RNG_CONFIG_POOL_SIZE        8
-#define RNG_CONFIG_IRQ_PRIORITY     APP_IRQ_PRIORITY_LOW
+#define RNG_CONFIG_IRQ_PRIORITY     APP_IRQ_PRIORITY_LOWEST
 #endif
 
 /* PWM */
@@ -188,7 +188,7 @@
 #define PWM0_CONFIG_OUT1_PIN        3
 #define PWM0_CONFIG_OUT2_PIN        4
 #define PWM0_CONFIG_OUT3_PIN        5
-#define PWM0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define PWM0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 #define PWM0_CONFIG_BASE_CLOCK      NRF_PWM_CLK_1MHz
 #define PWM0_CONFIG_COUNT_MODE      NRF_PWM_MODE_UP
 #define PWM0_CONFIG_TOP_VALUE       1000
@@ -205,7 +205,7 @@
 #define PWM1_CONFIG_OUT1_PIN        3
 #define PWM1_CONFIG_OUT2_PIN        4
 #define PWM1_CONFIG_OUT3_PIN        5
-#define PWM1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define PWM1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 #define PWM1_CONFIG_BASE_CLOCK      NRF_PWM_CLK_1MHz
 #define PWM1_CONFIG_COUNT_MODE      NRF_PWM_MODE_UP
 #define PWM1_CONFIG_TOP_VALUE       1000
@@ -222,7 +222,7 @@
 #define PWM2_CONFIG_OUT1_PIN        3
 #define PWM2_CONFIG_OUT2_PIN        4
 #define PWM2_CONFIG_OUT3_PIN        5
-#define PWM2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define PWM2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 #define PWM2_CONFIG_BASE_CLOCK      NRF_PWM_CLK_1MHz
 #define PWM2_CONFIG_COUNT_MODE      NRF_PWM_MODE_UP
 #define PWM2_CONFIG_TOP_VALUE       1000
@@ -243,7 +243,7 @@
 #define SPI0_CONFIG_SCK_PIN         2
 #define SPI0_CONFIG_MOSI_PIN        3
 #define SPI0_CONFIG_MISO_PIN        4
-#define SPI0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define SPI0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 
 #define SPI0_INSTANCE_INDEX 0
 #endif
@@ -256,7 +256,7 @@
 #define SPI1_CONFIG_SCK_PIN         2
 #define SPI1_CONFIG_MOSI_PIN        3
 #define SPI1_CONFIG_MISO_PIN        4
-#define SPI1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define SPI1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 
 #define SPI1_INSTANCE_INDEX (SPI0_ENABLED)
 #endif
@@ -269,7 +269,7 @@
 #define SPI2_CONFIG_SCK_PIN         2
 #define SPI2_CONFIG_MOSI_PIN        3
 #define SPI2_CONFIG_MISO_PIN        4
-#define SPI2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define SPI2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 
 #define SPI2_INSTANCE_INDEX (SPI0_ENABLED + SPI1_ENABLED)
 #endif
@@ -283,7 +283,7 @@
 #define SPIS0_CONFIG_SCK_PIN         2
 #define SPIS0_CONFIG_MOSI_PIN        3
 #define SPIS0_CONFIG_MISO_PIN        4
-#define SPIS0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define SPIS0_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 
 #define SPIS0_INSTANCE_INDEX 0
 #endif
@@ -294,7 +294,7 @@
 #define SPIS1_CONFIG_SCK_PIN         2
 #define SPIS1_CONFIG_MOSI_PIN        3
 #define SPIS1_CONFIG_MISO_PIN        4
-#define SPIS1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define SPIS1_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 
 #define SPIS1_INSTANCE_INDEX SPIS0_ENABLED
 #endif
@@ -305,7 +305,7 @@
 #define SPIS2_CONFIG_SCK_PIN         2
 #define SPIS2_CONFIG_MOSI_PIN        3
 #define SPIS2_CONFIG_MISO_PIN        4
-#define SPIS2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define SPIS2_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 
 #define SPIS2_INSTANCE_INDEX (SPIS0_ENABLED + SPIS1_ENABLED)
 #endif
@@ -340,7 +340,7 @@
 #define TWI0_CONFIG_FREQUENCY    NRF_TWI_FREQ_100K
 #define TWI0_CONFIG_SCL          0
 #define TWI0_CONFIG_SDA          1
-#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define TWI0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 
 #define TWI0_INSTANCE_INDEX      0
 #endif
@@ -353,7 +353,7 @@
 #define TWI1_CONFIG_FREQUENCY    NRF_TWI_FREQ_100K
 #define TWI1_CONFIG_SCL          0
 #define TWI1_CONFIG_SDA          1
-#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define TWI1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 
 #define TWI1_INSTANCE_INDEX      (TWI0_ENABLED)
 #endif
@@ -368,7 +368,7 @@
     #define TWIS0_CONFIG_ADDR1        0 /* 0: Disabled */
     #define TWIS0_CONFIG_SCL          0
     #define TWIS0_CONFIG_SDA          1
-    #define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+    #define TWIS0_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 
     #define TWIS0_INSTANCE_INDEX      0
 #endif
@@ -380,7 +380,7 @@
     #define TWIS1_CONFIG_ADDR1        0 /* 0: Disabled */
     #define TWIS1_CONFIG_SCL          0
     #define TWIS1_CONFIG_SDA          1
-    #define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+    #define TWIS1_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 
     #define TWIS1_INSTANCE_INDEX      (TWIS0_ENABLED)
 #endif
@@ -402,7 +402,7 @@
 #define QDEC_CONFIG_PIO_LED      3
 #define QDEC_CONFIG_LEDPRE       511
 #define QDEC_CONFIG_LEDPOL       NRF_QDEC_LEPOL_ACTIVE_HIGH
-#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define QDEC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 #define QDEC_CONFIG_DBFEN        false
 #define QDEC_CONFIG_SAMPLE_INTEN false
 #endif
@@ -411,7 +411,7 @@
 #define ADC_ENABLED 0
 
 #if (ADC_ENABLED == 1)
-#define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define ADC_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 #endif
 
 
@@ -421,7 +421,7 @@
 #if (SAADC_ENABLED == 1)
 #define SAADC_CONFIG_RESOLUTION      NRF_SAADC_RESOLUTION_10BIT
 #define SAADC_CONFIG_OVERSAMPLE      NRF_SAADC_OVERSAMPLE_DISABLED
-#define SAADC_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define SAADC_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 #endif
 
 /* PDM */
@@ -431,7 +431,7 @@
 #define PDM_CONFIG_MODE            NRF_PDM_MODE_MONO
 #define PDM_CONFIG_EDGE            NRF_PDM_EDGE_LEFTFALLING
 #define PDM_CONFIG_CLOCK_FREQ      NRF_PDM_FREQ_1032K
-#define PDM_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOW
+#define PDM_CONFIG_IRQ_PRIORITY    APP_IRQ_PRIORITY_LOWEST
 #endif
 
 /* COMP */
@@ -443,7 +443,7 @@
 #define COMP_CONFIG_SPEED_MODE		NRF_COMP_SP_MODE_High
 #define COMP_CONFIG_HYST			NRF_COMP_HYST_NoHyst
 #define COMP_CONFIG_ISOURCE			NRF_COMP_ISOURCE_Off
-#define COMP_CONFIG_IRQ_PRIORITY 	APP_IRQ_PRIORITY_LOW
+#define COMP_CONFIG_IRQ_PRIORITY 	APP_IRQ_PRIORITY_LOWEST
 #define COMP_CONFIG_INPUT        	NRF_COMP_INPUT_0
 #endif
 
@@ -453,7 +453,7 @@
 #if (LPCOMP_ENABLED == 1)
 #define LPCOMP_CONFIG_REFERENCE    NRF_LPCOMP_REF_SUPPLY_4_8
 #define LPCOMP_CONFIG_DETECTION    NRF_LPCOMP_DETECT_DOWN
-#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOW
+#define LPCOMP_CONFIG_IRQ_PRIORITY APP_IRQ_PRIORITY_LOWEST
 #define LPCOMP_CONFIG_INPUT        NRF_LPCOMP_INPUT_0
 #endif
 

targets/TARGET_NORDIC/TARGET_NRF5/i2c_api.c

@@ -124,8 +124,13 @@ void i2c_init(i2c_t *obj, PinName sda, PinName scl)
     nrf_drv_twi_config_t const config = {
         .scl                = scl,
         .sda                = sda,
-        .frequency          = NRF_TWI_FREQ_100K,
-        .interrupt_priority = APP_IRQ_PRIORITY_LOW,
+        .frequency          = NRF_TWI_FREQ_100K,  
+#ifdef NRF51
+        .interrupt_priority = APP_IRQ_PRIORITY_LOW
+#elif defined(NRF52)
+        .interrupt_priority = APP_IRQ_PRIORITY_LOWEST
+#endif
+
     };
 
     for (i = 0; i < TWI_COUNT; ++i) {

targets/TARGET_NORDIC/TARGET_NRF5/sdk/drivers_nrf/common/nrf_drv_common.c

@@ -226,7 +226,11 @@ void nrf_drv_common_irq_enable(IRQn_Type IRQn, uint8_t priority)
 {
 
 #ifdef SOFTDEVICE_PRESENT
-    ASSERT((priority == APP_IRQ_PRIORITY_LOW) || (priority == APP_IRQ_PRIORITY_HIGH));
+    #ifdef NRF51
+            ASSERT((priority == APP_IRQ_PRIORITY_LOW) || (priority == APP_IRQ_PRIORITY_HIGH));
+    #elif defined(NRF52)
+            ASSERT((priority == APP_IRQ_PRIORITY_LOWEST) || (priority == APP_IRQ_PRIORITY_HIGH));
+    #endif    
 #endif
 
     NVIC_SetPriority(IRQn, priority);

targets/TARGET_NORDIC/TARGET_NRF5/sdk/libraries/pwm/app_pwm.c

@@ -789,7 +789,11 @@ ret_code_t app_pwm_init(app_pwm_t const * const p_instance, app_pwm_config_t con
         .frequency          = timer_freq,
         .mode               = NRF_TIMER_MODE_TIMER,
         .bit_width          = NRF_TIMER_BIT_WIDTH_16,
+#ifdef NRF51
         .interrupt_priority = APP_IRQ_PRIORITY_LOW,
+#elif defined(NRF52)
+        .interrupt_priority = APP_IRQ_PRIORITY_LOWEST,
+#endif
         .p_context          = (void *) (uint32_t) p_instance->p_timer->instance_id
     };
     err_code = nrf_drv_timer_init(p_instance->p_timer, &timer_cfg,

targets/TARGET_NORDIC/TARGET_NRF5/sdk/libraries/util/nrf_log.c

@@ -181,7 +181,11 @@ uint32_t log_uart_init()
                          UART_RX_BUF_SIZE,
                          UART_TX_BUF_SIZE,
                          uart_error_cb,
-                         APP_IRQ_PRIORITY_LOW,
+#ifdef NRF51
+                         APP_IRQ_PRIORITY_LOW
+#elif defined(NRF52)
+                         APP_IRQ_PRIORITY_LOWEST
+#endif
                          err_code);
 
     initialized = true;

targets/TARGET_NORDIC/TARGET_NRF5/serial_api.c

@@ -74,6 +74,12 @@
 #define UART_DEFAULT_CTS        UART0_CONFIG_PSEL_CTS
 #define UART_DEFAULT_RTS        UART0_CONFIG_PSEL_RTS
 
+#ifdef NRF51
+    #define NRFx_MBED_UART_IRQ_PRIORITY  APP_IRQ_PRIORITY_LOW
+#elif defined(NRF52)
+    #define NRFx_MBED_UART_IRQ_PRIORITY  APP_IRQ_PRIORITY_LOWEST
+#endif
+
 // Required by "retarget.cpp".
 int stdio_uart_inited = 0;
 serial_t stdio_uart;
@@ -287,7 +293,7 @@ void serial_init(serial_t *obj, PinName tx, PinName rx) {
     #if DEVICE_SERIAL_ASYNCH
         nrf_uart_int_enable(UART_INSTANCE, NRF_UART_INT_MASK_ERROR);
     #endif
-        nrf_drv_common_irq_enable(UART_IRQn, APP_IRQ_PRIORITY_LOW);
+        nrf_drv_common_irq_enable(UART_IRQn, NRFx_MBED_UART_IRQ_PRIORITY);
 
         // TX interrupt needs to be signaled when transmitter buffer is empty,
         // so a dummy transmission is needed to get the TXDRDY event initially

targets/TARGET_NORDIC/TARGET_NRF5/spi_api.c

@@ -201,7 +201,7 @@ static void prepare_master_config(nrf_drv_spi_config_t *p_config,
     p_config->frequency = p_spi_info->frequency;
     p_config->mode      = (nrf_drv_spi_mode_t)p_spi_info->spi_mode;
 
-    p_config->irq_priority = APP_IRQ_PRIORITY_LOW;
+    p_config->irq_priority = SPI1_CONFIG_IRQ_PRIORITY;
     p_config->orc          = 0xFF;
     p_config->bit_order    = NRF_DRV_SPI_BIT_ORDER_MSB_FIRST;
 }
@@ -215,7 +215,7 @@ static void prepare_slave_config(nrf_drv_spis_config_t *p_config,
     p_config->csn_pin   = p_spi_info->ss_pin;
     p_config->mode      = (nrf_drv_spis_mode_t)p_spi_info->spi_mode;
 
-    p_config->irq_priority = APP_IRQ_PRIORITY_LOW;
+    p_config->irq_priority = SPIS1_CONFIG_IRQ_PRIORITY;
     p_config->orc          = NRF_DRV_SPIS_DEFAULT_ORC;
     p_config->def          = NRF_DRV_SPIS_DEFAULT_DEF;
     p_config->bit_order    = NRF_DRV_SPIS_BIT_ORDER_MSB_FIRST;