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Update SAML21J18A target to Mbed OS 5.12 #8658

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14 changes: 14 additions & 0 deletions components/storage/blockdevice/COMPONENT_FLASHIAP/mbed_lib.json
Original file line number Diff line number Diff line change
Expand Up @@ -8,12 +8,26 @@
"size": {
"help": "Memory allocated for block device.",
"value": "0"
},
"num-blocks": {
"help": "Number of 256 byte blocks to use per file in the stress test",
"value": 100
},
"max-test-size": {
"help": "Maximum size of the FlashIAP block device",
"value": "256 * 1024 * 2"
}
},
"target_overrides": {
"REALTEK_RTL8195AM": {
"base-address": "0x1C0000",
"size": "0x40000"
},
"SAML21J18A": {
"base-address": "0x30000",
"size": "0x10000",
"num-blocks": 3,
"max-test-size": "64 * 1024"
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Why does the size need to be reduced for this target? Not enough storage space?

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@janjongboom janjongboom Feb 21, 2019

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Yes. Only 256K flash and half is already taken by the binary, so too little to use bigger FlashIAP file system.

}
}
}
Original file line number Diff line number Diff line change
@@ -0,0 +1,56 @@
/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2011 ARM Limited. All rights reserved.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. Neither the name of ARM Limited nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
* DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT HOLDER OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
* OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*******************************************************************************
*/
#include "cmsis_nvic.h"

#define NVIC_FLASH_VECTOR_ADDRESS (0x0) // Initial vector position in flash

void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector)
{
uint32_t *vectors = (uint32_t*)SCB->VTOR;
uint32_t i;

// Copy and switch to dynamic vectors if the first time called
if (SCB->VTOR == NVIC_FLASH_VECTOR_ADDRESS) {
uint32_t *old_vectors = vectors;
vectors = (uint32_t*)NVIC_RAM_VECTOR_ADDRESS;
for (i=0; i<NVIC_NUM_VECTORS; i++) {
vectors[i] = old_vectors[i];
}
SCB->VTOR = (uint32_t)NVIC_RAM_VECTOR_ADDRESS;
}
vectors[IRQn + 16] = vector;
}

uint32_t NVIC_GetVector(IRQn_Type IRQn)
{
uint32_t *vectors = (uint32_t*)SCB->VTOR;
return vectors[IRQn + 16];
}
Original file line number Diff line number Diff line change
@@ -1,4 +1,5 @@
/* mbed Microcontroller Library
* CMSIS-style functionality to support dynamic vectors
*******************************************************************************
* Copyright (c) 2011 ARM Limited. All rights reserved.
* All rights reserved.
Expand Down Expand Up @@ -31,7 +32,21 @@
#ifndef MBED_CMSIS_NVIC_H
#define MBED_CMSIS_NVIC_H

#define NVIC_NUM_VECTORS (16 + 29) // CORE + MCU Peripherals
#define NVIC_USER_IRQ_OFFSET 16
#define NVIC_NUM_VECTORS (NVIC_USER_IRQ_OFFSET + 29) // CORE + MCU Peripherals
#define NVIC_RAM_VECTOR_ADDRESS 0x20000000 // Vectors positioned at start of RAM

#include "cmsis.h"

#ifdef __cplusplus
extern "C" {
#endif

void NVIC_SetVector(IRQn_Type IRQn, uint32_t vector);
uint32_t NVIC_GetVector(IRQn_Type IRQn);

#ifdef __cplusplus
}
#endif

#endif
Original file line number Diff line number Diff line change
Expand Up @@ -55,9 +55,9 @@ const PinMap PinMap_DAC[] = {
/************SERCOM Pins***********/
const PinMap PinMap_SERCOM_PAD[] = {
{PA04, SERCOM0_PAD0, 3},
{PA08, SERCOM0_PAD0, 2},
{PA08, SERCOM2_PAD0, 3},
{PA05, SERCOM0_PAD1, 3},
{PA09, SERCOM0_PAD1, 2},
{PA09, SERCOM2_PAD1, 3},
{PA06, SERCOM0_PAD2, 3},
{PA10, SERCOM0_PAD2, 2},
{PA07, SERCOM0_PAD3, 3},
Expand Down Expand Up @@ -106,8 +106,8 @@ const PinMap PinMap_SERCOM_PAD[] = {

/*******SERCOM Pins extended*******/
const PinMap PinMap_SERCOM_PADEx[] = {
{PA08, SERCOM2_PAD0, 3},
{PA09, SERCOM2_PAD1, 3},
{PA08, SERCOM0_PAD0, 2},
{PA09, SERCOM0_PAD1, 2},
{PA10, SERCOM2_PAD2, 3},
{PA11, SERCOM2_PAD3, 3},
{PA16, SERCOM3_PAD0, 3},
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -21,6 +21,8 @@
#include "PeripheralPins.h"
#include "dac.h"

#if DEVICE_ANALOGOUT

extern uint8_t g_sys_init;

#define MAX_VAL_12BIT 0x0FFF /*12 Bit DAC for SAML21*/
Expand Down Expand Up @@ -119,4 +121,5 @@ const PinMap *analogout_pinmap()
{
return PinMap_DAC;
}
#endif

#endif // DEVICE_ANALOGOUT
Original file line number Diff line number Diff line change
Expand Up @@ -120,7 +120,7 @@ MEMORY {

/* Set stack top to end of RAM, and stack limit move down by
* size of stack_dummy section */
__StackTop = ORIGIN(RAM) + LENGTH(RAM);
__StackTop = ORIGIN(ram) + LENGTH(ram);
__StackLimit = __StackTop - STACK_SIZE;

. = ALIGN(8);
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -57,11 +57,20 @@ extern uint32_t _ezero;
extern uint32_t _sstack;
extern uint32_t _estack;

/** \cond DOXYGEN_SHOULD_SKIP_THIS */
#ifdef MBED_CONF_RTOS_PRESENT
extern void __libc_init_array(void);
extern int main(void);
#else
/** \cond DOXYGEN_SHOULD_SKIP_THIS */
int main(void);
/** \endcond */

void __libc_init_array(void);
#endif

/* Reset entry point*/
void software_init_hook(void);
void pre_main(void) __attribute__((weak));

/* Default empty handler */
void Dummy_Handler(void);
Expand Down Expand Up @@ -258,14 +267,17 @@ void Reset_Handler(void)
pSrc = (uint32_t *) & _sfixed;
SCB->VTOR = ((uint32_t) pSrc & SCB_VTOR_TBLOFF_Msk);

/* Initialize the C library */
__libc_init_array();

/* Overwriting the default value of the NVMCTRL.CTRLB.MANW bit (errata reference 13134) */
NVMCTRL->CTRLB.bit.MANW = 1;

/* Branch to main function */
SystemInit();

#ifdef MBED_CONF_RTOS_PRESENT
software_init_hook();
#else
__libc_init_array();
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Doesn't mbed_boot code file already provide these for Mbed OS 5 ? See mbed_boot.c file, mbed_start function.

See the comments in the file:

Reset vector is

  • responsible for low level platform init and then calling in libc (__main). Depending on compiler and version of C
  • library, predefined function will be called which is implemented by mbed OS.

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@janjongboom janjongboom Jan 21, 2019

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@0xc0170 How do I set the reset vector to behave like this then? Because I copied this behavior from some NXP targets (example) and it seems to properly boot in both RTOS and non-RTOS mode. I don't really get how other targets do it because it's all in .S files not in C. Also this code is in the reset handler already, so what's the difference?

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Understood, looks fine

main();
#endif

/* Infinite loop */
while (1);
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -50,13 +50,13 @@

/* System clock bus configuration */
# define CONF_CLOCK_CPU_CLOCK_FAILURE_DETECT false
# define CONF_CLOCK_FLASH_WAIT_STATES 0
# define CONF_CLOCK_FLASH_WAIT_STATES 3
# define CONF_CLOCK_CPU_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
# define CONF_CLOCK_LOW_POWER_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1
# define CONF_CLOCK_BACKUP_DIVIDER SYSTEM_MAIN_CLOCK_DIV_1

/* SYSTEM_CLOCK_SOURCE_OSC16M configuration - Internal 16MHz oscillator */
# define CONF_CLOCK_OSC16M_FREQ_SEL SYSTEM_OSC16M_4M
# define CONF_CLOCK_OSC16M_FREQ_SEL SYSTEM_OSC16M_16M
# define CONF_CLOCK_OSC16M_ON_DEMAND true
# define CONF_CLOCK_OSC16M_RUN_IN_STANDBY false

Expand All @@ -70,14 +70,16 @@
# define CONF_CLOCK_XOSC_RUN_IN_STANDBY false

/* SYSTEM_CLOCK_SOURCE_XOSC32K configuration - External 32KHz crystal/clock oscillator */
# define CONF_CLOCK_XOSC32K_ENABLE false
# define CONF_CLOCK_XOSC32K_ENABLE true
# define CONF_CLOCK_XOSC32K_EXTERNAL_CRYSTAL SYSTEM_CLOCK_EXTERNAL_CRYSTAL
# define CONF_CLOCK_XOSC32K_STARTUP_TIME SYSTEM_XOSC32K_STARTUP_65536
# define CONF_CLOCK_XOSC32K_ENABLE_1KHZ_OUPUT false
# define CONF_CLOCK_XOSC32K_ENABLE_32KHZ_OUTPUT true
# define CONF_CLOCK_XOSC32K_ON_DEMAND true
# define CONF_CLOCK_XOSC32K_RUN_IN_STANDBY false



/* SYSTEM_CLOCK_SOURCE_OSC32K configuration - Internal 32KHz oscillator */
# define CONF_CLOCK_OSC32K_ENABLE false
# define CONF_CLOCK_OSC32K_STARTUP_TIME SYSTEM_OSC32K_STARTUP_130
Expand All @@ -86,20 +88,23 @@
# define CONF_CLOCK_OSC32K_ON_DEMAND true
# define CONF_CLOCK_OSC32K_RUN_IN_STANDBY false

/* SYSTEM_CLOCK_SOURCE_OSCULP32K configuration - Internal Ultra Low Power 32KHz oscillator */
# define CONF_CLOCK_OSCULP32K_ENABLE_1KHZ_OUTPUT true
# define CONF_CLOCK_OSCULP32K_ENABLE_32KHZ_OUTPUT true

/* SYSTEM_CLOCK_SOURCE_DFLL configuration - Digital Frequency Locked Loop */
# define CONF_CLOCK_DFLL_ENABLE false
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_OPEN
# define CONF_CLOCK_DFLL_ENABLE true
# define CONF_CLOCK_DFLL_LOOP_MODE SYSTEM_CLOCK_DFLL_LOOP_MODE_CLOSED
# define CONF_CLOCK_DFLL_ON_DEMAND false
# define CONF_CLOCK_DFLL_RUN_IN_STANDBY false

/* DFLL open loop mode configuration */
# define CONF_CLOCK_DFLL_FINE_VALUE (0xff / 4)
# define CONF_CLOCK_DFLL_FINE_VALUE (512)

/* DFLL closed loop mode configuration */
# define CONF_CLOCK_DFLL_SOURCE_GCLK_GENERATOR GCLK_GENERATOR_1
# define CONF_CLOCK_DFLL_MULTIPLY_FACTOR (48000000 / 32768)
# define CONF_CLOCK_DFLL_QUICK_LOCK true
# define CONF_CLOCK_DFLL_QUICK_LOCK false
# define CONF_CLOCK_DFLL_TRACK_AFTER_FINE_LOCK true
# define CONF_CLOCK_DFLL_KEEP_LOCK_ON_WAKEUP true
# define CONF_CLOCK_DFLL_ENABLE_CHILL_CYCLE true
Expand Down Expand Up @@ -137,12 +142,12 @@
/* Configure GCLK generator 0 (Main Clock) */
# define CONF_CLOCK_GCLK_0_ENABLE true
# define CONF_CLOCK_GCLK_0_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_OSC16M
# define CONF_CLOCK_GCLK_0_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_DFLL
# define CONF_CLOCK_GCLK_0_PRESCALER 1
# define CONF_CLOCK_GCLK_0_OUTPUT_ENABLE false

/* Configure GCLK generator 1 */
# define CONF_CLOCK_GCLK_1_ENABLE false
# define CONF_CLOCK_GCLK_1_ENABLE true
# define CONF_CLOCK_GCLK_1_RUN_IN_STANDBY false
# define CONF_CLOCK_GCLK_1_CLOCK_SOURCE SYSTEM_CLOCK_SOURCE_XOSC32K
# define CONF_CLOCK_GCLK_1_PRESCALER 1
Expand Down
Original file line number Diff line number Diff line change
Expand Up @@ -315,9 +315,9 @@ void extint_chan_set_config(

/* Config asynchronous edge detection */
if (config->enable_async_edge_detection) {
EIC_module->EIC_ASYNCH.reg |= (1UL << channel);
EIC_module->ASYNCH.reg |= (1UL << channel);
} else {
EIC_module->EIC_ASYNCH.reg &= (EIC_EIC_ASYNCH_MASK & (~(1UL << channel)));
EIC_module->ASYNCH.reg &= (EIC_ASYNCH_MASK & (~(1UL << channel)));
}

_extint_enable();
Expand Down
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