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Move BSS to SRAM2 to increase heap size on ST475 IOT board #9434

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Move BSS to SRAM2 to increase heap size on ST475 IOT board #9434

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2db013f
Move BSS to SRAM2 to increase heap size on ST475 IOT board
linlingao Jan 18, 2019
f242ace
Update bootloader for ST disco board to fix FOTA
linlingao Jan 18, 2019
42e4640
Updated linker script for IAR and ARM to increase heap size by moving…
linlingao Jan 30, 2019
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Binary file modified ...STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/mbed-bootloader-internal_dfb7cc.bin
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4 changes: 2 additions & 2 deletions ...ets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/TARGET_DISCO_L475VG_IOT01A/mbed_lib.json
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Original file line number Diff line number Diff line change
Expand Up @@ -2,8 +2,8 @@
"name": "bootloader_DISCO_L475VG_IOT01A",
"target_overrides": {
"*": {
"target.app_offset": "0x9800",
"target.header_offset": "0x9000",
"target.app_offset": "0x10400",
"target.header_offset": "0x10000",
"target.bootloader_img": "mbed-bootloader-internal_dfb7cc.bin"
}
}
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6 changes: 3 additions & 3 deletions ...ets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_ARM_STD/stm32l475xx.sct
100644 → 100755
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Original file line number Diff line number Diff line change
Expand Up @@ -60,11 +60,11 @@ LR_IROM1 MBED_APP_START MBED_APP_SIZE { ; load region size_region
RW_m_crash_data MBED_CRASH_REPORT_RAM_START EMPTY MBED_CRASH_REPORT_RAM_SIZE { ; RW data
}
RW_IRAM1 MBED_RAM0_START MBED_RAM0_SIZE-Stack_Size { ; RW data 96k L4-SRAM1
.ANY (+RW +ZI)
.ANY (+RW, +Last)
}
; Total: 98 vectors = 392 bytes (0x188) to be reserved in RAM
RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; RW data 32k L4-ECC-SRAM2 retained in standby
.ANY (+RW +ZI)
RW_IRAM2 (0x10000000+0x188) (0x08000-0x188) { ; ZI data 32k L4-ECC-SRAM2
.ANY (+ZI)
}
ARM_LIB_STACK (MBED_RAM0_START+MBED_RAM0_SIZE) EMPTY -Stack_Size { ; stack
}
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5 changes: 3 additions & 2 deletions targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_GCC_ARM/STM32L475XX.ld
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Original file line number Diff line number Diff line change
Expand Up @@ -152,7 +152,7 @@ SECTIONS
. = ALIGN(8);
__bss_end__ = .;
_ebss = .;
} > SRAM1
} > SRAM2

.heap (COPY):
{
Expand Down Expand Up @@ -183,5 +183,6 @@ SECTIONS
PROVIDE(__stack = __StackTop);
/* Check if stack exceeds RAM2 limit */
ASSERT((ORIGIN(SRAM2)+LENGTH(SRAM2)) >= __StackLimit, "SRAM2 overflow")

/* Check if bss exceeds __StackLimit */
ASSERT(__bss_end__ <= __StackLimit, "BSS is too big for RAM2")
}
94 changes: 47 additions & 47 deletions targets/TARGET_STM/TARGET_STM32L4/TARGET_STM32L475xG/device/TOOLCHAIN_IAR/stm32l475xx.icf
100644 → 100755
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Original file line number Diff line number Diff line change
@@ -1,47 +1,47 @@
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }

/* [ROM = 1024kb = 0x100000] */
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;

/* [RAM = 96kb + 32kb = 0x20000] */
/* Vector table dynamic copy: Total: 98 vectors * 4 = 392 bytes (0x188) to be reserved in RAM */
define symbol __NVIC_start__ = 0x10000000;
define symbol __NVIC_end__ = 0x10000187;
define symbol __region_SRAM2_start__ = 0x10000188;
define symbol __region_SRAM2_end__ = 0x10007FFF;
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200000FF;
define symbol __region_SRAM1_start__ = 0x20000100;
define symbol __region_SRAM1_end__ = 0x20017FFF;

/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];

/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;

if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}

define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x10000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };

initialize by copy with packing = zeros { readwrite };
do not initialize { section .noinit };

place at address mem:__intvec_start__ { readonly section .intvec };

place in ROM_region { readonly };
place in SRAM1_region { readwrite, block HEAP };
place in SRAM2_region { block CSTACK };
if (!isdefinedsymbol(MBED_APP_START)) { define symbol MBED_APP_START = 0x08000000; }
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this needs revert of permissions change (100644 → 100755)

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Updated permissions with #9588 as Lin is away on vacation and I couldn't update this PR.

if (!isdefinedsymbol(MBED_APP_SIZE)) { define symbol MBED_APP_SIZE = 0x100000; }
/* [ROM = 1024kb = 0x100000] */
define symbol __intvec_start__ = MBED_APP_START;
define symbol __region_ROM_start__ = MBED_APP_START;
define symbol __region_ROM_end__ = MBED_APP_START + MBED_APP_SIZE - 1;
/* [RAM = 96kb + 32kb = 0x20000] */
/* Vector table dynamic copy: Total: 98 vectors * 4 = 392 bytes (0x188) to be reserved in RAM */
define symbol __NVIC_start__ = 0x10000000;
define symbol __NVIC_end__ = 0x10000187;
define symbol __region_SRAM2_start__ = 0x10000188;
define symbol __region_SRAM2_end__ = 0x10007FFF;
define symbol __region_CRASH_DATA_RAM_start__ = 0x20000000;
define symbol __region_CRASH_DATA_RAM_end__ = 0x200000FF;
define symbol __region_SRAM1_start__ = 0x20000100;
define symbol __region_SRAM1_end__ = 0x20017FFF;
/* Memory regions */
define memory mem with size = 4G;
define region ROM_region = mem:[from __region_ROM_start__ to __region_ROM_end__];
define region SRAM2_region = mem:[from __region_SRAM2_start__ to __region_SRAM2_end__];
define region CRASH_DATA_RAM_region = mem:[from __region_CRASH_DATA_RAM_start__ to __region_CRASH_DATA_RAM_end__];
define region SRAM1_region = mem:[from __region_SRAM1_start__ to __region_SRAM1_end__];
/* Define Crash Data Symbols */
define exported symbol __CRASH_DATA_RAM_START__ = __region_CRASH_DATA_RAM_start__;
define exported symbol __CRASH_DATA_RAM_END__ = __region_CRASH_DATA_RAM_end__;
if (!isdefinedsymbol(MBED_BOOT_STACK_SIZE)) {
define symbol MBED_BOOT_STACK_SIZE = 0x400;
}
define symbol __size_cstack__ = MBED_BOOT_STACK_SIZE;
define symbol __size_heap__ = 0x17000;
define block CSTACK with alignment = 8, size = __size_cstack__ { };
define block HEAP with alignment = 8, size = __size_heap__ { };
initialize by copy with packing = zeros { readwrite };
do not initialize { section .noinit };
place at address mem:__intvec_start__ { readonly section .intvec };
place in ROM_region { readonly };
place in SRAM1_region { readwrite, block HEAP };
place in SRAM2_region { first block CSTACK, zeroinit };