fulladder_new.v.bak

module fulladder_new (input x, y, c_in, output c_out, s);

reg temp1, temp2, temp3, temp4, temp5;

always @ (*) 
begin

	//finding carry output
	and_new a1(.x(c_in), .y(y), .z(temp1));
	and_new a2(.x(x), .y(c_in), .z(temp2));	
	and_new a3(.x(x), .y(y), .z(temp3));
	
	or_new o1(.x(temp1), .y(temp2), .z(temp4));
	or
	
end 

endmodule