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compiler:codegenGeneration of LLVM IR and native codeGeneration of LLVM IR and native codecompiler:llvmFor issues that relate to LLVMFor issues that relate to LLVMcompiler:simdinstruction-level vectorizationinstruction-level vectorization
Description
Noticed by @lcw in JuliaGPU/KernelAbstractions.jl#411
Using the snippet in the PR above we see:
➜ julia JULIA_LLVM_ARGS="-debug-only=lower_simd_loop" ./julia --project=~/src/KernelAbstractions ~/src/KernelAbstractions/codegen.jl
LSL: loopinfo marker found
LSL: loop header:
L2: ; preds = %L2, %top
%value_phi = phi i64 [ 1, %top ], [ %7, %L2 ]
%2 = sitofp i64 %value_phi to double, !dbg !30
%3 = add i64 %value_phi, -1, !dbg !37
%4 = bitcast {} addrspace(10)* %"a::Array" to double addrspace(13)* addrspace(10)*, !dbg !37
%5 = addrspacecast double addrspace(13)* addrspace(10)* %4 to double addrspace(13)* addrspace(11)*, !dbg !37
%.data10 = load double addrspace(13)*, double addrspace(13)* addrspace(11)* %5, align 8, !dbg !37, !tbaa !46, !alias.scope !49, !noalias !52, !nonnull !11
%6 = getelementptr inbounds double, double addrspace(13)* %.data10, i64 %3, !dbg !37
store double %2, double addrspace(13)* %6, align 8, !dbg !37, !tbaa !57, !alias.scope !60, !noalias !61
call void @julia.loopinfo_marker(), !dbg !62, !julia.loopinfo !63
%.not.not = icmp eq i64 %value_phi, 1000, !dbg !65
%7 = add i64 %value_phi, 1, !dbg !68
br i1 %.not.not, label %L20, label %L2, !dbg !71
LSL: has julia.loopinfo metadata with 1 operands
LSL: simd: 0 ivdep: 0
The Loop is not in in idiom form (e.g loop header and latch are collapsed into one BB) and simplifycfg
eliminated the inner loop.
This issue could also occur with @simd
and thus cause miscompilations.
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compiler:codegenGeneration of LLVM IR and native codeGeneration of LLVM IR and native codecompiler:llvmFor issues that relate to LLVMFor issues that relate to LLVMcompiler:simdinstruction-level vectorizationinstruction-level vectorization