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ofs-2024.3-1 Release for Agilex 7 PCIe Attach Reference Shells
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@badanur badanur released this 26 Feb 00:53
ofs-2024.3-1
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OFS 2024.3-1

Summary: OFS 2024.3-1 Release for Agilex™ 7 PCIe Attach FPGAs

Note: OneAPI has not been validated with this release. If you are using OneAPI please use the OFS 2024.2-1 release.

OPAE SDK:

OPAE SIM:

Driver:

This page provides up-to-date information about the Open FPGA Stack (OFS) for Agilex™ 7 PCIe Attach devices. This project targets the:

  • Agilex™ 7 FPGA I-Series Development Kit (2xR-Tile, F-Tile)
  • Agilex™ 7 FPGA F-Series Development Kit (2xF-Tile)
  • Intel® FPGA SmartNIC N6001-PL/N6000-PL

The summary of OFS framework features are shown below. To find out more about these platforms refer to the documentation below:

OFS Agilex™7 PCIe Attach Reference Shell Key Features

Key Feature I-Series (2xR-Tile, 1xF-Tile) F-Series (2xF-Tile) F-Series (1xP-Tile, 1xE-Tile) M-Series (3x F-Tile & 1x R-Tile) (Pre-Release)2
Target OPN AGIB027R29A1E1VB AGFB027R24C2E2VR2 AGFB014R24A2E2V AGMF039R47A1E2VR0
Target Board DK-DEV-AGI027-RA (Production Kit) DK-DEV-AGF027F1ES (ES Kit) • Intel® FPGA SmartNIC N6001-PL
• Intel® 7 FPGA SmartNIC N6000-PL		 DK-DEV-AGM039FES
PCIe R-tile PCIe 1xGen5x16
R-tile PCIe 2xGen5x8
R-tile PCIe 1xGen4x16		 F-tile PCIe Gen4x16 P-tile PCIe Gen4x16 R-tile PCI Gen5x16 (Validated on Gen4x16 sever)
Virtualization 5 physical functions/3 virtual functions with ability to expand 5 physical functions/3 virtual functions with ability to expand 5 physical functions/3 virtual functions with ability to expand 5 physical functions/3 virtual functions with ability to expand
Memory Four Fabric DDR4 channels consisting of:
    • Two x64 (no ECC), 2666 MHz, 8GB Component memory
    • Two x64 (no ECC), 2666 MHz, 8GB UDIMM memory

OR

Three Fabric DDR4 channels consisting of:
    • Two x64 (no ECC), 2666 MHz, 8GB Component memory
    • One x64 (no ECC), 2666 MHz, 8GB RDIMM memory 1		 3 DDR Channels:
• One HPS DDR4 bank, x40 (x32 Data and x8 ECC), 2400 MHz, 1GB each
• Two Fabric DDR4 banks, x64 (no ECC), 2400 MHz, 8GB		 5 DDR Channels:
• One HPS DDR4 bank, x40 (x32 Data and x8 ECC), 1200 MHz, 1GB each
• Four Fabric DDR4 banks, x32 (no ECC), 1200 MHz, 4GB		 32 HBM channels
Ethernet 2x4x25GbE, 2x200GbE, 2x400GbE 2x4x25GbE • N6001-PL: 2x4x25GbE, 2x4x10GbE, or 2x100GbE
• N6000-PL: 4x100GbE		 Not Supported
Hard Processor System Not enabled 64-bit quad core Arm® Cortex®-A53 MPCore with integrated peripherals. 64-bit quad core Arm® Cortex®-A53 MPCore with integrated peripherals. Not Supported
Configuration and Board Manageability • FPGA Management Engine that provides general control of common FPGA tasks (ex. error reporting, partial reconfiguration)
• Platform Management Controller Interface (PMCI) Module for Board Management Controller		 • FPGA Management Engine that provides general control of common FPGA tasks (ex. error reporting, partial reconfiguration)
• Platform Controller Management Interface (PMCI) Module for Board Management Controller		 • FPGA Management Engine that provides general control of common FPGA tasks (ex. error reporting, partial reconfiguration)
• Platform Controller Management Interface (PMCI) Module for Board Management Controller		 Not Supported
Partial Reconfiguration Supported Supported Supported Not Supported
OneAPI Not supported in this release. Please use OFS Version 2024.2-1 for OneAPI support. Not supported in this release. Please use OFS Version 2024.2-1 for OneAPI support. Not supported in this release. Please use OFS Version 2024.2-1 for OneAPI support. Not Supported
Software Support • Linux DFL drivers targeting OFS FIMs
• OPAE Software Development Kit
• OPAE Tools		 • Linux DFL drivers targeting OFS FIMs
• OPAE Software Development Kit
• OPAE Tools		 • Linux DFL drivers targeting OFS FIMs
• OPAE Software Development Kit
• OPAE Tools		 • Linux DFL drivers targeting OFS FIMs
• OPAE Software Development Kit
• OPAE Tools

1 The default OFS shell design targeting the Agilex™ 7 FPGA I-Series Development Kit (2x R-Tile and 1xF-Tile) was validated with two Micron MTA8ATF1G64AZ-2G6E1 DDR4 SDRAM UDIMM modules in DIMM slots A and B. Note that the DK-DEV-AGI027RA development kit comes with a single 16GB RDIMM module. If you plan to use the single RDIMM module that comes with the development kit, refer to the Shell Developer Guide: OFS for Agilex™ 7 PCIe Attach (2xR-tile, F-tile) FPGAs for instructions on building a shell design for the RDIMM configuration.

2 The M-Series Develpoment Kit reference shell design is a pre-release reference design that is provided AS-IS with no active support and limited collateral found in the OFS AGX7 PCIe Attach README

The OFS hardware framework also provides:

  • Support for unit test simulation (using Synopsys® VCS® or Siemens® Questa™ simulators)
  • UVM support using Synopsys® VCS®
  • Host exercisers that allow you to test interfaces on the FPGA

Note: UVM simulation is not supported for OFS designs using R-Tile devices, such as the I-Series Development Kit.

The OFS software framework provides:

  • FPGA platform Linux drivers that are being upstreamed to linux.org
  • A programmable software development kit and userspace tools for managing the FPGA

Important: If you would like to begin evaluating the default shells that have been pre-built from this repository, please scroll down to the "assets" section below which contains the FPGA binary/POF/SOF along with the applicable Linux driver and Open Programmable Acceleration Engine (OPAE) software development kit (SDK) packages.

New Updates for ofs-2024.3-1 Release

  • Quartus Version moved to 24.3
  • I-Series Development Kit shell reference design now targets the production development kit DK-DEV-AGI027-RA (Production Kit)
  • Memory subsystem can support two groups of memory channels where each group has different memory settings; note that the AXI address width must remain the same across all memory channels
  • I-Series Development Kit Reference FIM: added preset and pinout for Memory Subsystem to support 1 RDIMM that comes with the development kit
  • Enabled multiple AFU resource optimization of PCIe to AFU path by allowing multiplexed PIM instances.
  • Pre-Release Support for M-Series Development Kit: Note that a limited configuration of this shell is available as a pre-release. This reference FIM has PCIe Gen5x16, High Bandwidth Memory (HBM) and NoC. Ethernet, DDR Memory, and Partial Reconfiguration are not included in the default shell. As a pre-release, this design is provided AS-IS with no active support and limited collateral found in the OFS AGX7 PCIe Attach README

Known Issues

This table describes the known issues for the 2024.3 OFS Release targeting Agilex™ 7 devices.

ID Known Issues Workaround Status Platform Target Affected
14024332744 DRC High Severity Warnings reported in default OFS shell compilation reports None; you may ignore these warnings. Planned to be fixed in a future release All
- The Unit Test hssi_test hangs for F-tile HSSI configurations None Planned to be fixed in a future release F-Series Development Kit | I-Series Development Kit
16024552556 Partial Reconfiguration Region Root Key Hash (RKH) reports incorrect value after SR RKH update. Update the PR RKH after updating the SR RKH for the PR SDM root entry hash to report the proper PR RKH value. Planned to be fixed in a future release N6000 | N6001
16024552556 Static Region Root Key Hash (SR RKH) fails programming when using vabtool; reports error Could not glob sdm SR provision status. Sysfs node not found Increase the delay when running the rsu command in the vabtool file by changing line 338 from --wait 20 to --wait 100. Note that it can take up to 60 seconds after the rsu command for the SR and PR hash to update. Planned to be fixed in a future release N6000 | N6001
14024356807 High peak memory usage above 100+ GB during OFS compilation causes compilation to fail on systems that do not have sufficient RAM It is suggested that your system has at least 128 GB of RAM for OFS design compilations. Planned improvement in future release All
14024356732 Dangling PTP Signals in the reference FIM RTL None. These signals are provided as a reference, but are not used in the OFS reference designs and can be ignored. Planned to be removed in a future release of OFS All
14024311787 Hold time violation inside Memory Subsystem in fseries-dk. None. Customers using the External Memory Interfaces for Agilex™ Agilex 7 F-series devices may notice minor hold-time violations in the periphery-to-core transfer of the “Report DDR” timing report when placing the address-command pins in the bottom half of the device (Banks 2A/2B/2E/2F/2C/2D), in Quartus Prime Pro versions 24.1-24.3.1. These violations can be safely ignored provided there are fewer than 10 violations per memory interface, the violations only appear for the Fast timing conditions, and the violations do not exceed 30ps in magnitude. Planned fix in a future Quartus version F-Series Development Kit
14024366703 UVM tests mem_tg_cst_test and mem_tg_traffic_gen_test are not supported. None Planned fix in a future release of OFS N6001 | F-Series Development Kit
- UVM is not supported for fseries-dk 200G and 400G configurations None Planned fix in a future release of OFS F-Series Development Kit
14020476585 The Quartus fitter fails when building the PCIe Attach F-tile FIM with ECC enabled on Memory channels 0 and 1 None Planned fix in a future release of OFS F-Series Development Kit
14021039281 Currently there are three errors included as part of the output from the OPAE SDK command "fpgainfo errors all" that are not applicable to current platforms. These include PCIe0 Errors, PCIe1 Errors, and First Malformed Req. All three outputs may be safely ignored. None Planned fix in a future release of OFS. All
- R-tile Agilex™ PCIe Attach Reference FIM does not support UVM simulation. Only unit test simulation is available. None Planned fix in a future release of OFS I-Series Development Kit
- The UVM Copy Engine tests fail to build which results in all CE UVM tests to fail. None Planned fix in a future release of OFS N6001 | F-Series Development Kit
16024716667 The UVM simulation gets stuck on HSSI tx_pkx and rx_pkg tests when targeting the F-series Development Kit. None Planned fix in a future release of OFS F-Series Development Kit
14021146060 The R-Tile PCIe attach design requires a 16550 UART IP license file to be installed in Quartus Prime Pro even though it is not used in the design. None Planned fix in a future release of OFS I-Series Development Kit
14020129685 The hssi bandwidth reporting is currently not supported when FIM Ethernet configuration uses 100GbE. None Planned fix in a future release of OFS. Intel® FPGA SmartNIC N6000/1-PL
14018364039 The OPAE command fpgainfo bmc and fpgainfo temp display a "CVL" field that is not utilized by the N6001 design. None. Ignore "CVL" listings. No future fix Intel® FPGA SmartNIC N6001-PL
14021023150 The fpgainfo phy command reports QSFP as not connected even if Ethernet ports are up because QSFP status is not routed to the FPGA in the Development Kit. Refer to the Port Status listed in the command to observe the link status. No future fix F-Tile Development Kit | I-Series Development Kit
15016269892 PCIe Link Speed does not downgrade to Gen3 or Gen4 on I-Series DevKit FIM when built with the Gen5 configuration. If PCIe Gen4 is required, generate the iseries-dk FIM with PCIe Gen4. This can be done with the $OFS_ROOTDIR/tools/ofss_config/pcie/pcie_host_gen4.ofss There is no provided fix for Gen3. No future fix I-Series Development Kit

Resolved Issues

ID Resolved Issue Platform Target Affected
16024517996 The OPAE hssistats tool shows zero packets on HSSI Port 7 after sending packets with the hssi tool. Intel® FPGA SmartNIC N6000/1-PL
16023255633 The UVM he_mem_rd_cont_test fails when targeting the N6000 N6000
- The Unit Tests fail when using Questasim targeting the N6001, F-Series Development Kit, and I-Series Development Kit designs. N6001 | fseries-dk | iseries-dk
16024616095 The Unit Test hssi_csr_test fails for HSSI configurations 200G and 400G when targeting the F-series Development Kit design. fseries-dk

Important Notes

The following section provides important information about this release:

ID Important Notes
- M-Series Development Kit Reference FIM is a pre-release build variant for the M-Series Development Kit. A limited configuration of this shell is available as a pre-release. This reference FIM has PCIe Gen5x16, High Bandwidth Memory (HBM) and NoC. Ethernet, DDR Memory, and Partial Reconfiguration are not included in the default shell. As a pre-release, this design is provided AS-IS with no active support and limited collateral found in the OFS AGX7 PCIe Attach README
- The default Memory Subsystem in the OFS iseries-dk Shell Design targets 2 8GB UDIMM modules in DIMM slots A and B. However, the DK-DEV-AGI027RA development kit comes with a single 16GB RDIMM module. If you would like to use only the single RDIMM module that comes with the development kit, you must build the OFS Shell design with the RDIMM configuration. Refer to Section 4.7.3 of the FPGA Interface Manager Developer Guide for Open FPGA Stack: Agilex™ 7 FPGA I-Series Development Kit (2x R-Tile and 1xF-Tile) PCIe Attach for step-by-step instructions
- OneAPI has not been validated with this release. If you wish to use OneAPI, please use OFS Release 2024.2-1
- When using the PF/VF configuration tool to reconfigure the PF/VF MUX, you must keep at least:
    • One (1) physical function and one (1) virtual function on PF0.
    OR
    • Two (2) physical functions.
All other PFs and VFs can be removed if desired.
15012246661 When enabling cable hotplug IP and ANLT, the E-tile recipe resulting from the ANLT initialization flow is over-written by the hotplug initialization flow. If you require a custom ANLT recipe, then you cannot use hotplug at this time. You can disable hotplug by writing 1 to index-0 of HSSI Hotplug Debug Control Register (offset 0x600B4) followed by a port level reset or analog reset.
15012406417 If using the Intel® FPGA SmartNIC N6001-PL Platform (SKU2) for evaluation of the OFS release, ensure DIP Switch SW1.4 on the board is set to convey the correct board type or the OPAE commands could display invalid temperature values for an Intel® NIC E810 (SKU1) which is not populated on the SKU2 board. For Intel® FPGA SmartNIC N6001-PL Platform (SKU2), SW1.4 must be off (pointing towards the PCIe goldfinger). Note that a BMC reset is required if you must flip the switch to the correct setting.
14020225084 The regress_run.py simulation script runs a superset of simulation tests for all configurations available in the ofs-agx7-pcie-attach repository. You can customize the regress_run.py script to run only the tests applicable to your design by using the -k list option in the script which directs the regression to only pick up tests you have listed in your list.txt file. Please refer to the FPGA Interface Manager Development Guide for more details.
Assets 19
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