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Merged
merged 1 commit into from
Sep 13, 2018
Merged

Enable sparse functions for ROCm #204

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8 changes: 3 additions & 5 deletions aten/src/ATen/cuda/CUDAContext.cpp
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Original file line number Diff line number Diff line change
Expand Up @@ -54,11 +54,9 @@ Allocator* getCUDADeviceAllocator() {
}

/* Handles */
#ifndef __HIP_PLATFORM_HCC__
cusparseHandle_t getCurrentCUDASparseHandle() {
return THCState_getCurrentSparseHandle(at::globalContext().getTHCState());
}
#endif
cusparseHandle_t getCurrentCUDASparseHandle() {
return THCState_getCurrentSparseHandle(at::globalContext().getTHCState());
}

} // namespace cuda

Expand Down
4 changes: 1 addition & 3 deletions aten/src/ATen/cuda/CUDAContext.h
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Expand Up @@ -59,9 +59,7 @@ AT_API void uncheckedSetCurrentCUDAStream(CUDAStream stream);
AT_API Allocator* getCUDADeviceAllocator();

/* Handles */
#ifndef __HIP_PLATFORM_HCC__
AT_API cusparseHandle_t getCurrentCUDASparseHandle();
#endif
AT_API cusparseHandle_t getCurrentCUDASparseHandle();


} // namespace cuda
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2 changes: 0 additions & 2 deletions aten/src/ATen/native/sparse/cuda/SparseCUDABlas.cu
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Expand Up @@ -9,7 +9,6 @@

namespace at { namespace native { namespace sparse { namespace cuda {

#ifndef __HIP_PLATFORM_HCC__

std::string cusparseGetErrorString(cusparseStatus_t status) {
switch(status)
Expand Down Expand Up @@ -224,6 +223,5 @@ void XcoosortByRow(int64_t m, int64_t n, int64_t nnz, int *cooRows, int *cooCols
CUSPARSE_CHECK(cusparseXcoosortByRow(handle, i_m, i_n, i_nnz, cooRows, cooCols, P, pBuffer));
}

#endif

}}}} // namespace at::native::sparse::cuda
4 changes: 0 additions & 4 deletions aten/src/ATen/native/sparse/cuda/SparseCUDATensor.cu
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Expand Up @@ -25,7 +25,6 @@
namespace at { namespace native {

SparseTensor coalesce_sparse_cuda(const SparseTensor& self) {
#ifndef __HIP_PLATFORM_HCC__
int64_t nnz = self._nnz();
if (nnz < 2) {
_get_sparse_impl(self)->set_coalesced(true);
Expand Down Expand Up @@ -147,9 +146,6 @@ SparseTensor coalesce_sparse_cuda(const SparseTensor& self) {

THCudaCheck(cudaGetLastError());
return dst;
#else
AT_ERROR("coalesce_sparse_cuda: HIP not supported");
#endif
}

}} // namespace at::native
22 changes: 0 additions & 22 deletions aten/src/ATen/native/sparse/cuda/SparseCUDATensorMath.cu
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Expand Up @@ -22,7 +22,6 @@ namespace at { namespace native {
// Utility functions
// --------------------------------------------------------------------

#ifndef __HIP_PLATFORM_HCC__
namespace {
IntTensor _to_csr_int(const LongTensor& rowIndices, int64_t dim, int64_t nnz) {
IntTensor csr = at::empty({dim+1}, CUDA(kInt));
Expand All @@ -32,7 +31,6 @@ namespace {
return csr;
}
}
#endif

// NB: Deleted spaddcmul (aka addcmul_, but not actually wired up), spaddcdiv (not
// wired at all)
Expand All @@ -42,7 +40,6 @@ namespace {
// --------------------------------------------------------------------

Tensor& s_addmm_out_sparse_dense_cuda(Tensor& r_, const Tensor& t, const SparseTensor& sparse_, const Tensor& dense, Scalar beta, Scalar alpha) {
#ifndef __HIP_PLATFORM_HCC__
AT_ASSERT(t.is_cuda()); // dispatch argument
AT_CHECK(r_.is_cuda(), "addmm: expected 'out' to be CUDA, but got CPU");
AT_CHECK(sparse_.is_cuda(), "addmm: expected 'mat1' to be CUDA, but got CPU");
Expand Down Expand Up @@ -141,9 +138,6 @@ Tensor& s_addmm_out_sparse_dense_cuda(Tensor& r_, const Tensor& t, const SparseT

r_.copy_(r__);
return r_;
#else
AT_ERROR("s_addmm_out_sparse_dense_cuda: HIP not supported");
#endif
}

Tensor s_addmm_sparse_dense_cuda(
Expand Down Expand Up @@ -175,7 +169,6 @@ Tensor& s_addmm_sparse_dense_cuda_(
// --------------------------------------------------------------------

SparseTensor& hspmm_out_sparse_cuda(SparseTensor& r_, const SparseTensor& sparse_, const Tensor& dense/* , Scalar alpha */) {
#ifndef __HIP_PLATFORM_HCC__
AT_ASSERT(sparse_.is_cuda()); // dispatch argument
AT_CHECK(r_.is_cuda(), "hspmm: expected 'out' to be CUDA, but got CPU");
AT_CHECK(dense.is_cuda(), "hspmm: expected 'mat2' to be CUDA, but got CPU");
Expand Down Expand Up @@ -231,9 +224,6 @@ SparseTensor& hspmm_out_sparse_cuda(SparseTensor& r_, const SparseTensor& sparse
_get_sparse_impl(r_)->set_indices_and_values_unsafe(indices, values);

return r_;
#else
AT_ERROR("hspmm_out_sparse_cuda: HIP not supported");
#endif
}

SparseTensor hspmm_sparse_cuda(const SparseTensor& sparse, const Tensor& dense) {
Expand All @@ -248,7 +238,6 @@ SparseTensor hspmm_sparse_cuda(const SparseTensor& sparse, const Tensor& dense)
// --------------------------------------------------------------------

Tensor& add_out_dense_sparse_cuda(Tensor& r_, const Tensor& dense, SparseTensorRef sparse_, at::Scalar value) {
#ifndef __HIP_PLATFORM_HCC__
const SparseTensor& sparse = sparse_.tref;

AT_ASSERT(dense.is_cuda()); // dispatch argument
Expand Down Expand Up @@ -339,17 +328,13 @@ Tensor& add_out_dense_sparse_cuda(Tensor& r_, const Tensor& dense, SparseTensorR
THCudaCheck(cudaGetLastError());

return r_;
#else
AT_ERROR("add_out_dense_sparse_cuda: HIP not supported");
#endif
}

// --------------------------------------------------------------------
// add(SparseTensor, SparseTensor, Scalar) [broadcasts]
// --------------------------------------------------------------------

SparseTensor& add_out_sparse_cuda(SparseTensor& r_, const SparseTensor& t, const SparseTensor& src, Scalar value) {
#ifndef __HIP_PLATFORM_HCC__
AT_ASSERT(t.is_cuda()); // dispatch argument
AT_CHECK(src.is_cuda(), "add: expected 'other' to be CUDA, but got CPU");
AT_CHECK(r_.is_cuda(), "add: expected 'out' to be CUDA, but got CPU");
Expand Down Expand Up @@ -396,17 +381,13 @@ SparseTensor& add_out_sparse_cuda(SparseTensor& r_, const SparseTensor& t, const
// }

return r_;
#else
AT_ERROR("s_add_out_sparse_cuda: HIP not supported");
#endif
}

// --------------------------------------------------------------------
// mul(SparseTensor, SparseTensor) [broadcasts]
// --------------------------------------------------------------------

SparseTensor& mul_out_sparse_cuda(SparseTensor& r_, const SparseTensor& t_, const SparseTensor& src_) {
#ifndef __HIP_PLATFORM_HCC__
if (src_.dim() == 0) {
return mul_out_sparse_zerodim(r_, t_, src_);
} else if (t_.dim() == 0) {
Expand Down Expand Up @@ -474,9 +455,6 @@ SparseTensor& mul_out_sparse_cuda(SparseTensor& r_, const SparseTensor& t_, cons
_get_sparse_impl(r_)->set_coalesced(true);

return r_;
#else
AT_ERROR("mul_out_sparse_cuda: HIP not supported");
#endif
}

}} // namespace at::native
18 changes: 18 additions & 0 deletions tools/amd_build/pyHIPIFY/cuda_to_hip_mappings.py
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Expand Up @@ -2174,6 +2174,18 @@
"cusparseOperation_t": ("hipsparseOperation_t", CONV_TYPE, API_SPARSE),
"cusparseCreate": ("hipsparseCreate", CONV_MATH_FUNC, API_SPARSE),
"cusparseDestroy": ("hipsparseDestroy", CONV_MATH_FUNC, API_SPARSE),
"cusparseXcoo2csr": ("hipsparseXcoo2csr", CONV_MATH_FUNC, API_SPARSE),
"cusparseMatDescr_t": ("hipsparseMatDescr_t", CONV_MATH_FUNC, API_SPARSE),
"cusparseCreateMatDescr": ("hipsparseCreateMatDescr", CONV_MATH_FUNC, API_SPARSE),
"cusparseScsrmm2": ("hipsparseScsrmm2", CONV_MATH_FUNC, API_SPARSE),
"cusparseDcsrmm2": ("hipsparseDcsrmm2", CONV_MATH_FUNC, API_SPARSE),
"cusparseXcsrsort_bufferSizeExt": ("hipsparseXcsrsort_bufferSizeExt", CONV_MATH_FUNC, API_SPARSE),
"cusparseXcsrsort": ("hipsparseXcsrsort", CONV_MATH_FUNC, API_SPARSE),
"cusparseXcoosort_bufferSizeExt": ("hipsparseXcoosort_bufferSizeExt", CONV_MATH_FUNC, API_SPARSE),
"cusparseXcoosortByRow": ("hipsparseXcoosortByRow", CONV_MATH_FUNC, API_SPARSE),
"cusparseSetStream": ("hipsparseSetStream", CONV_MATH_FUNC, API_SPARSE),
"cusparseCreateIdentityPermutation": ("hipsparseCreateIdentityPermutation", CONV_MATH_FUNC, API_SPARSE),
"cusparseSetMatIndexBase": ("hipsparseSetMatIndexBase", CONV_MATH_FUNC, API_SPARSE),
"CUSPARSE_STATUS_SUCCESS": ("HIPSPARSE_STATUS_SUCCESS", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_STATUS_NOT_INITIALIZED": ("HIPSPARSE_STATUS_NOT_INITIALIZED", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_STATUS_ALLOC_FAILED": ("HIPSPARSE_STATUS_ALLOC_FAILED", CONV_NUMERIC_LITERAL, API_SPARSE),
Expand All @@ -2183,6 +2195,12 @@
"CUSPARSE_STATUS_INTERNAL_ERROR": ("HIPSPARSE_STATUS_INTERNAL_ERROR", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_STATUS_MATRIX_TYPE_NOT_SUPPORTED": ("HIPSPARSE_STATUS_MATRIX_TYPE_NOT_SUPPORTED", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_STATUS_ARCH_MISMATCH": ("HIPSPARSE_STATUS_ARCH_MISMATCH", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_STATUS_ZERO_PIVOT": ("HIPSPARSE_STATUS_ZERO_PIVOT", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_OPERATION_TRANSPOSE": ("HIPSPARSE_OPERATION_TRANSPOSE", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_OPERATION_NON_TRANSPOSE": ("HIPSPARSE_OPERATION_NON_TRANSPOSE", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_OPERATION_CONJUGATE_TRANSPOSE": ("HIPSPARSE_OPERATION_CONJUGATE_TRANSPOSE", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_INDEX_BASE_ZERO": ("HIPSPARSE_INDEX_BASE_ZERO", CONV_NUMERIC_LITERAL, API_SPARSE),
"CUSPARSE_INDEX_BASE_ONE": ("HIPSPARSE_INDEX_BASE_ONE", CONV_NUMERIC_LITERAL, API_SPARSE),
}

PYTORCH_SPECIFIC_MAPPINGS = {
Expand Down