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This repository was archived by the owner on Dec 22, 2021. It is now read-only.
As part of #8 I had the opportunity to research the availability and performance of general-purpose shuffle instructions like pshufb. These instructions are widely available and behave like a v8x16.swizzle where the lane indices are provided as an i8x16 vector register instead of as immediate operands. Lanes with an out-of-range selector become 0 in the output vector.
The WebAssembly shuffle and swizzle instructions proposed in #1 can be extended to allow for immediate lane indices that are too large. The corresponding lanes in the output vector would be 0.
Having the possibility of zeroed lanes in the output makes it simpler to combine shuffle results with other vectors using v128.or.
We shouldn't add this feature without examples of code where it is useful.