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Packed shift #110
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SSE, Neon, and Wasm SIMD implementations. Packed shift exists on both native platforms. SSE:
Neon:
Wasm SIMD:
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Just a note, that v8 lowers the shuffles here to 1 instruction on both x64 and arm64: https://github.com/zeux/wasm-simd/blob/master/Shuffles.md#concats. Of course this is subject to LLVM not pessimizing the shuffle, but otherwise seems to be in the general category of a shuffle that can be pattern-matched. |
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I looked into single-precision Mersenne Twister after @ngzhian did double-precision port, and its core function relies on "shift bytes" behavior, represented by
PSLLDQ
/PSRLDQ
on x86 andVEXT
on Arm:https://github.com/penzn/SFMT-wasm/blob/master/SFMT-sse2.h#L37
https://github.com/penzn/SFMT-wasm/blob/master/SFMT-neon.h#L36
In current state of this proposal the only way to achieve this result is to use shuffle, which lowers to hardware shuffle instructions. Using hardware "shift bytes" might yield better throughput, though it would not hurt to prototype this to know for sure. In case they do, there are two options:
I am not sure how easy the former is, as I remember there was talk about doing the same to leverage shuffles with wider lanes, but I am not sure any implementation does that.
I have worked on a Mersenne Twister Wasm port which is using shuffle to get the same results, will try to post it online, stay tuned.
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