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45 changes: 18 additions & 27 deletions drivers/spi/spi-dw.c
Original file line number Diff line number Diff line change
Expand Up @@ -289,8 +289,6 @@ static int dw_spi_transfer_one(struct spi_master *master,
struct chip_data *chip = spi_get_ctldata(spi);
u8 imask = 0;
u16 txlevel = 0;
u16 clk_div = 0;
u32 speed = 0;
u32 cr0 = 0;
int ret;

Expand All @@ -309,34 +307,27 @@ static int dw_spi_transfer_one(struct spi_master *master,
cr0 = chip->cr0;

/* Handle per transfer options for bpw and speed */
if (transfer->speed_hz) {
speed = chip->speed_hz;

if ((transfer->speed_hz != speed) || !chip->clk_div) {
speed = transfer->speed_hz;

/* clk_div doesn't support odd number */
clk_div = (dws->max_freq / speed + 1) & 0xfffe;

chip->speed_hz = speed;
chip->clk_div = clk_div;

spi_set_clk(dws, chip->clk_div);
if (transfer->speed_hz != dws->cur_freq) {
if (transfer->speed_hz != chip->speed_hz) {
/* clk_div doesn't support odd number, round up so we won't
* exceed requested speed_hz */
chip->clk_div = ((dws->max_freq + (transfer->speed_hz>>1)) / transfer->speed_hz + 1) & 0xfffe;
chip->speed_hz = transfer->speed_hz;
}
dws->cur_freq = transfer->speed_hz;
spi_set_clk(dws, chip->clk_div);
}
if (transfer->bits_per_word) {
if (transfer->bits_per_word == 8) {
dws->n_bytes = 1;
dws->dma_width = 1;
} else if (transfer->bits_per_word == 16) {
dws->n_bytes = 2;
dws->dma_width = 2;
}
cr0 = (transfer->bits_per_word - 1)
| (chip->type << SPI_FRF_OFFSET)
| (spi->mode << SPI_MODE_OFFSET)
| (chip->tmode << SPI_TMOD_OFFSET);
if (transfer->bits_per_word == 8) {
dws->n_bytes = 1;
dws->dma_width = 1;
} else if (transfer->bits_per_word == 16) {
dws->n_bytes = 2;
dws->dma_width = 2;
}
cr0 = (transfer->bits_per_word - 1)
| (chip->type << SPI_FRF_OFFSET)
| (spi->mode << SPI_MODE_OFFSET)
| (chip->tmode << SPI_TMOD_OFFSET);

/*
* Adjust transfer mode if necessary. Requires platform dependent
Expand Down
1 change: 1 addition & 0 deletions drivers/spi/spi-dw.h
Original file line number Diff line number Diff line change
Expand Up @@ -108,6 +108,7 @@ struct dw_spi {
int irq;
u32 fifo_len; /* depth of the FIFO buffer */
u32 max_freq; /* max bus freq supported */
u32 cur_freq; /* current bus frequency */

u32 reg_io_width; /* DR I/O width in bytes */
u16 bus_num;
Expand Down