Closed
Description
As a beginner, this tripped me up:
I was changing a Signal's value both in the module's internal logic and in my sync process during simulation, and wondering why I was getting nondeterministic results.
If there are legitimate reasons to drive internal (non-port) Signals from a test bench, perhaps throwing a Warning is sufficient, or allowing an optional parameter allow_drive_internal_signal=True
passed to the simulator constructor?