Skip to content

Conversation

MasterJH5574
Copy link
Contributor

This PR fixes the tile size calculation in the TIR attention kernels, where the computed tile sizes may not divide the total loop extent.

This PR fixes the tile size calculation in the TIR attention
kernels, where the computed tile sizes may not divide the total
loop extent.
@MasterJH5574 MasterJH5574 force-pushed the tvm-dev/2025-01-16-kv-cache-tile-size branch from 6ace33c to 57a983d Compare January 18, 2025 20:45
@tqchen tqchen merged commit 077e8eb into apache:main Jan 19, 2025
18 checks passed
ShiboXing pushed a commit to ShiboXing/tvm that referenced this pull request Aug 10, 2025
This PR fixes the tile size calculation in the TIR attention
kernels, where the computed tile sizes may not divide the total
loop extent.
Sign up for free to join this conversation on GitHub. Already have an account? Sign in to comment

Labels

None yet

Projects

None yet

Development

Successfully merging this pull request may close these issues.

2 participants