Kernel does not expose L2$ topology

[waby38b]

Using this commit from my pull request , L1$ topology is exposed by kernel

Now, we cannot see anything related to L2$
This need to be tuned in device tree

HWLOC is a project which can expose such topology

$ /usr/bin/hwloc-ls
Machine (1986MB total)
  Package L#0
    NUMANode L#0 (P#0 1986MB)
    L1d L#0 (32KB) + L1i L#0 (32KB) + Core L#0 + PU L#0 (P#0)
    L1d L#1 (32KB) + L1i L#1 (32KB) + Core L#1 + PU L#1 (P#1)
    L1d L#2 (32KB) + L1i L#2 (32KB) + Core L#2 + PU L#2 (P#2)
    L1d L#3 (32KB) + L1i L#3 (32KB) + Core L#3 + PU L#3 (P#3)
  Block "mmcblk0"
  Net "eth0"

[avolmat]

This commit has never been merged within the upstream kernel. Instead of that, there is already support within drivers/base/cacheinfo to pull the cache topology from the devicetree for both L1, L2 etc.
As an example, arch/arm/boot/dts/bcm2711.dtsi describe the topology of all L1 and L2 cache.
Wouldn't it be enough to do it in a similar way ?

[avolmat]

Another example of such cache topology settings:

b2d5025