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bridadan
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Jan 20, 2016
Changed SPI implementation: #1 To avoid clearing data from buffers, during splitted DMA transfer RX/TX buffer clear is done only when transfer is started. USART transmit is completed instead of DMA/LDMA transfer completed.
bridadan
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May 10, 2016
Fixing build loop in build_release.py
bridadan
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Aug 9, 2016
Differentiate ASM and CXX symbols
bridadan
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Aug 23, 2016
network-socket: Peer address update for Nanostack
bridadan
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Nov 16, 2016
licence and copyrights updated
bridadan
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Nov 16, 2016
copyright and licence updates
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Feb 6, 2017
Parallel building, makefile clean, and build step
bridadan
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May 10, 2017
For LPC176X (LPC1768/LPC1769) the flash driver has been implemented according to the CMSIS-PACK Keil.LPC1700_DFP.2.3.0 driver with the following changes in FlashPrg.c:
1. EraseChip() function removed (not used by flash_api)
2. Clock reconfiguration removed and clock value taken from function parameter to avoid unexpected behavior.
Full patch of FlashPrg.c:
--- Keil.LPC1700_DFP.2.3.0\Flash\LPC_IAP\FlashPrg_orig.c 2016-12-08 13:10:10.000000000 +0200
+++ Keil.LPC1700_DFP.2.3.0\Flash\LPC_IAP\FlashPrg.c 2017-04-11 20:02:37.000000000 +0200
@@ -191,90 +191,15 @@
* fnc: Function Code (1 - Erase, 2 - Program, 3 - Verify)
* Return Value: 0 - OK, 1 - Failed
*/
int Init (unsigned long adr, unsigned long clk, unsigned long fnc) {
-#if defined LPC1XXX || defined LPC11U6X
- CCLK = 12000; // 12MHz Internal RC Oscillator
+ CCLK = clk / 1000; // CCLK value is in kHz, clk in Hz
- MAINCLKSEL = 0; // Select Internal RC Oscillator
- MAINCLKUEN = 1; // Update Main Clock Source
- MAINCLKUEN = 0; // Toggle Update Register
- MAINCLKUEN = 1;
-// while (!(MAINCLKUEN & 1)); // Wait until updated
- MAINCLKDIV = 1; // Set Main Clock divider to 1
-
- MEMMAP = 0x02; // User Flash Mode
-#endif
-
-#ifdef LPC17XX
- IAP.stat = 0; // Note: Some Bootloader versions don't set the status if this command is executed
- IAP.cmd = 54; // Read Part ID
- IAP_Call (&IAP.cmd, &IAP.stat); // Call IAP Command
- if (IAP.stat) return (1); // Command Failed
-
- switch ((IAP.res[0] >> 24) & 0xFF) {
- case 0x25:
- // Part ID LPC1759 = 0x25113737
- // Part ID LPC1758 = 0x25013F37
- // Part ID LPC1756 = 0x25011723
- // Part ID LPC1754 = 0x25011722
- // Part ID LPC1752 = 0x25001121
- // Part ID LPC1751 = 0x25001118 / 0x25001110
- case 0x26:
- // Part ID LPC1769 = 0x26113F37
- // Part ID LPC1768 = 0x26013F37
- // Part ID LPC1767 = 0x26012837
- // Part ID LPC1766 = 0x26013F33
- // Part ID LPC1765 = 0x26013733
- // Part ID LPC1764 = 0x26011922
- CCLK = 4000; // 4MHz Internal RC Oscillator
- break;
- case 0x27:
- // Part ID LPC1778 = 0x27193F47
- // Part ID LPC1777 = 0x27193747
- // Part ID LPC1776 = 0x27191F43
- // Part ID LPC1774 = 0x27011132
- // Part ID LPC1772 = 0x27011121
- case 0x20: // found out during test
- case 0x28:
- // Part ID LPC1788 = 0x281D3F47
- // Part ID LPC1787 = 0x281D3747
- // Part ID LPC1786 = 0x281D1F43
- // Part ID LPC1785 = 0x281D1743
- case 0x48: // Part ID LPC4088 = 0x481D3F47
- case 0x47: // Part ID LPC4078 = 0x47193F47
- // Part ID LPC4076 = 0x47191F43
- // Part ID LPC4074 = 0x47011132
- CCLK = 12000; // 12MHz Internal RC Oscillator
- break;
- default:
- CCLK = 4000; // 4MHz Internal RC Oscillator
- }
-
- CLKSRCSEL = 0x00; // sysclk = IRC
-
- PLL0CON = 0x00; // Disable PLL (use Oscillator)
- PLL0FEED = 0xAA; // Feed Sequence Part #1
- PLL0FEED = 0x55; // Feed Sequence Part #2
-
- switch ((IAP.res[0] >> 24) & 0xFF) {
- case 0x27: // LPC177x
- case 0x20: // LPC178x
- case 0x28: // LPC178x
- case 0x48: // LPC407x
- case 0x47: // LPC408x
- CCLKSEL = 0x01; // use Sysclk devided by 1 for CPU
- break;
- default:
- CCLKSEL = 0x00; // CPU clk divider is 1
- }
-
MEMMAP = 0x01; // User Flash Mode
-#endif
return (0);
}
/*
@@ -283,37 +208,12 @@
* Return Value: 0 - OK, 1 - Failed
*/
int UnInit (unsigned long fnc) {
return (0);
}
-
-
-/*
- * Erase complete Flash Memory
- * Return Value: 0 - OK, 1 - Failed
- */
-
-int EraseChip (void) {
-
- IAP.cmd = 50; // Prepare Sector for Erase
- IAP.par[0] = 0; // Start Sector
- IAP.par[1] = END_SECTOR; // End Sector
- IAP_Call (&IAP.cmd, &IAP.stat); // Call IAP Command
- if (IAP.stat) return (1); // Command Failed
-
- IAP.cmd = 52; // Erase Sector
- IAP.par[0] = 0; // Start Sector
- IAP.par[1] = END_SECTOR; // End Sector
- IAP.par[2] = CCLK; // CCLK in kHz
- IAP_Call (&IAP.cmd, &IAP.stat); // Call IAP Command
- if (IAP.stat) return (1); // Command Failed
-
- return (0); // Finished without Errors
-}
-
/*
* Erase Sector in Flash Memory
* Parameter: adr: Sector Address
* Return Value: 0 - OK, 1 - Failed
*/
bridadan
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Oct 4, 2017
Warning ARMmbed#1300-D: inherits implicit virtual - Adding the virtual keyword in the derived class prevents the warning Warning #1-D: last line of file ends without a newline - New line added at the end of file Warning ARMmbed#997-D: function "MeshInterfaceNanostack::initialize(NanostackPhy *)" is hidden by "ThreadInterface::initialize" -- virtual function override intended? - virtual keyword removed from "MeshInterfaceNanostack::initialize" Warning ARMmbed#1300-D: inherits implicit virtual - Adding the virtual keyword in the derived class prevents the warning
bridadan
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Oct 4, 2017
bridadan
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Aug 1, 2018
`handle_error` calls `MBED_CALLER_ADDR()`, but this is always a location from within platform/mbed_error.c. This is because `handle_error` is declared static. This does not cause the function to be inlined however. Instead, it is called by each function within mbed_error.c. For example, mbed_error yields this code:
```
000625c8 <mbed_error>:
625c8: b510 push {r4, lr}
625ca: 460c mov r4, r1
625cc: 4611 mov r1, r2
625ce: 461a mov r2, r3
625d0: 9b02 ldr r3, [sp, #8]
625d2: f7ff feff bl 623d4 <handle_error>
625d6: b968 cbnz r0, 625f4 <mbed_error+0x2c>
625d8: 4620 mov r0, r4
625da: f7ff ff67 bl 624ac <print_error_report.constprop.0>
625de: f7ff fea8 bl 62332 <core_util_is_isr_active>
625e2: b910 cbnz r0, 625ea <mbed_error+0x22>
625e4: f7ff fe9f bl 62326 <core_util_are_interrupts_enabled>
625e8: b908 cbnz r0, 625ee <mbed_error+0x26>
625ea: bf30 wfi
625ec: e7fd b.n 625ea <mbed_error+0x22>
625ee: 2001 movs r0, #1
625f0: f000 f948 bl 62884 <__wrap_exit>
625f4: 4800 ldr r0, [pc, #0] ; (625f8 <mbed_error+0x30>)
625f6: bd10 pop {r4, pc}
625f8: 80ff010f .word 0x80ff010f
```
Note that at `625d2` there is a bl to handle error. That replaces the LR, which means that ALL calls to mbed_error will report a location of 0x625d6 or 0x625d7 (user vs. supervisor). I do not expect that this was the intention of the code. The simplest fix is to change line 99:
```C
static inline mbed_error_status_t handle_error(mbed_error_status_t error_status, unsigned int error_value, const char *filename, int line_number)
```
Since `handle_error()` will be inlined, the link register will be kept the same, so `MBED_CALLER_ADDR()` will yield the expected result. However, there is no guarantee that the compiler will respect the `inline` keyword in all circumstances.
The result is that each function that wishes to report its caller must extract its caller. This code cannot be centralised.
I have modified `mbed_error.c` to report the caller of each error reporting function, rather than the error reporting function itself.
bridadan
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Sep 10, 2018
Fix default spi speed to 40Mhz
bridadan
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Sep 10, 2018
Fix const attribute mismatch on size function
bridadan
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Sep 10, 2018
Added more warnings about FlashIAP
bridadan
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Sep 10, 2018
NFC: Amend ndef parsing design.
bridadan
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Oct 11, 2018
choose which lpc1768 timer to use for us_ticker.c
bridadan
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Mar 14, 2019
Finish memory protection and add static assert
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This is just a test