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@Cellule Cellule commented Sep 15, 2017

@Cellule Cellule requested a review from MikeHolman September 15, 2017 01:33
@Cellule Cellule self-assigned this Sep 15, 2017
@Cellule Cellule added this to the vNext milestone Sep 15, 2017
Changed -WasmSignExtend2 to -WasmSignExtends
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Cellule commented Sep 15, 2017

Fixed the cse case and added tests, ready to review

case Js::OpCodeAsmJs::I32Extend16_s: signExtendFromType = TyInt16; goto make_sign_extend;
make_sign_extend:
// Src2 is a dummy source, used only to carry the type to cast from
instr = IR::Instr::New(Js::OpCode::Conv_Prim, dstOpnd, srcOpnd, IR::IntConstOpnd::New(signExtendFromType, signExtendFromType, m_func), m_func);
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this really needs a comment for why the int value is the type

}

IR::RegOpnd * tempReg = IR::RegOpnd::New(fromType, this->m_func);
instr->InsertBefore(IR::Instr::New(Js::OpCode::MOV_TRUNC, tempReg, src1, m_func));
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why do you need this?

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Initially, I thought we needed to explicitly zero out the upper bits of the register, but MOVSX, takes care of setting the bits, so it is not actually needed.

Js::OpCode op = Js::OpCode::MOVSX;
if (src2->GetSize() == 2)
{
op = Js::OpCode::MOVSXW;
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@MikeHolman MikeHolman Sep 19, 2017

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should assert else size == 1 (I guess you can't do that directly since it could be size == 4 and op isn't used, but something along those lines should be included)

const tests = [
makeCSETest("i32", "extend8_s" , null, [0xFF, 1, 0x1FF]),
makeCSETest("i32", "extend16_s", null, [0xFF, 1, 0xFFFF, 0x1FFFF]),
makeCSETest("i64", "extend8_s" , null, [0xFF, 1, 0x1FF]),
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nice. very exhaustive :)

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@MikeHolman MikeHolman left a comment

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:shipit:

@chakrabot chakrabot merged commit 3d0ad02 into chakra-core:master Sep 19, 2017
chakrabot pushed a commit that referenced this pull request Sep 19, 2017
@Cellule Cellule deleted the wasm/signextend2 branch September 19, 2017 22:54
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4 participants