Add support for 4-arg ops in mini IR #48908
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| /* used by the register allocator */ | ||
| gint32 dreg, sreg1, sreg2, sreg3; | ||
| gint32 dreg, sreg1, sreg2, sreg3, sreg4; |
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There was a fair bit of discussion about this when I looked into it, and I thought the conclusion was that we didn't want to add them this way since it's only an immediate value.
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This adds a lot of overhead for the tiny minority of opcodes which have 4 opcodes.
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There's 4 bytes of padding between sreg3 and next on 64-bit machines.
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We still run on a (sadly) 32-bit platform – wasm – so I don't think we can assume this doesn't add overhead on platforms we care about.
Which is not to say we can't take this approach, just that it shouldn't be predicated on incorrect assumptions.
| } LLVMCallInfo; | ||
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| #define MONO_MAX_SRC_REGS 3 | ||
| #define MONO_MAX_SRC_REGS 4 |
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I believe this is actually not enough and the 3 value is hard-coded in a few different places instead of just using this define.
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This PR is far away from being completed. I just did the most basic change. Will fix the errors exposed by testing.
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Current consensus is 'too much churn/work for minimal gain'. #48475 (comment) |
ghost
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Fixes #48475