Fix PWM frequency at low and high frequencies #244
Merged
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The PWM HW can only divide 125MHZ sysclk by 1...256. That's only down to
about 500khz. If the max count of the PWM (analogWriteScale) is too low
then the actual PWM period will be much less than desired (and PWM frequency
of course much higher).
For example, at analogWriteFreq(100); analogWriteScale(256); the true
PWM period would be 125M / 256 (pwmdiv) / 256 (scale) = ~2khz.
Conversely, at high frequencies and large scales it is impossible to achieve
the requested frequency and a much lower one would be generated. For
example: freq(60K), scale(32768). PWM period = 125M / 1 (pwmdiv) / 32768 =
~4kHz.
Avoid this by adjusting the analogWrite scale in the core to either increase
the PWM count for low frequencies, or decrease it for high frequencies.
This is done behind the scenes and code is not required to be changed.
The PWM frequency will still not be perfcetly exact due to the divider HW
and clocks involved, but it will be very close across the whole range.
Fixes #234